Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _PS2ESDI_H_ |
| 2 | #define _PS2ESDI_H_ |
| 3 | |
| 4 | #define NRML_ESDI_ID 0xddff |
| 5 | #define INTG_ESDI_ID 0xdf9f |
| 6 | |
| 7 | #define PRIMARY_IO_BASE 0x3510 |
| 8 | #define ALT_IO_BASE 0x3518 |
| 9 | |
| 10 | #define ESDI_CMD_INT (io_base+0) |
| 11 | #define ESDI_STT_INT (io_base+0) |
| 12 | #define ESDI_CONTROL (io_base+2) |
| 13 | #define ESDI_STATUS (io_base+2) |
| 14 | #define ESDI_ATTN (io_base+3) |
| 15 | #define ESDI_INTRPT (io_base+3) |
| 16 | |
| 17 | #define STATUS_ENABLED 0x01 |
| 18 | #define STATUS_ALTERNATE 0x02 |
| 19 | #define STATUS_BUSY 0x10 |
| 20 | #define STATUS_STAT_AVAIL 0x08 |
| 21 | #define STATUS_INTR 0x01 |
| 22 | #define STATUS_RESET_FAIL 0xea |
| 23 | #define STATUS_CMD_INF 0x04 |
| 24 | |
| 25 | #define CTRL_SOFT_RESET 0xe4 |
| 26 | #define CTRL_HARD_RESET 0x80 |
| 27 | #define CTRL_EOI 0xe2 |
| 28 | #define CTRL_ENABLE_DMA 0x02 |
| 29 | #define CTRL_ENABLE_INTR 0x01 |
| 30 | #define CTRL_DISABLE_INTR 0x00 |
| 31 | |
| 32 | #define ATT_EOI 0x02 |
| 33 | |
| 34 | /* bits of word 0 of configuration status block. more info see p.38 of tech ref */ |
| 35 | #define CONFIG_IS 0x10 /* Invalid Secondary */ |
| 36 | #define CONFIG_ZD 0x08 /* Zero Defect */ |
| 37 | #define CONFIG_SF 0x04 /* Skewed Format */ |
| 38 | #define CONFIG_FR 0x02 /* Removable */ |
| 39 | #define CONFIG_RT 0x01 /* Retries */ |
| 40 | |
| 41 | #define PORT_SYS_A 0x92 |
| 42 | #define PORT_DMA_FN 0x18 |
| 43 | #define PORT_DMA_EX 0x1a |
| 44 | |
| 45 | #define ON (unsigned char)0x40 |
| 46 | #define OFF (unsigned char)~ON |
| 47 | #define LITE_ON outb(inb(PORT_SYS_A) | ON,PORT_SYS_A) |
| 48 | #define LITE_OFF outb((inb(PORT_SYS_A) & OFF),PORT_SYS_A) |
| 49 | |
| 50 | #define FAIL 0 |
| 51 | #define SUCCES 1 |
| 52 | |
| 53 | #define INT_CMD_COMPLETE 0x01 |
| 54 | #define INT_CMD_ECC 0x03 |
| 55 | #define INT_CMD_RETRY 0x05 |
| 56 | #define INT_CMD_FORMAT 0x06 |
| 57 | #define INT_CMD_ECC_RETRY 0x07 |
| 58 | #define INT_CMD_WARNING 0x08 |
| 59 | #define INT_CMD_ABORT 0x09 |
| 60 | #define INT_RESET 0x0A |
| 61 | #define INT_TRANSFER_REQ 0x0B |
| 62 | #define INT_CMD_FAILED 0x0C |
| 63 | #define INT_DMA_ERR 0x0D |
| 64 | #define INT_CMD_BLK_ERR 0x0E |
| 65 | #define INT_ATTN_ERROR 0x0F |
| 66 | |
| 67 | #define DMA_MASK_CHAN 0x90 |
| 68 | #define DMA_UNMASK_CHAN 0xA0 |
| 69 | #define DMA_WRITE_ADDR 0x20 |
| 70 | #define DMA_WRITE_TC 0x40 |
| 71 | #define DMA_WRITE_MODE 0x70 |
| 72 | |
| 73 | #define CMD_GET_DEV_CONFIG 0x09 |
| 74 | #define CMD_READ 0x4601 |
| 75 | #define CMD_WRITE 0x4602 |
| 76 | #define DMA_READ_16 0x4C |
| 77 | #define DMA_WRITE_16 0x44 |
| 78 | |
| 79 | |
| 80 | #define MB 1024*1024 |
| 81 | #define SECT_SIZE 512 |
| 82 | |
| 83 | #define ERROR 1 |
| 84 | #define OK 0 |
| 85 | |
| 86 | #define HDIO_GETGEO 0x0301 |
| 87 | |
| 88 | #define FALSE 0 |
| 89 | #define TRUE !FALSE |
| 90 | |
| 91 | struct ps2esdi_geometry { |
| 92 | unsigned char heads; |
| 93 | unsigned char sectors; |
| 94 | unsigned short cylinders; |
| 95 | unsigned long start; |
| 96 | }; |
| 97 | |
| 98 | #endif /* _PS2ESDI_H_ */ |