Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 1 | menu "Processor selection" |
| 2 | |
| 3 | # |
| 4 | # Processor families |
| 5 | # |
| 6 | config CPU_SH2 |
| 7 | bool |
| 8 | select SH_WRITETHROUGH |
| 9 | |
| 10 | config CPU_SH3 |
| 11 | bool |
| 12 | select CPU_HAS_INTEVT |
| 13 | select CPU_HAS_SR_RB |
| 14 | |
| 15 | config CPU_SH4 |
| 16 | bool |
| 17 | select CPU_HAS_INTEVT |
| 18 | select CPU_HAS_SR_RB |
| 19 | |
| 20 | config CPU_SH4A |
| 21 | bool |
| 22 | select CPU_SH4 |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 23 | |
| 24 | config CPU_SUBTYPE_ST40 |
| 25 | bool |
| 26 | select CPU_SH4 |
| 27 | select CPU_HAS_INTC2_IRQ |
| 28 | |
| 29 | # |
| 30 | # Processor subtypes |
| 31 | # |
| 32 | |
| 33 | comment "SH-2 Processor Support" |
| 34 | |
| 35 | config CPU_SUBTYPE_SH7604 |
| 36 | bool "Support SH7604 processor" |
| 37 | select CPU_SH2 |
| 38 | |
| 39 | comment "SH-3 Processor Support" |
| 40 | |
| 41 | config CPU_SUBTYPE_SH7300 |
| 42 | bool "Support SH7300 processor" |
| 43 | select CPU_SH3 |
| 44 | |
| 45 | config CPU_SUBTYPE_SH7705 |
| 46 | bool "Support SH7705 processor" |
| 47 | select CPU_SH3 |
| 48 | select CPU_HAS_PINT_IRQ |
| 49 | |
| 50 | config CPU_SUBTYPE_SH7707 |
| 51 | bool "Support SH7707 processor" |
| 52 | select CPU_SH3 |
| 53 | select CPU_HAS_PINT_IRQ |
| 54 | help |
| 55 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. |
| 56 | |
| 57 | config CPU_SUBTYPE_SH7708 |
| 58 | bool "Support SH7708 processor" |
| 59 | select CPU_SH3 |
| 60 | help |
| 61 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or |
| 62 | if you have a 100 Mhz SH-3 HD6417708R CPU. |
| 63 | |
| 64 | config CPU_SUBTYPE_SH7709 |
| 65 | bool "Support SH7709 processor" |
| 66 | select CPU_SH3 |
| 67 | select CPU_HAS_PINT_IRQ |
| 68 | help |
| 69 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. |
| 70 | |
| 71 | comment "SH-4 Processor Support" |
| 72 | |
| 73 | config CPU_SUBTYPE_SH7750 |
| 74 | bool "Support SH7750 processor" |
| 75 | select CPU_SH4 |
| 76 | help |
| 77 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. |
| 78 | |
| 79 | config CPU_SUBTYPE_SH7091 |
| 80 | bool "Support SH7091 processor" |
| 81 | select CPU_SH4 |
| 82 | select CPU_SUBTYPE_SH7750 |
| 83 | help |
| 84 | Select SH7091 if you have an SH-4 based Sega device (such as |
| 85 | the Dreamcast, Naomi, and Naomi 2). |
| 86 | |
| 87 | config CPU_SUBTYPE_SH7750R |
| 88 | bool "Support SH7750R processor" |
| 89 | select CPU_SH4 |
| 90 | select CPU_SUBTYPE_SH7750 |
| 91 | |
| 92 | config CPU_SUBTYPE_SH7750S |
| 93 | bool "Support SH7750S processor" |
| 94 | select CPU_SH4 |
| 95 | select CPU_SUBTYPE_SH7750 |
| 96 | |
| 97 | config CPU_SUBTYPE_SH7751 |
| 98 | bool "Support SH7751 processor" |
| 99 | select CPU_SH4 |
| 100 | help |
| 101 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, |
| 102 | or if you have a HD6417751R CPU. |
| 103 | |
| 104 | config CPU_SUBTYPE_SH7751R |
| 105 | bool "Support SH7751R processor" |
| 106 | select CPU_SH4 |
| 107 | select CPU_SUBTYPE_SH7751 |
| 108 | |
| 109 | config CPU_SUBTYPE_SH7760 |
| 110 | bool "Support SH7760 processor" |
| 111 | select CPU_SH4 |
| 112 | select CPU_HAS_INTC2_IRQ |
| 113 | |
| 114 | config CPU_SUBTYPE_SH4_202 |
| 115 | bool "Support SH4-202 processor" |
| 116 | select CPU_SH4 |
| 117 | |
| 118 | comment "ST40 Processor Support" |
| 119 | |
| 120 | config CPU_SUBTYPE_ST40STB1 |
| 121 | bool "Support ST40STB1/ST40RA processors" |
| 122 | select CPU_SUBTYPE_ST40 |
| 123 | help |
| 124 | Select ST40STB1 if you have a ST40RA CPU. |
| 125 | This was previously called the ST40STB1, hence the option name. |
| 126 | |
| 127 | config CPU_SUBTYPE_ST40GX1 |
| 128 | bool "Support ST40GX1 processor" |
| 129 | select CPU_SUBTYPE_ST40 |
| 130 | help |
| 131 | Select ST40GX1 if you have a ST40GX1 CPU. |
| 132 | |
| 133 | comment "SH-4A Processor Support" |
| 134 | |
| 135 | config CPU_SUBTYPE_SH73180 |
| 136 | bool "Support SH73180 processor" |
| 137 | select CPU_SH4A |
| 138 | |
| 139 | config CPU_SUBTYPE_SH7770 |
| 140 | bool "Support SH7770 processor" |
| 141 | select CPU_SH4A |
| 142 | |
| 143 | config CPU_SUBTYPE_SH7780 |
| 144 | bool "Support SH7780 processor" |
| 145 | select CPU_SH4A |
Paul Mundt | a328ff9 | 2006-09-27 16:14:54 +0900 | [diff] [blame^] | 146 | select CPU_HAS_INTC2_IRQ |
Paul Mundt | cad8244 | 2006-01-16 22:14:19 -0800 | [diff] [blame] | 147 | |
| 148 | endmenu |
| 149 | |
| 150 | menu "Memory management options" |
| 151 | |
| 152 | config MMU |
| 153 | bool "Support for memory management hardware" |
| 154 | depends on !CPU_SH2 |
| 155 | default y |
| 156 | help |
| 157 | Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to |
| 158 | boot on these systems, this option must not be set. |
| 159 | |
| 160 | On other systems (such as the SH-3 and 4) where an MMU exists, |
| 161 | turning this off will boot the kernel on these machines with the |
| 162 | MMU implicitly switched off. |
| 163 | |
| 164 | config 32BIT |
| 165 | bool "Support 32-bit physical addressing through PMB" |
| 166 | depends on CPU_SH4A |
| 167 | default y |
| 168 | help |
| 169 | If you say Y here, physical addressing will be extended to |
| 170 | 32-bits through the SH-4A PMB. If this is not set, legacy |
| 171 | 29-bit physical addressing will be used. |
| 172 | |
| 173 | choice |
| 174 | prompt "HugeTLB page size" |
| 175 | depends on HUGETLB_PAGE && CPU_SH4 && MMU |
| 176 | default HUGETLB_PAGE_SIZE_64K |
| 177 | |
| 178 | config HUGETLB_PAGE_SIZE_64K |
| 179 | bool "64K" |
| 180 | |
| 181 | config HUGETLB_PAGE_SIZE_1MB |
| 182 | bool "1MB" |
| 183 | |
| 184 | endchoice |
| 185 | |
| 186 | source "mm/Kconfig" |
| 187 | |
| 188 | endmenu |
| 189 | |
| 190 | menu "Cache configuration" |
| 191 | |
| 192 | config SH7705_CACHE_32KB |
| 193 | bool "Enable 32KB cache size for SH7705" |
| 194 | depends on CPU_SUBTYPE_SH7705 |
| 195 | default y |
| 196 | |
| 197 | config SH_DIRECT_MAPPED |
| 198 | bool "Use direct-mapped caching" |
| 199 | default n |
| 200 | help |
| 201 | Selecting this option will configure the caches to be direct-mapped, |
| 202 | even if the cache supports a 2 or 4-way mode. This is useful primarily |
| 203 | for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R, |
| 204 | SH4-202, SH4-501, etc.) |
| 205 | |
| 206 | Turn this option off for platforms that do not have a direct-mapped |
| 207 | cache, and you have no need to run the caches in such a configuration. |
| 208 | |
| 209 | config SH_WRITETHROUGH |
| 210 | bool "Use write-through caching" |
| 211 | default y if CPU_SH2 |
| 212 | help |
| 213 | Selecting this option will configure the caches in write-through |
| 214 | mode, as opposed to the default write-back configuration. |
| 215 | |
| 216 | Since there's sill some aliasing issues on SH-4, this option will |
| 217 | unfortunately still require the majority of flushing functions to |
| 218 | be implemented to deal with aliasing. |
| 219 | |
| 220 | If unsure, say N. |
| 221 | |
| 222 | config SH_OCRAM |
| 223 | bool "Operand Cache RAM (OCRAM) support" |
| 224 | help |
| 225 | Selecting this option will automatically tear down the number of |
| 226 | sets in the dcache by half, which in turn exposes a memory range. |
| 227 | |
| 228 | The addresses for the OC RAM base will vary according to the |
| 229 | processor version. Consult vendor documentation for specifics. |
| 230 | |
| 231 | If unsure, say N. |
| 232 | |
| 233 | endmenu |