blob: e046fdaec5ae21de6971d36bbd857efde08df1a5 [file] [log] [blame]
Mike Iselyd8554972006-06-26 20:58:46 -03001/*
2 *
Mike Iselyd8554972006-06-26 20:58:46 -03003 *
4 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
5 * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/device.h> // for linux/firmware.h
23#include <linux/firmware.h>
Mike Iselyd8554972006-06-26 20:58:46 -030024#include "pvrusb2-util.h"
25#include "pvrusb2-encoder.h"
26#include "pvrusb2-hdw-internal.h"
27#include "pvrusb2-debug.h"
Michael Krufky8d364362007-01-22 02:17:55 -030028#include "pvrusb2-fx2-cmd.h"
Mike Iselyd8554972006-06-26 20:58:46 -030029
Mike Iselyd8554972006-06-26 20:58:46 -030030
31
32/* Firmware mailbox flags - definitions found from ivtv */
33#define IVTV_MBOX_FIRMWARE_DONE 0x00000004
34#define IVTV_MBOX_DRIVER_DONE 0x00000002
35#define IVTV_MBOX_DRIVER_BUSY 0x00000001
36
Mike Iselyc43000e2007-01-28 15:41:12 -030037#define MBOX_BASE 0x44
38
Mike Iselyd8554972006-06-26 20:58:46 -030039
Mike Iselyeacbe7c2006-06-25 20:04:06 -030040static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
Mike Iselyc43000e2007-01-28 15:41:12 -030041 unsigned int offs,
Mike Iselyd8554972006-06-26 20:58:46 -030042 const u32 *data, unsigned int dlen)
43{
Mike Iselyc43000e2007-01-28 15:41:12 -030044 unsigned int idx,addr;
45 unsigned int bAddr;
Mike Iselyd8554972006-06-26 20:58:46 -030046 int ret;
Mike Iselyd8554972006-06-26 20:58:46 -030047 unsigned int chunkCnt;
48
49 /*
50
51 Format: First byte must be 0x01. Remaining 32 bit words are
Mike Iselyc43000e2007-01-28 15:41:12 -030052 spread out into chunks of 7 bytes each, with the first 4 bytes
53 being the data word (little endian), and the next 3 bytes
54 being the address where that data word is to be written (big
55 endian). Repeat request for additional words, with offset
56 adjusted accordingly.
Mike Iselyd8554972006-06-26 20:58:46 -030057
58 */
59 while (dlen) {
60 chunkCnt = 8;
61 if (chunkCnt > dlen) chunkCnt = dlen;
62 memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
Mike Iselyc43000e2007-01-28 15:41:12 -030063 bAddr = 0;
64 hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
Mike Iselyd8554972006-06-26 20:58:46 -030065 for (idx = 0; idx < chunkCnt; idx++) {
Mike Iselyc43000e2007-01-28 15:41:12 -030066 addr = idx + offs;
67 hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
68 hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
69 hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
70 PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
71 bAddr += 7;
Mike Iselyd8554972006-06-26 20:58:46 -030072 }
73 ret = pvr2_send_request(hdw,
74 hdw->cmd_buffer,1+(chunkCnt*7),
Mike Iselya0fd1cb2006-06-30 11:35:28 -030075 NULL,0);
Mike Iselyd8554972006-06-26 20:58:46 -030076 if (ret) return ret;
77 data += chunkCnt;
78 dlen -= chunkCnt;
79 offs += chunkCnt;
80 }
81
82 return 0;
83}
84
85
Mike Iselyc43000e2007-01-28 15:41:12 -030086static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
87 unsigned int offs,
Mike Iselyd8554972006-06-26 20:58:46 -030088 u32 *data, unsigned int dlen)
89{
90 unsigned int idx;
91 int ret;
Mike Iselyd8554972006-06-26 20:58:46 -030092 unsigned int chunkCnt;
93
94 /*
95
96 Format: First byte must be 0x02 (status check) or 0x28 (read
97 back block of 32 bit words). Next 6 bytes must be zero,
Mike Iselyc43000e2007-01-28 15:41:12 -030098 followed by a single byte of MBOX_BASE+offset for portion to
99 be read. Returned data is packed set of 32 bits words that
100 were read.
Mike Iselyd8554972006-06-26 20:58:46 -0300101
102 */
103
104 while (dlen) {
105 chunkCnt = 16;
106 if (chunkCnt > dlen) chunkCnt = dlen;
Mike Iselyc43000e2007-01-28 15:41:12 -0300107 if (chunkCnt < 16) chunkCnt = 1;
Michael Krufky8d364362007-01-22 02:17:55 -0300108 hdw->cmd_buffer[0] =
Mike Iselyc43000e2007-01-28 15:41:12 -0300109 ((chunkCnt == 1) ?
110 FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
111 hdw->cmd_buffer[1] = 0;
112 hdw->cmd_buffer[2] = 0;
113 hdw->cmd_buffer[3] = 0;
114 hdw->cmd_buffer[4] = 0;
115 hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
116 hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
117 hdw->cmd_buffer[7] = (offs & 0xffu);
Mike Iselyd8554972006-06-26 20:58:46 -0300118 ret = pvr2_send_request(hdw,
119 hdw->cmd_buffer,8,
Mike Iselyc43000e2007-01-28 15:41:12 -0300120 hdw->cmd_buffer,
121 (chunkCnt == 1 ? 4 : 16 * 4));
Mike Iselyd8554972006-06-26 20:58:46 -0300122 if (ret) return ret;
123
124 for (idx = 0; idx < chunkCnt; idx++) {
125 data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
126 }
127 data += chunkCnt;
128 dlen -= chunkCnt;
129 offs += chunkCnt;
130 }
131
132 return 0;
133}
134
135
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300136/* This prototype is set up to be compatible with the
137 cx2341x_mbox_func prototype in cx2341x.h, which should be in
138 kernels 2.6.18 or later. We do this so that we can enable
139 cx2341x.ko to write to our encoder (by handing it a pointer to this
140 function). For earlier kernels this doesn't really matter. */
141static int pvr2_encoder_cmd(void *ctxt,
Hans Verkuilea48c132007-12-12 07:04:58 -0300142 u32 cmd,
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300143 int arg_cnt_send,
144 int arg_cnt_recv,
145 u32 *argp)
Mike Iselyd8554972006-06-26 20:58:46 -0300146{
147 unsigned int poll_count;
Mike Iselyc43000e2007-01-28 15:41:12 -0300148 unsigned int try_count = 0;
149 int retry_flag;
Mike Iselyd8554972006-06-26 20:58:46 -0300150 int ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300151 unsigned int idx;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300152 /* These sizes look to be limited by the FX2 firmware implementation */
Mike Iselyd8554972006-06-26 20:58:46 -0300153 u32 wrData[16];
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300154 u32 rdData[16];
155 struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;
Mike Iselyd8554972006-06-26 20:58:46 -0300156
Mike Iselyc05c0462006-06-25 20:04:25 -0300157
Mike Iselyd8554972006-06-26 20:58:46 -0300158 /*
159
160 The encoder seems to speak entirely using blocks 32 bit words.
Mike Iselyc43000e2007-01-28 15:41:12 -0300161 In ivtv driver terms, this is a mailbox at MBOX_BASE which we
162 populate with data and watch what the hardware does with it.
163 The first word is a set of flags used to control the
164 transaction, the second word is the command to execute, the
165 third byte is zero (ivtv driver suggests that this is some
166 kind of return value), and the fourth byte is a specified
167 timeout (windows driver always uses 0x00060000 except for one
168 case when it is zero). All successive words are the argument
169 words for the command.
Mike Iselyd8554972006-06-26 20:58:46 -0300170
171 First, write out the entire set of words, with the first word
172 being zero.
173
174 Next, write out just the first word again, but set it to
175 IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
176 probably means "go").
177
Mike Iselyc43000e2007-01-28 15:41:12 -0300178 Next, read back the return count words. Check the first word,
Mike Iselyd8554972006-06-26 20:58:46 -0300179 which should have IVTV_MBOX_FIRMWARE_DONE set. If however
180 that bit is not set, then the command isn't done so repeat the
Mike Iselyc43000e2007-01-28 15:41:12 -0300181 read until it is set.
Mike Iselyd8554972006-06-26 20:58:46 -0300182
183 Finally, write out just the first word again, but set it to
184 0x0 this time (which probably means "idle").
185
186 */
187
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300188 if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300189 pvr2_trace(
190 PVR2_TRACE_ERROR_LEGS,
191 "Failed to write cx23416 command"
192 " - too many input arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300193 " (was given %u limit %lu)",
194 arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300195 return -EINVAL;
196 }
197
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300198 if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300199 pvr2_trace(
200 PVR2_TRACE_ERROR_LEGS,
201 "Failed to write cx23416 command"
202 " - too many return arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300203 " (was given %u limit %lu)",
204 arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300205 return -EINVAL;
206 }
207
Mike Iselyd8554972006-06-26 20:58:46 -0300208
209 LOCK_TAKE(hdw->ctl_lock); do {
210
Mike Isely681c7392007-11-26 01:48:52 -0300211 if (!hdw->state_encoder_ok) {
Mike Isely9a607f02007-10-14 18:18:12 -0300212 ret = -EIO;
213 break;
214 }
215
Mike Iselyc43000e2007-01-28 15:41:12 -0300216 retry_flag = 0;
217 try_count++;
218 ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300219 wrData[0] = 0;
220 wrData[1] = cmd;
221 wrData[2] = 0;
222 wrData[3] = 0x00060000;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300223 for (idx = 0; idx < arg_cnt_send; idx++) {
224 wrData[idx+4] = argp[idx];
Mike Iselyd8554972006-06-26 20:58:46 -0300225 }
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300226 for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300227 wrData[idx+4] = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300228 }
229
Mike Iselyc43000e2007-01-28 15:41:12 -0300230 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
Mike Iselyd8554972006-06-26 20:58:46 -0300231 if (ret) break;
232 wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
Mike Iselyc43000e2007-01-28 15:41:12 -0300233 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
Mike Iselyd8554972006-06-26 20:58:46 -0300234 if (ret) break;
235 poll_count = 0;
236 while (1) {
Mike Iselyc43000e2007-01-28 15:41:12 -0300237 poll_count++;
238 ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
239 arg_cnt_recv+4);
240 if (ret) {
241 break;
242 }
Mike Iselyd8554972006-06-26 20:58:46 -0300243 if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
244 break;
245 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300246 if (rdData[0] && (poll_count < 1000)) continue;
247 if (!rdData[0]) {
248 retry_flag = !0;
249 pvr2_trace(
250 PVR2_TRACE_ERROR_LEGS,
251 "Encoder timed out waiting for us"
252 "; arranging to retry");
253 } else {
Mike Iselyd8554972006-06-26 20:58:46 -0300254 pvr2_trace(
255 PVR2_TRACE_ERROR_LEGS,
256 "***WARNING*** device's encoder"
257 " appears to be stuck"
Mike Isely201779f2007-02-08 01:48:57 -0300258 " (status=0x%08x)",rdData[0]);
Mike Iselyd8554972006-06-26 20:58:46 -0300259 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300260 pvr2_trace(
261 PVR2_TRACE_ERROR_LEGS,
262 "Encoder command: 0x%02x",cmd);
263 for (idx = 4; idx < arg_cnt_send; idx++) {
264 pvr2_trace(
265 PVR2_TRACE_ERROR_LEGS,
266 "Encoder arg%d: 0x%08x",
267 idx-3,wrData[idx]);
268 }
269 ret = -EBUSY;
270 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300271 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300272 if (retry_flag) {
273 if (try_count < 20) continue;
274 pvr2_trace(
275 PVR2_TRACE_ERROR_LEGS,
276 "Too many retries...");
277 ret = -EBUSY;
278 }
279 if (ret) {
Mike Iselyd913d632008-04-06 04:04:35 -0300280 del_timer_sync(&hdw->encoder_run_timer);
Mike Isely681c7392007-11-26 01:48:52 -0300281 hdw->state_encoder_ok = 0;
282 pvr2_trace(PVR2_TRACE_STBITS,
283 "State bit %s <-- %s",
284 "state_encoder_ok",
285 (hdw->state_encoder_ok ? "true" : "false"));
Mike Iselyd913d632008-04-06 04:04:35 -0300286 if (hdw->state_encoder_runok) {
287 hdw->state_encoder_runok = 0;
288 pvr2_trace(PVR2_TRACE_STBITS,
289 "State bit %s <-- %s",
290 "state_encoder_runok",
291 (hdw->state_encoder_runok ?
292 "true" : "false"));
293 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300294 pvr2_trace(
295 PVR2_TRACE_ERROR_LEGS,
296 "Giving up on command."
Mike Isely1b331852009-10-12 00:18:13 -0300297 " This is normally recovered via a firmware"
298 " reload and re-initialization; concern"
299 " is only warranted if this happens repeatedly"
300 " and rapidly.");
Mike Iselyc43000e2007-01-28 15:41:12 -0300301 break;
302 }
Mike Iselyd8554972006-06-26 20:58:46 -0300303 wrData[0] = 0x7;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300304 for (idx = 0; idx < arg_cnt_recv; idx++) {
305 argp[idx] = rdData[idx+4];
Mike Iselyd8554972006-06-26 20:58:46 -0300306 }
307
308 wrData[0] = 0x0;
Mike Iselyc43000e2007-01-28 15:41:12 -0300309 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
Mike Iselyd8554972006-06-26 20:58:46 -0300310 if (ret) break;
311
312 } while(0); LOCK_GIVE(hdw->ctl_lock);
313
314 return ret;
315}
316
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300317
318static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
319 int args, ...)
320{
321 va_list vl;
322 unsigned int idx;
323 u32 data[12];
324
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300325 if (args > ARRAY_SIZE(data)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300326 pvr2_trace(
327 PVR2_TRACE_ERROR_LEGS,
328 "Failed to write cx23416 command"
329 " - too many arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300330 " (was given %u limit %lu)",
331 args, (long unsigned) ARRAY_SIZE(data));
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300332 return -EINVAL;
333 }
334
335 va_start(vl, args);
336 for (idx = 0; idx < args; idx++) {
337 data[idx] = va_arg(vl, u32);
338 }
339 va_end(vl);
340
341 return pvr2_encoder_cmd(hdw,cmd,args,0,data);
342}
343
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300344
345/* This implements some extra setup for the encoder that seems to be
346 specific to the PVR USB2 hardware. */
Adrian Bunk5948e522007-04-27 12:31:05 -0300347static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300348{
349 int ret = 0;
350 int encMisc3Arg = 0;
351
352#if 0
Janne Grunaue86da6f2009-03-19 19:00:35 -0300353 /* This inexplicable bit happens in the Hauppauge windows
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300354 driver (for both 24xxx and 29xxx devices). However I
355 currently see no difference in behavior with or without
356 this stuff. Leave this here as a note of its existence,
357 but don't use it. */
358 LOCK_TAKE(hdw->ctl_lock); do {
359 u32 dat[1];
360 dat[0] = 0x80000640;
361 pvr2_encoder_write_words(hdw,0x01fe,dat,1);
362 pvr2_encoder_write_words(hdw,0x023e,dat,1);
363 } while(0); LOCK_GIVE(hdw->ctl_lock);
364#endif
365
366 /* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
367 sends the following list of ENC_MISC commands (for both
368 24xxx and 29xxx devices). Meanings are not entirely clear,
369 however without the ENC_MISC(3,1) command then we risk
370 random perpetual video corruption whenever the video input
371 breaks up for a moment (like when switching channels). */
372
373
374#if 0
375 /* This ENC_MISC(5,0) command seems to hurt 29xxx sync
376 performance on channel changes, but is not a problem on
377 24xxx devices. */
378 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
379#endif
380
381 /* This ENC_MISC(3,encMisc3Arg) command is critical - without
382 it there will eventually be video corruption. Also, the
Mike Isely989eb152007-11-26 01:53:12 -0300383 saa7115 case is strange - the Windows driver is passing 1
384 regardless of device type but if we have 1 for saa7115
385 devices the video turns sluggish. */
386 if (hdw->hdw_desc->flag_has_cx25840) {
387 encMisc3Arg = 1;
388 } else {
389 encMisc3Arg = 0;
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300390 }
391 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
392 encMisc3Arg,0,0);
393
394 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
395
396#if 0
397 /* This ENC_MISC(4,1) command is poisonous, so it is commented
398 out. But I'm leaving it here anyway to document its
399 existence in the Windows driver. The effect of this
400 command is that apps displaying the stream become sluggish
401 with stuttering video. */
402 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
403#endif
404
405 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
406 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
407
Boris Dores3f93d1a2008-10-19 17:00:30 -0300408 /* prevent the PTSs from slowly drifting away in the generated
409 MPEG stream */
410 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1);
411
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300412 return ret;
413}
414
Mike Isely681c7392007-11-26 01:48:52 -0300415int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
416{
417 int ret;
418 ret = cx2341x_update(hdw,pvr2_encoder_cmd,
419 (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
420 &hdw->enc_ctl_state);
421 if (ret) {
422 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
423 "Error from cx2341x module code=%d",ret);
424 } else {
425 memcpy(&hdw->enc_cur_state,&hdw->enc_ctl_state,
426 sizeof(struct cx2341x_mpeg_params));
427 hdw->enc_cur_valid = !0;
428 }
429 return ret;
430}
431
432
Mike Iselyd8554972006-06-26 20:58:46 -0300433int pvr2_encoder_configure(struct pvr2_hdw *hdw)
434{
Mike Iselyb30d2442006-06-25 20:05:01 -0300435 int ret;
Mike Iselydb71b7d2007-04-28 20:08:33 -0300436 int val;
Mike Iselyb30d2442006-06-25 20:05:01 -0300437 pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
438 " (cx2341x module)");
439 hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
440 hdw->enc_ctl_state.width = hdw->res_hor_val;
441 hdw->enc_ctl_state.height = hdw->res_ver_val;
Mike Iselydb71b7d2007-04-28 20:08:33 -0300442 hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
Mike Iselyb30d2442006-06-25 20:05:01 -0300443 0 : 1);
Mike Iselyd8554972006-06-26 20:58:46 -0300444
Mike Iselyb30d2442006-06-25 20:05:01 -0300445 ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300446
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300447 ret |= pvr2_encoder_prep_config(hdw);
448
Mike Iselydb71b7d2007-04-28 20:08:33 -0300449 /* saa7115: 0xf0 */
450 val = 0xf0;
Mike Isely989eb152007-11-26 01:53:12 -0300451 if (hdw->hdw_desc->flag_has_cx25840) {
Mike Iselydb71b7d2007-04-28 20:08:33 -0300452 /* ivtv cx25840: 0x140 */
453 val = 0x140;
454 }
455
Mike Iselyb30d2442006-06-25 20:05:01 -0300456 if (!ret) ret = pvr2_encoder_vcmd(
457 hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
Mike Iselydb71b7d2007-04-28 20:08:33 -0300458 val, val);
Mike Iselyd8554972006-06-26 20:58:46 -0300459
460 /* setup firmware to notify us about some events (don't know why...) */
Mike Iselyb30d2442006-06-25 20:05:01 -0300461 if (!ret) ret = pvr2_encoder_vcmd(
462 hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
463 0, 0, 0x10000000, 0xffffffff);
Mike Iselyd8554972006-06-26 20:58:46 -0300464
Mike Iselyb30d2442006-06-25 20:05:01 -0300465 if (!ret) ret = pvr2_encoder_vcmd(
466 hdw,CX2341X_ENC_SET_VBI_LINE, 5,
467 0xffffffff,0,0,0,0);
Mike Iselyd8554972006-06-26 20:58:46 -0300468
Mike Iselyb30d2442006-06-25 20:05:01 -0300469 if (ret) {
470 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
Mauro Carvalho Chehab58f56cb2006-08-30 05:44:31 -0300471 "Failed to configure cx23416");
Mike Iselyb30d2442006-06-25 20:05:01 -0300472 return ret;
Mike Iselyd8554972006-06-26 20:58:46 -0300473 }
474
Mike Isely681c7392007-11-26 01:48:52 -0300475 ret = pvr2_encoder_adjust(hdw);
476 if (ret) return ret;
Mike Iselyd8554972006-06-26 20:58:46 -0300477
Mike Isely681c7392007-11-26 01:48:52 -0300478 ret = pvr2_encoder_vcmd(
Mike Iselyb30d2442006-06-25 20:05:01 -0300479 hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
480
481 if (ret) {
482 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
Mauro Carvalho Chehab58f56cb2006-08-30 05:44:31 -0300483 "Failed to initialize cx23416 video input");
Mike Iselyb30d2442006-06-25 20:05:01 -0300484 return ret;
485 }
486
Mike Iselyb30d2442006-06-25 20:05:01 -0300487 return 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300488}
489
Mike Iselyb30d2442006-06-25 20:05:01 -0300490
Mike Iselyd8554972006-06-26 20:58:46 -0300491int pvr2_encoder_start(struct pvr2_hdw *hdw)
492{
493 int status;
494
495 /* unmask some interrupts */
496 pvr2_write_register(hdw, 0x0048, 0xbfffffff);
497
Pantelis Koukousoulas275b2e22006-12-27 23:05:19 -0300498 pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
499 hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
500
Mike Isely681c7392007-11-26 01:48:52 -0300501 switch (hdw->active_stream_type) {
Mike Isely16eb40d2006-12-30 18:27:32 -0300502 case pvr2_config_vbi:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300503 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
504 0x01,0x14);
Mike Isely16eb40d2006-12-30 18:27:32 -0300505 break;
506 case pvr2_config_mpeg:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300507 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
508 0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300509 break;
510 default: /* Unhandled cases for now */
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300511 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
512 0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300513 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300514 }
Mike Iselyd8554972006-06-26 20:58:46 -0300515 return status;
516}
517
518int pvr2_encoder_stop(struct pvr2_hdw *hdw)
519{
520 int status;
521
522 /* mask all interrupts */
523 pvr2_write_register(hdw, 0x0048, 0xffffffff);
524
Mike Isely681c7392007-11-26 01:48:52 -0300525 switch (hdw->active_stream_type) {
Mike Isely16eb40d2006-12-30 18:27:32 -0300526 case pvr2_config_vbi:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300527 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
528 0x01,0x01,0x14);
Mike Isely16eb40d2006-12-30 18:27:32 -0300529 break;
530 case pvr2_config_mpeg:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300531 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
532 0x01,0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300533 break;
534 default: /* Unhandled cases for now */
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300535 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
536 0x01,0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300537 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300538 }
539
Mike Iselyd8554972006-06-26 20:58:46 -0300540 return status;
541}
542
543
544/*
545 Stuff for Emacs to see, in order to encourage consistent editing style:
546 *** Local Variables: ***
547 *** mode: c ***
548 *** fill-column: 70 ***
549 *** tab-width: 8 ***
550 *** c-basic-offset: 8 ***
551 *** End: ***
552 */