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Michael Buesche4d6b792007-09-18 15:39:42 -04001/*
2
3 Broadcom B43 wireless driver
4
5 Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
Stefano Brivio1f21ad22007-11-06 22:49:20 +01006 Copyright (c) 2005 Stefano Brivio <stefano.brivio@polimi.it>
Michael Buesch060210f2009-01-25 15:49:59 +01007 Copyright (c) 2005-2009 Michael Buesch <mb@bu3sch.de>
Michael Buesche4d6b792007-09-18 15:39:42 -04008 Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10
Albert Herranz3dbba8e2009-09-10 19:34:49 +020011 SDIO support
12 Copyright (c) 2009 Albert Herranz <albert_herranz@yahoo.es>
13
Michael Buesche4d6b792007-09-18 15:39:42 -040014 Some parts of the code in this file are derived from the ipw2200
15 driver Copyright(c) 2003 - 2004 Intel Corporation.
16
17 This program is free software; you can redistribute it and/or modify
18 it under the terms of the GNU General Public License as published by
19 the Free Software Foundation; either version 2 of the License, or
20 (at your option) any later version.
21
22 This program is distributed in the hope that it will be useful,
23 but WITHOUT ANY WARRANTY; without even the implied warranty of
24 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 GNU General Public License for more details.
26
27 You should have received a copy of the GNU General Public License
28 along with this program; see the file COPYING. If not, write to
29 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
30 Boston, MA 02110-1301, USA.
31
32*/
33
34#include <linux/delay.h>
35#include <linux/init.h>
36#include <linux/moduleparam.h>
37#include <linux/if_arp.h>
38#include <linux/etherdevice.h>
Michael Buesche4d6b792007-09-18 15:39:42 -040039#include <linux/firmware.h>
40#include <linux/wireless.h>
41#include <linux/workqueue.h>
42#include <linux/skbuff.h>
Andrew Morton96cf49a2008-02-04 22:27:19 -080043#include <linux/io.h>
Michael Buesche4d6b792007-09-18 15:39:42 -040044#include <linux/dma-mapping.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090045#include <linux/slab.h>
Michael Buesche4d6b792007-09-18 15:39:42 -040046#include <asm/unaligned.h>
47
48#include "b43.h"
49#include "main.h"
50#include "debugfs.h"
Michael Bueschef1a6282008-08-27 18:53:02 +020051#include "phy_common.h"
52#include "phy_g.h"
Michael Buesch3d0da752008-08-30 02:27:19 +020053#include "phy_n.h"
Michael Buesche4d6b792007-09-18 15:39:42 -040054#include "dma.h"
Michael Buesch5100d5a2008-03-29 21:01:16 +010055#include "pio.h"
Michael Buesche4d6b792007-09-18 15:39:42 -040056#include "sysfs.h"
57#include "xmit.h"
Michael Buesche4d6b792007-09-18 15:39:42 -040058#include "lo.h"
59#include "pcmcia.h"
Albert Herranz3dbba8e2009-09-10 19:34:49 +020060#include "sdio.h"
61#include <linux/mmc/sdio_func.h>
Michael Buesche4d6b792007-09-18 15:39:42 -040062
63MODULE_DESCRIPTION("Broadcom B43 wireless driver");
64MODULE_AUTHOR("Martin Langer");
65MODULE_AUTHOR("Stefano Brivio");
66MODULE_AUTHOR("Michael Buesch");
Gábor Stefanik0136e512009-08-28 22:32:17 +020067MODULE_AUTHOR("Gábor Stefanik");
Michael Buesche4d6b792007-09-18 15:39:42 -040068MODULE_LICENSE("GPL");
69
Michael Buesch9c7d99d2008-02-09 10:23:49 +010070MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID);
Tim Gardner6021e082010-01-07 11:10:38 -070071MODULE_FIRMWARE("b43/ucode11.fw");
72MODULE_FIRMWARE("b43/ucode13.fw");
73MODULE_FIRMWARE("b43/ucode14.fw");
74MODULE_FIRMWARE("b43/ucode15.fw");
75MODULE_FIRMWARE("b43/ucode5.fw");
76MODULE_FIRMWARE("b43/ucode9.fw");
Michael Buesche4d6b792007-09-18 15:39:42 -040077
78static int modparam_bad_frames_preempt;
79module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
80MODULE_PARM_DESC(bad_frames_preempt,
81 "enable(1) / disable(0) Bad Frames Preemption");
82
Michael Buesche4d6b792007-09-18 15:39:42 -040083static char modparam_fwpostfix[16];
84module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
85MODULE_PARM_DESC(fwpostfix, "Postfix for the .fw files to load.");
86
Michael Buesche4d6b792007-09-18 15:39:42 -040087static int modparam_hwpctl;
88module_param_named(hwpctl, modparam_hwpctl, int, 0444);
89MODULE_PARM_DESC(hwpctl, "Enable hardware-side power control (default off)");
90
91static int modparam_nohwcrypt;
92module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
93MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
94
gregor kowski035d0242009-08-19 22:35:45 +020095static int modparam_hwtkip;
96module_param_named(hwtkip, modparam_hwtkip, int, 0444);
97MODULE_PARM_DESC(hwtkip, "Enable hardware tkip.");
98
Michael Buesch403a3a12009-06-08 21:04:57 +020099static int modparam_qos = 1;
100module_param_named(qos, modparam_qos, int, 0444);
Michael Buesche6f5b932008-03-05 21:18:49 +0100101MODULE_PARM_DESC(qos, "Enable QOS support (default on)");
102
Michael Buesch1855ba72008-04-18 20:51:41 +0200103static int modparam_btcoex = 1;
104module_param_named(btcoex, modparam_btcoex, int, 0444);
Gábor Stefanikc71dbd32009-08-28 22:34:21 +0200105MODULE_PARM_DESC(btcoex, "Enable Bluetooth coexistence (default on)");
Michael Buesch1855ba72008-04-18 20:51:41 +0200106
Michael Buesch060210f2009-01-25 15:49:59 +0100107int b43_modparam_verbose = B43_VERBOSITY_DEFAULT;
108module_param_named(verbose, b43_modparam_verbose, int, 0644);
109MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug");
110
John W. Linville41950bd2010-07-21 11:37:19 -0400111static int b43_modparam_pio = B43_PIO_DEFAULT;
Linus Torvalds9e3bd912010-02-26 10:34:27 -0800112module_param_named(pio, b43_modparam_pio, int, 0644);
113MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
Michael Buesche6f5b932008-03-05 21:18:49 +0100114
Michael Buesche4d6b792007-09-18 15:39:42 -0400115static const struct ssb_device_id b43_ssb_tbl[] = {
116 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5),
117 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 6),
118 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 7),
119 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
120 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
Michael Bueschd5c71e42008-01-04 17:06:29 +0100121 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 11),
Rafał Miłecki003d6d22010-01-15 12:10:53 +0100122 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 12),
Larry Finger013978b2007-11-26 10:29:47 -0600123 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
Michael Buesch6b1c7c62008-12-25 00:39:28 +0100124 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 15),
Johannes Berg92d61282008-12-24 12:44:09 +0100125 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16),
Michael Buesche4d6b792007-09-18 15:39:42 -0400126 SSB_DEVTABLE_END
127};
128
129MODULE_DEVICE_TABLE(ssb, b43_ssb_tbl);
130
131/* Channel and ratetables are shared for all devices.
132 * They can't be const, because ieee80211 puts some precalculated
133 * data in there. This data is the same for all devices, so we don't
134 * get concurrency issues */
135#define RATETAB_ENT(_rateid, _flags) \
Johannes Berg8318d782008-01-24 19:38:38 +0100136 { \
137 .bitrate = B43_RATE_TO_BASE100KBPS(_rateid), \
138 .hw_value = (_rateid), \
139 .flags = (_flags), \
Michael Buesche4d6b792007-09-18 15:39:42 -0400140 }
Johannes Berg8318d782008-01-24 19:38:38 +0100141
142/*
143 * NOTE: When changing this, sync with xmit.c's
144 * b43_plcp_get_bitrate_idx_* functions!
145 */
Michael Buesche4d6b792007-09-18 15:39:42 -0400146static struct ieee80211_rate __b43_ratetable[] = {
Johannes Berg8318d782008-01-24 19:38:38 +0100147 RATETAB_ENT(B43_CCK_RATE_1MB, 0),
148 RATETAB_ENT(B43_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
149 RATETAB_ENT(B43_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
150 RATETAB_ENT(B43_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
151 RATETAB_ENT(B43_OFDM_RATE_6MB, 0),
152 RATETAB_ENT(B43_OFDM_RATE_9MB, 0),
153 RATETAB_ENT(B43_OFDM_RATE_12MB, 0),
154 RATETAB_ENT(B43_OFDM_RATE_18MB, 0),
155 RATETAB_ENT(B43_OFDM_RATE_24MB, 0),
156 RATETAB_ENT(B43_OFDM_RATE_36MB, 0),
157 RATETAB_ENT(B43_OFDM_RATE_48MB, 0),
158 RATETAB_ENT(B43_OFDM_RATE_54MB, 0),
Michael Buesche4d6b792007-09-18 15:39:42 -0400159};
160
161#define b43_a_ratetable (__b43_ratetable + 4)
162#define b43_a_ratetable_size 8
163#define b43_b_ratetable (__b43_ratetable + 0)
164#define b43_b_ratetable_size 4
165#define b43_g_ratetable (__b43_ratetable + 0)
166#define b43_g_ratetable_size 12
167
Michael Bueschbb1eeff2008-02-09 12:08:58 +0100168#define CHAN4G(_channel, _freq, _flags) { \
169 .band = IEEE80211_BAND_2GHZ, \
170 .center_freq = (_freq), \
171 .hw_value = (_channel), \
172 .flags = (_flags), \
173 .max_antenna_gain = 0, \
174 .max_power = 30, \
175}
Michael Buesch96c755a2008-01-06 00:09:46 +0100176static struct ieee80211_channel b43_2ghz_chantable[] = {
Michael Bueschbb1eeff2008-02-09 12:08:58 +0100177 CHAN4G(1, 2412, 0),
178 CHAN4G(2, 2417, 0),
179 CHAN4G(3, 2422, 0),
180 CHAN4G(4, 2427, 0),
181 CHAN4G(5, 2432, 0),
182 CHAN4G(6, 2437, 0),
183 CHAN4G(7, 2442, 0),
184 CHAN4G(8, 2447, 0),
185 CHAN4G(9, 2452, 0),
186 CHAN4G(10, 2457, 0),
187 CHAN4G(11, 2462, 0),
188 CHAN4G(12, 2467, 0),
189 CHAN4G(13, 2472, 0),
190 CHAN4G(14, 2484, 0),
191};
192#undef CHAN4G
193
194#define CHAN5G(_channel, _flags) { \
195 .band = IEEE80211_BAND_5GHZ, \
196 .center_freq = 5000 + (5 * (_channel)), \
197 .hw_value = (_channel), \
198 .flags = (_flags), \
199 .max_antenna_gain = 0, \
200 .max_power = 30, \
201}
202static struct ieee80211_channel b43_5ghz_nphy_chantable[] = {
203 CHAN5G(32, 0), CHAN5G(34, 0),
204 CHAN5G(36, 0), CHAN5G(38, 0),
205 CHAN5G(40, 0), CHAN5G(42, 0),
206 CHAN5G(44, 0), CHAN5G(46, 0),
207 CHAN5G(48, 0), CHAN5G(50, 0),
208 CHAN5G(52, 0), CHAN5G(54, 0),
209 CHAN5G(56, 0), CHAN5G(58, 0),
210 CHAN5G(60, 0), CHAN5G(62, 0),
211 CHAN5G(64, 0), CHAN5G(66, 0),
212 CHAN5G(68, 0), CHAN5G(70, 0),
213 CHAN5G(72, 0), CHAN5G(74, 0),
214 CHAN5G(76, 0), CHAN5G(78, 0),
215 CHAN5G(80, 0), CHAN5G(82, 0),
216 CHAN5G(84, 0), CHAN5G(86, 0),
217 CHAN5G(88, 0), CHAN5G(90, 0),
218 CHAN5G(92, 0), CHAN5G(94, 0),
219 CHAN5G(96, 0), CHAN5G(98, 0),
220 CHAN5G(100, 0), CHAN5G(102, 0),
221 CHAN5G(104, 0), CHAN5G(106, 0),
222 CHAN5G(108, 0), CHAN5G(110, 0),
223 CHAN5G(112, 0), CHAN5G(114, 0),
224 CHAN5G(116, 0), CHAN5G(118, 0),
225 CHAN5G(120, 0), CHAN5G(122, 0),
226 CHAN5G(124, 0), CHAN5G(126, 0),
227 CHAN5G(128, 0), CHAN5G(130, 0),
228 CHAN5G(132, 0), CHAN5G(134, 0),
229 CHAN5G(136, 0), CHAN5G(138, 0),
230 CHAN5G(140, 0), CHAN5G(142, 0),
231 CHAN5G(144, 0), CHAN5G(145, 0),
232 CHAN5G(146, 0), CHAN5G(147, 0),
233 CHAN5G(148, 0), CHAN5G(149, 0),
234 CHAN5G(150, 0), CHAN5G(151, 0),
235 CHAN5G(152, 0), CHAN5G(153, 0),
236 CHAN5G(154, 0), CHAN5G(155, 0),
237 CHAN5G(156, 0), CHAN5G(157, 0),
238 CHAN5G(158, 0), CHAN5G(159, 0),
239 CHAN5G(160, 0), CHAN5G(161, 0),
240 CHAN5G(162, 0), CHAN5G(163, 0),
241 CHAN5G(164, 0), CHAN5G(165, 0),
242 CHAN5G(166, 0), CHAN5G(168, 0),
243 CHAN5G(170, 0), CHAN5G(172, 0),
244 CHAN5G(174, 0), CHAN5G(176, 0),
245 CHAN5G(178, 0), CHAN5G(180, 0),
246 CHAN5G(182, 0), CHAN5G(184, 0),
247 CHAN5G(186, 0), CHAN5G(188, 0),
248 CHAN5G(190, 0), CHAN5G(192, 0),
249 CHAN5G(194, 0), CHAN5G(196, 0),
250 CHAN5G(198, 0), CHAN5G(200, 0),
251 CHAN5G(202, 0), CHAN5G(204, 0),
252 CHAN5G(206, 0), CHAN5G(208, 0),
253 CHAN5G(210, 0), CHAN5G(212, 0),
254 CHAN5G(214, 0), CHAN5G(216, 0),
255 CHAN5G(218, 0), CHAN5G(220, 0),
256 CHAN5G(222, 0), CHAN5G(224, 0),
257 CHAN5G(226, 0), CHAN5G(228, 0),
Michael Buesche4d6b792007-09-18 15:39:42 -0400258};
259
Michael Bueschbb1eeff2008-02-09 12:08:58 +0100260static struct ieee80211_channel b43_5ghz_aphy_chantable[] = {
261 CHAN5G(34, 0), CHAN5G(36, 0),
262 CHAN5G(38, 0), CHAN5G(40, 0),
263 CHAN5G(42, 0), CHAN5G(44, 0),
264 CHAN5G(46, 0), CHAN5G(48, 0),
265 CHAN5G(52, 0), CHAN5G(56, 0),
266 CHAN5G(60, 0), CHAN5G(64, 0),
267 CHAN5G(100, 0), CHAN5G(104, 0),
268 CHAN5G(108, 0), CHAN5G(112, 0),
269 CHAN5G(116, 0), CHAN5G(120, 0),
270 CHAN5G(124, 0), CHAN5G(128, 0),
271 CHAN5G(132, 0), CHAN5G(136, 0),
272 CHAN5G(140, 0), CHAN5G(149, 0),
273 CHAN5G(153, 0), CHAN5G(157, 0),
274 CHAN5G(161, 0), CHAN5G(165, 0),
275 CHAN5G(184, 0), CHAN5G(188, 0),
276 CHAN5G(192, 0), CHAN5G(196, 0),
277 CHAN5G(200, 0), CHAN5G(204, 0),
278 CHAN5G(208, 0), CHAN5G(212, 0),
279 CHAN5G(216, 0),
280};
281#undef CHAN5G
282
283static struct ieee80211_supported_band b43_band_5GHz_nphy = {
284 .band = IEEE80211_BAND_5GHZ,
285 .channels = b43_5ghz_nphy_chantable,
286 .n_channels = ARRAY_SIZE(b43_5ghz_nphy_chantable),
287 .bitrates = b43_a_ratetable,
288 .n_bitrates = b43_a_ratetable_size,
Michael Buesche4d6b792007-09-18 15:39:42 -0400289};
Johannes Berg8318d782008-01-24 19:38:38 +0100290
Michael Bueschbb1eeff2008-02-09 12:08:58 +0100291static struct ieee80211_supported_band b43_band_5GHz_aphy = {
292 .band = IEEE80211_BAND_5GHZ,
293 .channels = b43_5ghz_aphy_chantable,
294 .n_channels = ARRAY_SIZE(b43_5ghz_aphy_chantable),
295 .bitrates = b43_a_ratetable,
296 .n_bitrates = b43_a_ratetable_size,
Johannes Berg8318d782008-01-24 19:38:38 +0100297};
Michael Buesche4d6b792007-09-18 15:39:42 -0400298
Johannes Berg8318d782008-01-24 19:38:38 +0100299static struct ieee80211_supported_band b43_band_2GHz = {
Michael Bueschbb1eeff2008-02-09 12:08:58 +0100300 .band = IEEE80211_BAND_2GHZ,
301 .channels = b43_2ghz_chantable,
302 .n_channels = ARRAY_SIZE(b43_2ghz_chantable),
303 .bitrates = b43_g_ratetable,
304 .n_bitrates = b43_g_ratetable_size,
Johannes Berg8318d782008-01-24 19:38:38 +0100305};
306
Michael Buesche4d6b792007-09-18 15:39:42 -0400307static void b43_wireless_core_exit(struct b43_wldev *dev);
308static int b43_wireless_core_init(struct b43_wldev *dev);
Michael Buesch36dbd952009-09-04 22:51:29 +0200309static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev);
Michael Buesche4d6b792007-09-18 15:39:42 -0400310static int b43_wireless_core_start(struct b43_wldev *dev);
311
312static int b43_ratelimit(struct b43_wl *wl)
313{
314 if (!wl || !wl->current_dev)
315 return 1;
316 if (b43_status(wl->current_dev) < B43_STAT_STARTED)
317 return 1;
318 /* We are up and running.
319 * Ratelimit the messages to avoid DoS over the net. */
320 return net_ratelimit();
321}
322
323void b43info(struct b43_wl *wl, const char *fmt, ...)
324{
Joe Perches5b736d42010-11-09 16:35:18 -0800325 struct va_format vaf;
Michael Buesche4d6b792007-09-18 15:39:42 -0400326 va_list args;
327
Michael Buesch060210f2009-01-25 15:49:59 +0100328 if (b43_modparam_verbose < B43_VERBOSITY_INFO)
329 return;
Michael Buesche4d6b792007-09-18 15:39:42 -0400330 if (!b43_ratelimit(wl))
331 return;
Joe Perches5b736d42010-11-09 16:35:18 -0800332
Michael Buesche4d6b792007-09-18 15:39:42 -0400333 va_start(args, fmt);
Joe Perches5b736d42010-11-09 16:35:18 -0800334
335 vaf.fmt = fmt;
336 vaf.va = &args;
337
338 printk(KERN_INFO "b43-%s: %pV",
339 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
340
Michael Buesche4d6b792007-09-18 15:39:42 -0400341 va_end(args);
342}
343
344void b43err(struct b43_wl *wl, const char *fmt, ...)
345{
Joe Perches5b736d42010-11-09 16:35:18 -0800346 struct va_format vaf;
Michael Buesche4d6b792007-09-18 15:39:42 -0400347 va_list args;
348
Michael Buesch060210f2009-01-25 15:49:59 +0100349 if (b43_modparam_verbose < B43_VERBOSITY_ERROR)
350 return;
Michael Buesche4d6b792007-09-18 15:39:42 -0400351 if (!b43_ratelimit(wl))
352 return;
Joe Perches5b736d42010-11-09 16:35:18 -0800353
Michael Buesche4d6b792007-09-18 15:39:42 -0400354 va_start(args, fmt);
Joe Perches5b736d42010-11-09 16:35:18 -0800355
356 vaf.fmt = fmt;
357 vaf.va = &args;
358
359 printk(KERN_ERR "b43-%s ERROR: %pV",
360 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
361
Michael Buesche4d6b792007-09-18 15:39:42 -0400362 va_end(args);
363}
364
365void b43warn(struct b43_wl *wl, const char *fmt, ...)
366{
Joe Perches5b736d42010-11-09 16:35:18 -0800367 struct va_format vaf;
Michael Buesche4d6b792007-09-18 15:39:42 -0400368 va_list args;
369
Michael Buesch060210f2009-01-25 15:49:59 +0100370 if (b43_modparam_verbose < B43_VERBOSITY_WARN)
371 return;
Michael Buesche4d6b792007-09-18 15:39:42 -0400372 if (!b43_ratelimit(wl))
373 return;
Joe Perches5b736d42010-11-09 16:35:18 -0800374
Michael Buesche4d6b792007-09-18 15:39:42 -0400375 va_start(args, fmt);
Joe Perches5b736d42010-11-09 16:35:18 -0800376
377 vaf.fmt = fmt;
378 vaf.va = &args;
379
380 printk(KERN_WARNING "b43-%s warning: %pV",
381 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
382
Michael Buesche4d6b792007-09-18 15:39:42 -0400383 va_end(args);
384}
385
Michael Buesche4d6b792007-09-18 15:39:42 -0400386void b43dbg(struct b43_wl *wl, const char *fmt, ...)
387{
Joe Perches5b736d42010-11-09 16:35:18 -0800388 struct va_format vaf;
Michael Buesche4d6b792007-09-18 15:39:42 -0400389 va_list args;
390
Michael Buesch060210f2009-01-25 15:49:59 +0100391 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
392 return;
Joe Perches5b736d42010-11-09 16:35:18 -0800393
Michael Buesche4d6b792007-09-18 15:39:42 -0400394 va_start(args, fmt);
Joe Perches5b736d42010-11-09 16:35:18 -0800395
396 vaf.fmt = fmt;
397 vaf.va = &args;
398
399 printk(KERN_DEBUG "b43-%s debug: %pV",
400 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
401
Michael Buesche4d6b792007-09-18 15:39:42 -0400402 va_end(args);
403}
Michael Buesche4d6b792007-09-18 15:39:42 -0400404
405static void b43_ram_write(struct b43_wldev *dev, u16 offset, u32 val)
406{
407 u32 macctl;
408
409 B43_WARN_ON(offset % 4 != 0);
410
411 macctl = b43_read32(dev, B43_MMIO_MACCTL);
412 if (macctl & B43_MACCTL_BE)
413 val = swab32(val);
414
415 b43_write32(dev, B43_MMIO_RAM_CONTROL, offset);
416 mmiowb();
417 b43_write32(dev, B43_MMIO_RAM_DATA, val);
418}
419
Michael Buesch280d0e12007-12-26 18:26:17 +0100420static inline void b43_shm_control_word(struct b43_wldev *dev,
421 u16 routing, u16 offset)
Michael Buesche4d6b792007-09-18 15:39:42 -0400422{
423 u32 control;
424
425 /* "offset" is the WORD offset. */
Michael Buesche4d6b792007-09-18 15:39:42 -0400426 control = routing;
427 control <<= 16;
428 control |= offset;
429 b43_write32(dev, B43_MMIO_SHM_CONTROL, control);
430}
431
Michael Buesch69eddc82009-09-04 22:57:26 +0200432u32 b43_shm_read32(struct b43_wldev *dev, u16 routing, u16 offset)
Michael Buesche4d6b792007-09-18 15:39:42 -0400433{
434 u32 ret;
435
436 if (routing == B43_SHM_SHARED) {
437 B43_WARN_ON(offset & 0x0001);
438 if (offset & 0x0003) {
439 /* Unaligned access */
440 b43_shm_control_word(dev, routing, offset >> 2);
441 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED);
Michael Buesche4d6b792007-09-18 15:39:42 -0400442 b43_shm_control_word(dev, routing, (offset >> 2) + 1);
Michael Bueschf62ae6c2009-07-31 20:51:41 +0200443 ret |= ((u32)b43_read16(dev, B43_MMIO_SHM_DATA)) << 16;
Michael Buesche4d6b792007-09-18 15:39:42 -0400444
Michael Buesch280d0e12007-12-26 18:26:17 +0100445 goto out;
Michael Buesche4d6b792007-09-18 15:39:42 -0400446 }
447 offset >>= 2;
448 }
449 b43_shm_control_word(dev, routing, offset);
450 ret = b43_read32(dev, B43_MMIO_SHM_DATA);
Michael Buesch280d0e12007-12-26 18:26:17 +0100451out:
Michael Buesch6bbc3212008-06-19 19:33:51 +0200452 return ret;
453}
454
Michael Buesch69eddc82009-09-04 22:57:26 +0200455u16 b43_shm_read16(struct b43_wldev *dev, u16 routing, u16 offset)
Michael Buesche4d6b792007-09-18 15:39:42 -0400456{
457 u16 ret;
458
459 if (routing == B43_SHM_SHARED) {
460 B43_WARN_ON(offset & 0x0001);
461 if (offset & 0x0003) {
462 /* Unaligned access */
463 b43_shm_control_word(dev, routing, offset >> 2);
464 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED);
465
Michael Buesch280d0e12007-12-26 18:26:17 +0100466 goto out;
Michael Buesche4d6b792007-09-18 15:39:42 -0400467 }
468 offset >>= 2;
469 }
470 b43_shm_control_word(dev, routing, offset);
471 ret = b43_read16(dev, B43_MMIO_SHM_DATA);
Michael Buesch280d0e12007-12-26 18:26:17 +0100472out:
Michael Buesch6bbc3212008-06-19 19:33:51 +0200473 return ret;
474}
475
Michael Buesch69eddc82009-09-04 22:57:26 +0200476void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value)
Michael Buesche4d6b792007-09-18 15:39:42 -0400477{
478 if (routing == B43_SHM_SHARED) {
479 B43_WARN_ON(offset & 0x0001);
480 if (offset & 0x0003) {
481 /* Unaligned access */
482 b43_shm_control_word(dev, routing, offset >> 2);
Michael Buesche4d6b792007-09-18 15:39:42 -0400483 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED,
Michael Bueschf62ae6c2009-07-31 20:51:41 +0200484 value & 0xFFFF);
Michael Buesche4d6b792007-09-18 15:39:42 -0400485 b43_shm_control_word(dev, routing, (offset >> 2) + 1);
Michael Bueschf62ae6c2009-07-31 20:51:41 +0200486 b43_write16(dev, B43_MMIO_SHM_DATA,
487 (value >> 16) & 0xFFFF);
Michael Buesch6bbc3212008-06-19 19:33:51 +0200488 return;
Michael Buesche4d6b792007-09-18 15:39:42 -0400489 }
490 offset >>= 2;
491 }
492 b43_shm_control_word(dev, routing, offset);
Michael Buesche4d6b792007-09-18 15:39:42 -0400493 b43_write32(dev, B43_MMIO_SHM_DATA, value);
Michael Buesch6bbc3212008-06-19 19:33:51 +0200494}
495
Michael Buesch69eddc82009-09-04 22:57:26 +0200496void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value)
Michael Buesch6bbc3212008-06-19 19:33:51 +0200497{
498 if (routing == B43_SHM_SHARED) {
499 B43_WARN_ON(offset & 0x0001);
500 if (offset & 0x0003) {
501 /* Unaligned access */
502 b43_shm_control_word(dev, routing, offset >> 2);
503 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, value);
504 return;
505 }
506 offset >>= 2;
507 }
508 b43_shm_control_word(dev, routing, offset);
509 b43_write16(dev, B43_MMIO_SHM_DATA, value);
510}
511
Michael Buesche4d6b792007-09-18 15:39:42 -0400512/* Read HostFlags */
John Daiker99da1852009-02-24 02:16:42 -0800513u64 b43_hf_read(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -0400514{
Michael Buesch35f0d352008-02-13 14:31:08 +0100515 u64 ret;
Michael Buesche4d6b792007-09-18 15:39:42 -0400516
517 ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI);
518 ret <<= 16;
Michael Buesch35f0d352008-02-13 14:31:08 +0100519 ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI);
520 ret <<= 16;
Michael Buesche4d6b792007-09-18 15:39:42 -0400521 ret |= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO);
522
523 return ret;
524}
525
526/* Write HostFlags */
Michael Buesch35f0d352008-02-13 14:31:08 +0100527void b43_hf_write(struct b43_wldev *dev, u64 value)
Michael Buesche4d6b792007-09-18 15:39:42 -0400528{
Michael Buesch35f0d352008-02-13 14:31:08 +0100529 u16 lo, mi, hi;
530
531 lo = (value & 0x00000000FFFFULL);
532 mi = (value & 0x0000FFFF0000ULL) >> 16;
533 hi = (value & 0xFFFF00000000ULL) >> 32;
534 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFLO, lo);
535 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFMI, mi);
536 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTFHI, hi);
Michael Buesche4d6b792007-09-18 15:39:42 -0400537}
538
Michael Buesch403a3a12009-06-08 21:04:57 +0200539/* Read the firmware capabilities bitmask (Opensource firmware only) */
540static u16 b43_fwcapa_read(struct b43_wldev *dev)
541{
542 B43_WARN_ON(!dev->fw.opensource);
543 return b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_FWCAPA);
544}
545
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100546void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
Michael Buesche4d6b792007-09-18 15:39:42 -0400547{
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100548 u32 low, high;
Michael Buesche4d6b792007-09-18 15:39:42 -0400549
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100550 B43_WARN_ON(dev->dev->id.revision < 3);
Michael Buesche4d6b792007-09-18 15:39:42 -0400551
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100552 /* The hardware guarantees us an atomic read, if we
553 * read the low register first. */
554 low = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_LOW);
555 high = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_HIGH);
Michael Buesche4d6b792007-09-18 15:39:42 -0400556
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100557 *tsf = high;
558 *tsf <<= 32;
559 *tsf |= low;
Michael Buesche4d6b792007-09-18 15:39:42 -0400560}
561
562static void b43_time_lock(struct b43_wldev *dev)
563{
564 u32 macctl;
565
566 macctl = b43_read32(dev, B43_MMIO_MACCTL);
567 macctl |= B43_MACCTL_TBTTHOLD;
568 b43_write32(dev, B43_MMIO_MACCTL, macctl);
569 /* Commit the write */
570 b43_read32(dev, B43_MMIO_MACCTL);
571}
572
573static void b43_time_unlock(struct b43_wldev *dev)
574{
575 u32 macctl;
576
577 macctl = b43_read32(dev, B43_MMIO_MACCTL);
578 macctl &= ~B43_MACCTL_TBTTHOLD;
579 b43_write32(dev, B43_MMIO_MACCTL, macctl);
580 /* Commit the write */
581 b43_read32(dev, B43_MMIO_MACCTL);
582}
583
584static void b43_tsf_write_locked(struct b43_wldev *dev, u64 tsf)
585{
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100586 u32 low, high;
Michael Buesche4d6b792007-09-18 15:39:42 -0400587
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100588 B43_WARN_ON(dev->dev->id.revision < 3);
Michael Buesche4d6b792007-09-18 15:39:42 -0400589
Michael Buesch3ebbbb52008-12-19 22:51:57 +0100590 low = tsf;
591 high = (tsf >> 32);
592 /* The hardware guarantees us an atomic write, if we
593 * write the low register first. */
594 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, low);
595 mmiowb();
596 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_HIGH, high);
597 mmiowb();
Michael Buesche4d6b792007-09-18 15:39:42 -0400598}
599
600void b43_tsf_write(struct b43_wldev *dev, u64 tsf)
601{
602 b43_time_lock(dev);
603 b43_tsf_write_locked(dev, tsf);
604 b43_time_unlock(dev);
605}
606
607static
John Daiker99da1852009-02-24 02:16:42 -0800608void b43_macfilter_set(struct b43_wldev *dev, u16 offset, const u8 *mac)
Michael Buesche4d6b792007-09-18 15:39:42 -0400609{
610 static const u8 zero_addr[ETH_ALEN] = { 0 };
611 u16 data;
612
613 if (!mac)
614 mac = zero_addr;
615
616 offset |= 0x0020;
617 b43_write16(dev, B43_MMIO_MACFILTER_CONTROL, offset);
618
619 data = mac[0];
620 data |= mac[1] << 8;
621 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
622 data = mac[2];
623 data |= mac[3] << 8;
624 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
625 data = mac[4];
626 data |= mac[5] << 8;
627 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data);
628}
629
630static void b43_write_mac_bssid_templates(struct b43_wldev *dev)
631{
632 const u8 *mac;
633 const u8 *bssid;
634 u8 mac_bssid[ETH_ALEN * 2];
635 int i;
636 u32 tmp;
637
638 bssid = dev->wl->bssid;
639 mac = dev->wl->mac_addr;
640
641 b43_macfilter_set(dev, B43_MACFILTER_BSSID, bssid);
642
643 memcpy(mac_bssid, mac, ETH_ALEN);
644 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
645
646 /* Write our MAC address and BSSID to template ram */
647 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
648 tmp = (u32) (mac_bssid[i + 0]);
649 tmp |= (u32) (mac_bssid[i + 1]) << 8;
650 tmp |= (u32) (mac_bssid[i + 2]) << 16;
651 tmp |= (u32) (mac_bssid[i + 3]) << 24;
652 b43_ram_write(dev, 0x20 + i, tmp);
653 }
654}
655
Johannes Berg4150c572007-09-17 01:29:23 -0400656static void b43_upload_card_macaddress(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -0400657{
Michael Buesche4d6b792007-09-18 15:39:42 -0400658 b43_write_mac_bssid_templates(dev);
Johannes Berg4150c572007-09-17 01:29:23 -0400659 b43_macfilter_set(dev, B43_MACFILTER_SELF, dev->wl->mac_addr);
Michael Buesche4d6b792007-09-18 15:39:42 -0400660}
661
662static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time)
663{
664 /* slot_time is in usec. */
Larry Fingerb6c3f5b2010-02-02 10:08:19 -0600665 /* This test used to exit for all but a G PHY. */
666 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
Michael Buesche4d6b792007-09-18 15:39:42 -0400667 return;
Larry Fingerb6c3f5b2010-02-02 10:08:19 -0600668 b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time);
669 /* Shared memory location 0x0010 is the slot time and should be
670 * set to slot_time; however, this register is initially 0 and changing
671 * the value adversely affects the transmit rate for BCM4311
672 * devices. Until this behavior is unterstood, delete this step
673 *
674 * b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
675 */
Michael Buesche4d6b792007-09-18 15:39:42 -0400676}
677
678static void b43_short_slot_timing_enable(struct b43_wldev *dev)
679{
680 b43_set_slot_time(dev, 9);
Michael Buesche4d6b792007-09-18 15:39:42 -0400681}
682
683static void b43_short_slot_timing_disable(struct b43_wldev *dev)
684{
685 b43_set_slot_time(dev, 20);
Michael Buesche4d6b792007-09-18 15:39:42 -0400686}
687
Michael Buesche4d6b792007-09-18 15:39:42 -0400688/* DummyTransmission function, as documented on
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200689 * http://bcm-v4.sipsolutions.net/802.11/DummyTransmission
Michael Buesche4d6b792007-09-18 15:39:42 -0400690 */
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200691void b43_dummy_transmission(struct b43_wldev *dev, bool ofdm, bool pa_on)
Michael Buesche4d6b792007-09-18 15:39:42 -0400692{
693 struct b43_phy *phy = &dev->phy;
694 unsigned int i, max_loop;
695 u16 value;
696 u32 buffer[5] = {
697 0x00000000,
698 0x00D40000,
699 0x00000000,
700 0x01000000,
701 0x00000000,
702 };
703
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200704 if (ofdm) {
Michael Buesche4d6b792007-09-18 15:39:42 -0400705 max_loop = 0x1E;
706 buffer[0] = 0x000201CC;
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200707 } else {
Michael Buesche4d6b792007-09-18 15:39:42 -0400708 max_loop = 0xFA;
709 buffer[0] = 0x000B846E;
Michael Buesche4d6b792007-09-18 15:39:42 -0400710 }
711
712 for (i = 0; i < 5; i++)
713 b43_ram_write(dev, i * 4, buffer[i]);
714
Michael Buesche4d6b792007-09-18 15:39:42 -0400715 b43_write16(dev, 0x0568, 0x0000);
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200716 if (dev->dev->id.revision < 11)
717 b43_write16(dev, 0x07C0, 0x0000);
718 else
719 b43_write16(dev, 0x07C0, 0x0100);
720 value = (ofdm ? 0x41 : 0x40);
Michael Buesche4d6b792007-09-18 15:39:42 -0400721 b43_write16(dev, 0x050C, value);
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200722 if ((phy->type == B43_PHYTYPE_N) || (phy->type == B43_PHYTYPE_LP))
723 b43_write16(dev, 0x0514, 0x1A02);
Michael Buesche4d6b792007-09-18 15:39:42 -0400724 b43_write16(dev, 0x0508, 0x0000);
725 b43_write16(dev, 0x050A, 0x0000);
726 b43_write16(dev, 0x054C, 0x0000);
727 b43_write16(dev, 0x056A, 0x0014);
728 b43_write16(dev, 0x0568, 0x0826);
729 b43_write16(dev, 0x0500, 0x0000);
Gábor Stefanik2f19c282009-08-13 16:51:51 +0200730 if (!pa_on && (phy->type == B43_PHYTYPE_N)) {
731 //SPEC TODO
732 }
733
734 switch (phy->type) {
735 case B43_PHYTYPE_N:
736 b43_write16(dev, 0x0502, 0x00D0);
737 break;
738 case B43_PHYTYPE_LP:
739 b43_write16(dev, 0x0502, 0x0050);
740 break;
741 default:
742 b43_write16(dev, 0x0502, 0x0030);
743 }
Michael Buesche4d6b792007-09-18 15:39:42 -0400744
745 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
746 b43_radio_write16(dev, 0x0051, 0x0017);
747 for (i = 0x00; i < max_loop; i++) {
748 value = b43_read16(dev, 0x050E);
749 if (value & 0x0080)
750 break;
751 udelay(10);
752 }
753 for (i = 0x00; i < 0x0A; i++) {
754 value = b43_read16(dev, 0x050E);
755 if (value & 0x0400)
756 break;
757 udelay(10);
758 }
Larry Finger1d280dd2008-09-29 14:19:29 -0500759 for (i = 0x00; i < 0x19; i++) {
Michael Buesche4d6b792007-09-18 15:39:42 -0400760 value = b43_read16(dev, 0x0690);
761 if (!(value & 0x0100))
762 break;
763 udelay(10);
764 }
765 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
766 b43_radio_write16(dev, 0x0051, 0x0037);
767}
768
769static void key_write(struct b43_wldev *dev,
John Daiker99da1852009-02-24 02:16:42 -0800770 u8 index, u8 algorithm, const u8 *key)
Michael Buesche4d6b792007-09-18 15:39:42 -0400771{
772 unsigned int i;
773 u32 offset;
774 u16 value;
775 u16 kidx;
776
777 /* Key index/algo block */
778 kidx = b43_kidx_to_fw(dev, index);
779 value = ((kidx << 4) | algorithm);
780 b43_shm_write16(dev, B43_SHM_SHARED,
781 B43_SHM_SH_KEYIDXBLOCK + (kidx * 2), value);
782
783 /* Write the key to the Key Table Pointer offset */
784 offset = dev->ktp + (index * B43_SEC_KEYSIZE);
785 for (i = 0; i < B43_SEC_KEYSIZE; i += 2) {
786 value = key[i];
787 value |= (u16) (key[i + 1]) << 8;
788 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, value);
789 }
790}
791
John Daiker99da1852009-02-24 02:16:42 -0800792static void keymac_write(struct b43_wldev *dev, u8 index, const u8 *addr)
Michael Buesche4d6b792007-09-18 15:39:42 -0400793{
794 u32 addrtmp[2] = { 0, 0, };
Michael Buesch66d2d082009-08-06 10:36:50 +0200795 u8 pairwise_keys_start = B43_NR_GROUP_KEYS * 2;
Michael Buesche4d6b792007-09-18 15:39:42 -0400796
797 if (b43_new_kidx_api(dev))
Michael Buesch66d2d082009-08-06 10:36:50 +0200798 pairwise_keys_start = B43_NR_GROUP_KEYS;
Michael Buesche4d6b792007-09-18 15:39:42 -0400799
Michael Buesch66d2d082009-08-06 10:36:50 +0200800 B43_WARN_ON(index < pairwise_keys_start);
801 /* We have four default TX keys and possibly four default RX keys.
Michael Buesche4d6b792007-09-18 15:39:42 -0400802 * Physical mac 0 is mapped to physical key 4 or 8, depending
803 * on the firmware version.
804 * So we must adjust the index here.
805 */
Michael Buesch66d2d082009-08-06 10:36:50 +0200806 index -= pairwise_keys_start;
807 B43_WARN_ON(index >= B43_NR_PAIRWISE_KEYS);
Michael Buesche4d6b792007-09-18 15:39:42 -0400808
809 if (addr) {
810 addrtmp[0] = addr[0];
811 addrtmp[0] |= ((u32) (addr[1]) << 8);
812 addrtmp[0] |= ((u32) (addr[2]) << 16);
813 addrtmp[0] |= ((u32) (addr[3]) << 24);
814 addrtmp[1] = addr[4];
815 addrtmp[1] |= ((u32) (addr[5]) << 8);
816 }
817
Michael Buesch66d2d082009-08-06 10:36:50 +0200818 /* Receive match transmitter address (RCMTA) mechanism */
819 b43_shm_write32(dev, B43_SHM_RCMTA,
820 (index * 2) + 0, addrtmp[0]);
821 b43_shm_write16(dev, B43_SHM_RCMTA,
822 (index * 2) + 1, addrtmp[1]);
Michael Buesche4d6b792007-09-18 15:39:42 -0400823}
824
gregor kowski035d0242009-08-19 22:35:45 +0200825/* The ucode will use phase1 key with TEK key to decrypt rx packets.
826 * When a packet is received, the iv32 is checked.
827 * - if it doesn't the packet is returned without modification (and software
828 * decryption can be done). That's what happen when iv16 wrap.
829 * - if it does, the rc4 key is computed, and decryption is tried.
830 * Either it will success and B43_RX_MAC_DEC is returned,
831 * either it fails and B43_RX_MAC_DEC|B43_RX_MAC_DECERR is returned
832 * and the packet is not usable (it got modified by the ucode).
833 * So in order to never have B43_RX_MAC_DECERR, we should provide
834 * a iv32 and phase1key that match. Because we drop packets in case of
835 * B43_RX_MAC_DECERR, if we have a correct iv32 but a wrong phase1key, all
836 * packets will be lost without higher layer knowing (ie no resync possible
837 * until next wrap).
838 *
839 * NOTE : this should support 50 key like RCMTA because
840 * (B43_SHM_SH_KEYIDXBLOCK - B43_SHM_SH_TKIPTSCTTAK)/14 = 50
841 */
842static void rx_tkip_phase1_write(struct b43_wldev *dev, u8 index, u32 iv32,
843 u16 *phase1key)
844{
845 unsigned int i;
846 u32 offset;
847 u8 pairwise_keys_start = B43_NR_GROUP_KEYS * 2;
848
849 if (!modparam_hwtkip)
850 return;
851
852 if (b43_new_kidx_api(dev))
853 pairwise_keys_start = B43_NR_GROUP_KEYS;
854
855 B43_WARN_ON(index < pairwise_keys_start);
856 /* We have four default TX keys and possibly four default RX keys.
857 * Physical mac 0 is mapped to physical key 4 or 8, depending
858 * on the firmware version.
859 * So we must adjust the index here.
860 */
861 index -= pairwise_keys_start;
862 B43_WARN_ON(index >= B43_NR_PAIRWISE_KEYS);
863
864 if (b43_debug(dev, B43_DBG_KEYS)) {
865 b43dbg(dev->wl, "rx_tkip_phase1_write : idx 0x%x, iv32 0x%x\n",
866 index, iv32);
867 }
868 /* Write the key to the RX tkip shared mem */
869 offset = B43_SHM_SH_TKIPTSCTTAK + index * (10 + 4);
870 for (i = 0; i < 10; i += 2) {
871 b43_shm_write16(dev, B43_SHM_SHARED, offset + i,
872 phase1key ? phase1key[i / 2] : 0);
873 }
874 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, iv32);
875 b43_shm_write16(dev, B43_SHM_SHARED, offset + i + 2, iv32 >> 16);
876}
877
878static void b43_op_update_tkip_key(struct ieee80211_hw *hw,
Johannes Bergb3fbdcf2010-01-21 11:40:47 +0100879 struct ieee80211_vif *vif,
880 struct ieee80211_key_conf *keyconf,
881 struct ieee80211_sta *sta,
882 u32 iv32, u16 *phase1key)
gregor kowski035d0242009-08-19 22:35:45 +0200883{
884 struct b43_wl *wl = hw_to_b43_wl(hw);
885 struct b43_wldev *dev;
886 int index = keyconf->hw_key_idx;
887
888 if (B43_WARN_ON(!modparam_hwtkip))
889 return;
890
Michael Buesch96869a32010-01-24 13:13:32 +0100891 /* This is only called from the RX path through mac80211, where
892 * our mutex is already locked. */
893 B43_WARN_ON(!mutex_is_locked(&wl->mutex));
gregor kowski035d0242009-08-19 22:35:45 +0200894 dev = wl->current_dev;
Michael Buesch96869a32010-01-24 13:13:32 +0100895 B43_WARN_ON(!dev || b43_status(dev) < B43_STAT_INITIALIZED);
gregor kowski035d0242009-08-19 22:35:45 +0200896
897 keymac_write(dev, index, NULL); /* First zero out mac to avoid race */
898
899 rx_tkip_phase1_write(dev, index, iv32, phase1key);
Johannes Bergb3fbdcf2010-01-21 11:40:47 +0100900 /* only pairwise TKIP keys are supported right now */
901 if (WARN_ON(!sta))
Michael Buesch96869a32010-01-24 13:13:32 +0100902 return;
Johannes Bergb3fbdcf2010-01-21 11:40:47 +0100903 keymac_write(dev, index, sta->addr);
gregor kowski035d0242009-08-19 22:35:45 +0200904}
905
Michael Buesche4d6b792007-09-18 15:39:42 -0400906static void do_key_write(struct b43_wldev *dev,
907 u8 index, u8 algorithm,
John Daiker99da1852009-02-24 02:16:42 -0800908 const u8 *key, size_t key_len, const u8 *mac_addr)
Michael Buesche4d6b792007-09-18 15:39:42 -0400909{
910 u8 buf[B43_SEC_KEYSIZE] = { 0, };
Michael Buesch66d2d082009-08-06 10:36:50 +0200911 u8 pairwise_keys_start = B43_NR_GROUP_KEYS * 2;
Michael Buesche4d6b792007-09-18 15:39:42 -0400912
913 if (b43_new_kidx_api(dev))
Michael Buesch66d2d082009-08-06 10:36:50 +0200914 pairwise_keys_start = B43_NR_GROUP_KEYS;
Michael Buesche4d6b792007-09-18 15:39:42 -0400915
Michael Buesch66d2d082009-08-06 10:36:50 +0200916 B43_WARN_ON(index >= ARRAY_SIZE(dev->key));
Michael Buesche4d6b792007-09-18 15:39:42 -0400917 B43_WARN_ON(key_len > B43_SEC_KEYSIZE);
918
Michael Buesch66d2d082009-08-06 10:36:50 +0200919 if (index >= pairwise_keys_start)
Michael Buesche4d6b792007-09-18 15:39:42 -0400920 keymac_write(dev, index, NULL); /* First zero out mac. */
gregor kowski035d0242009-08-19 22:35:45 +0200921 if (algorithm == B43_SEC_ALGO_TKIP) {
922 /*
923 * We should provide an initial iv32, phase1key pair.
924 * We could start with iv32=0 and compute the corresponding
925 * phase1key, but this means calling ieee80211_get_tkip_key
926 * with a fake skb (or export other tkip function).
927 * Because we are lazy we hope iv32 won't start with
928 * 0xffffffff and let's b43_op_update_tkip_key provide a
929 * correct pair.
930 */
931 rx_tkip_phase1_write(dev, index, 0xffffffff, (u16*)buf);
932 } else if (index >= pairwise_keys_start) /* clear it */
933 rx_tkip_phase1_write(dev, index, 0, NULL);
Michael Buesche4d6b792007-09-18 15:39:42 -0400934 if (key)
935 memcpy(buf, key, key_len);
936 key_write(dev, index, algorithm, buf);
Michael Buesch66d2d082009-08-06 10:36:50 +0200937 if (index >= pairwise_keys_start)
Michael Buesche4d6b792007-09-18 15:39:42 -0400938 keymac_write(dev, index, mac_addr);
939
940 dev->key[index].algorithm = algorithm;
941}
942
943static int b43_key_write(struct b43_wldev *dev,
944 int index, u8 algorithm,
John Daiker99da1852009-02-24 02:16:42 -0800945 const u8 *key, size_t key_len,
946 const u8 *mac_addr,
Michael Buesche4d6b792007-09-18 15:39:42 -0400947 struct ieee80211_key_conf *keyconf)
948{
949 int i;
Michael Buesch66d2d082009-08-06 10:36:50 +0200950 int pairwise_keys_start;
Michael Buesche4d6b792007-09-18 15:39:42 -0400951
gregor kowski035d0242009-08-19 22:35:45 +0200952 /* For ALG_TKIP the key is encoded as a 256-bit (32 byte) data block:
953 * - Temporal Encryption Key (128 bits)
954 * - Temporal Authenticator Tx MIC Key (64 bits)
955 * - Temporal Authenticator Rx MIC Key (64 bits)
956 *
957 * Hardware only store TEK
958 */
959 if (algorithm == B43_SEC_ALGO_TKIP && key_len == 32)
960 key_len = 16;
Michael Buesche4d6b792007-09-18 15:39:42 -0400961 if (key_len > B43_SEC_KEYSIZE)
962 return -EINVAL;
Michael Buesch66d2d082009-08-06 10:36:50 +0200963 for (i = 0; i < ARRAY_SIZE(dev->key); i++) {
Michael Buesche4d6b792007-09-18 15:39:42 -0400964 /* Check that we don't already have this key. */
965 B43_WARN_ON(dev->key[i].keyconf == keyconf);
966 }
967 if (index < 0) {
Michael Buesche808e582008-12-19 21:30:52 +0100968 /* Pairwise key. Get an empty slot for the key. */
Michael Buesche4d6b792007-09-18 15:39:42 -0400969 if (b43_new_kidx_api(dev))
Michael Buesch66d2d082009-08-06 10:36:50 +0200970 pairwise_keys_start = B43_NR_GROUP_KEYS;
Michael Buesche4d6b792007-09-18 15:39:42 -0400971 else
Michael Buesch66d2d082009-08-06 10:36:50 +0200972 pairwise_keys_start = B43_NR_GROUP_KEYS * 2;
973 for (i = pairwise_keys_start;
974 i < pairwise_keys_start + B43_NR_PAIRWISE_KEYS;
975 i++) {
976 B43_WARN_ON(i >= ARRAY_SIZE(dev->key));
Michael Buesche4d6b792007-09-18 15:39:42 -0400977 if (!dev->key[i].keyconf) {
978 /* found empty */
979 index = i;
980 break;
981 }
982 }
983 if (index < 0) {
Michael Buesche808e582008-12-19 21:30:52 +0100984 b43warn(dev->wl, "Out of hardware key memory\n");
Michael Buesche4d6b792007-09-18 15:39:42 -0400985 return -ENOSPC;
986 }
987 } else
988 B43_WARN_ON(index > 3);
989
990 do_key_write(dev, index, algorithm, key, key_len, mac_addr);
991 if ((index <= 3) && !b43_new_kidx_api(dev)) {
992 /* Default RX key */
993 B43_WARN_ON(mac_addr);
994 do_key_write(dev, index + 4, algorithm, key, key_len, NULL);
995 }
996 keyconf->hw_key_idx = index;
997 dev->key[index].keyconf = keyconf;
998
999 return 0;
1000}
1001
1002static int b43_key_clear(struct b43_wldev *dev, int index)
1003{
Michael Buesch66d2d082009-08-06 10:36:50 +02001004 if (B43_WARN_ON((index < 0) || (index >= ARRAY_SIZE(dev->key))))
Michael Buesche4d6b792007-09-18 15:39:42 -04001005 return -EINVAL;
1006 do_key_write(dev, index, B43_SEC_ALGO_NONE,
1007 NULL, B43_SEC_KEYSIZE, NULL);
1008 if ((index <= 3) && !b43_new_kidx_api(dev)) {
1009 do_key_write(dev, index + 4, B43_SEC_ALGO_NONE,
1010 NULL, B43_SEC_KEYSIZE, NULL);
1011 }
1012 dev->key[index].keyconf = NULL;
1013
1014 return 0;
1015}
1016
1017static void b43_clear_keys(struct b43_wldev *dev)
1018{
Michael Buesch66d2d082009-08-06 10:36:50 +02001019 int i, count;
Michael Buesche4d6b792007-09-18 15:39:42 -04001020
Michael Buesch66d2d082009-08-06 10:36:50 +02001021 if (b43_new_kidx_api(dev))
1022 count = B43_NR_GROUP_KEYS + B43_NR_PAIRWISE_KEYS;
1023 else
1024 count = B43_NR_GROUP_KEYS * 2 + B43_NR_PAIRWISE_KEYS;
1025 for (i = 0; i < count; i++)
Michael Buesche4d6b792007-09-18 15:39:42 -04001026 b43_key_clear(dev, i);
1027}
1028
Michael Buesch9cf7f242008-12-19 20:24:30 +01001029static void b43_dump_keymemory(struct b43_wldev *dev)
1030{
Michael Buesch66d2d082009-08-06 10:36:50 +02001031 unsigned int i, index, count, offset, pairwise_keys_start;
Michael Buesch9cf7f242008-12-19 20:24:30 +01001032 u8 mac[ETH_ALEN];
1033 u16 algo;
1034 u32 rcmta0;
1035 u16 rcmta1;
1036 u64 hf;
1037 struct b43_key *key;
1038
1039 if (!b43_debug(dev, B43_DBG_KEYS))
1040 return;
1041
1042 hf = b43_hf_read(dev);
1043 b43dbg(dev->wl, "Hardware key memory dump: USEDEFKEYS=%u\n",
1044 !!(hf & B43_HF_USEDEFKEYS));
Michael Buesch66d2d082009-08-06 10:36:50 +02001045 if (b43_new_kidx_api(dev)) {
1046 pairwise_keys_start = B43_NR_GROUP_KEYS;
1047 count = B43_NR_GROUP_KEYS + B43_NR_PAIRWISE_KEYS;
1048 } else {
1049 pairwise_keys_start = B43_NR_GROUP_KEYS * 2;
1050 count = B43_NR_GROUP_KEYS * 2 + B43_NR_PAIRWISE_KEYS;
1051 }
1052 for (index = 0; index < count; index++) {
Michael Buesch9cf7f242008-12-19 20:24:30 +01001053 key = &(dev->key[index]);
1054 printk(KERN_DEBUG "Key slot %02u: %s",
1055 index, (key->keyconf == NULL) ? " " : "*");
1056 offset = dev->ktp + (index * B43_SEC_KEYSIZE);
1057 for (i = 0; i < B43_SEC_KEYSIZE; i += 2) {
1058 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);
1059 printk("%02X%02X", (tmp & 0xFF), ((tmp >> 8) & 0xFF));
1060 }
1061
1062 algo = b43_shm_read16(dev, B43_SHM_SHARED,
1063 B43_SHM_SH_KEYIDXBLOCK + (index * 2));
1064 printk(" Algo: %04X/%02X", algo, key->algorithm);
1065
Michael Buesch66d2d082009-08-06 10:36:50 +02001066 if (index >= pairwise_keys_start) {
gregor kowski035d0242009-08-19 22:35:45 +02001067 if (key->algorithm == B43_SEC_ALGO_TKIP) {
1068 printk(" TKIP: ");
1069 offset = B43_SHM_SH_TKIPTSCTTAK + (index - 4) * (10 + 4);
1070 for (i = 0; i < 14; i += 2) {
1071 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);
1072 printk("%02X%02X", (tmp & 0xFF), ((tmp >> 8) & 0xFF));
1073 }
1074 }
Michael Buesch9cf7f242008-12-19 20:24:30 +01001075 rcmta0 = b43_shm_read32(dev, B43_SHM_RCMTA,
Michael Buesch66d2d082009-08-06 10:36:50 +02001076 ((index - pairwise_keys_start) * 2) + 0);
Michael Buesch9cf7f242008-12-19 20:24:30 +01001077 rcmta1 = b43_shm_read16(dev, B43_SHM_RCMTA,
Michael Buesch66d2d082009-08-06 10:36:50 +02001078 ((index - pairwise_keys_start) * 2) + 1);
Michael Buesch9cf7f242008-12-19 20:24:30 +01001079 *((__le32 *)(&mac[0])) = cpu_to_le32(rcmta0);
1080 *((__le16 *)(&mac[4])) = cpu_to_le16(rcmta1);
Johannes Berge91d8332009-07-15 17:21:41 +02001081 printk(" MAC: %pM", mac);
Michael Buesch9cf7f242008-12-19 20:24:30 +01001082 } else
1083 printk(" DEFAULT KEY");
1084 printk("\n");
1085 }
1086}
1087
Michael Buesche4d6b792007-09-18 15:39:42 -04001088void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags)
1089{
1090 u32 macctl;
1091 u16 ucstat;
1092 bool hwps;
1093 bool awake;
1094 int i;
1095
1096 B43_WARN_ON((ps_flags & B43_PS_ENABLED) &&
1097 (ps_flags & B43_PS_DISABLED));
1098 B43_WARN_ON((ps_flags & B43_PS_AWAKE) && (ps_flags & B43_PS_ASLEEP));
1099
1100 if (ps_flags & B43_PS_ENABLED) {
1101 hwps = 1;
1102 } else if (ps_flags & B43_PS_DISABLED) {
1103 hwps = 0;
1104 } else {
1105 //TODO: If powersave is not off and FIXME is not set and we are not in adhoc
1106 // and thus is not an AP and we are associated, set bit 25
1107 }
1108 if (ps_flags & B43_PS_AWAKE) {
1109 awake = 1;
1110 } else if (ps_flags & B43_PS_ASLEEP) {
1111 awake = 0;
1112 } else {
1113 //TODO: If the device is awake or this is an AP, or we are scanning, or FIXME,
1114 // or we are associated, or FIXME, or the latest PS-Poll packet sent was
1115 // successful, set bit26
1116 }
1117
1118/* FIXME: For now we force awake-on and hwps-off */
1119 hwps = 0;
1120 awake = 1;
1121
1122 macctl = b43_read32(dev, B43_MMIO_MACCTL);
1123 if (hwps)
1124 macctl |= B43_MACCTL_HWPS;
1125 else
1126 macctl &= ~B43_MACCTL_HWPS;
1127 if (awake)
1128 macctl |= B43_MACCTL_AWAKE;
1129 else
1130 macctl &= ~B43_MACCTL_AWAKE;
1131 b43_write32(dev, B43_MMIO_MACCTL, macctl);
1132 /* Commit write */
1133 b43_read32(dev, B43_MMIO_MACCTL);
1134 if (awake && dev->dev->id.revision >= 5) {
1135 /* Wait for the microcode to wake up. */
1136 for (i = 0; i < 100; i++) {
1137 ucstat = b43_shm_read16(dev, B43_SHM_SHARED,
1138 B43_SHM_SH_UCODESTAT);
1139 if (ucstat != B43_SHM_SH_UCODESTAT_SLEEP)
1140 break;
1141 udelay(10);
1142 }
1143 }
1144}
1145
Michael Buesche4d6b792007-09-18 15:39:42 -04001146void b43_wireless_core_reset(struct b43_wldev *dev, u32 flags)
1147{
1148 u32 tmslow;
1149 u32 macctl;
1150
1151 flags |= B43_TMSLOW_PHYCLKEN;
1152 flags |= B43_TMSLOW_PHYRESET;
Rafał Miłecki42ab1352010-12-09 20:56:01 +01001153 if (dev->phy.type == B43_PHYTYPE_N)
1154 flags |= B43_TMSLOW_PHY_BANDWIDTH_20MHZ; /* Make 20 MHz def */
Michael Buesche4d6b792007-09-18 15:39:42 -04001155 ssb_device_enable(dev->dev, flags);
1156 msleep(2); /* Wait for the PLL to turn on. */
1157
1158 /* Now take the PHY out of Reset again */
1159 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
1160 tmslow |= SSB_TMSLOW_FGC;
1161 tmslow &= ~B43_TMSLOW_PHYRESET;
1162 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
1163 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
1164 msleep(1);
1165 tmslow &= ~SSB_TMSLOW_FGC;
1166 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
1167 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
1168 msleep(1);
1169
Michael Bueschfb111372008-09-02 13:00:34 +02001170 /* Turn Analog ON, but only if we already know the PHY-type.
1171 * This protects against very early setup where we don't know the
1172 * PHY-type, yet. wireless_core_reset will be called once again later,
1173 * when we know the PHY-type. */
1174 if (dev->phy.ops)
Michael Bueschcb24f572008-09-03 12:12:20 +02001175 dev->phy.ops->switch_analog(dev, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04001176
1177 macctl = b43_read32(dev, B43_MMIO_MACCTL);
1178 macctl &= ~B43_MACCTL_GMODE;
1179 if (flags & B43_TMSLOW_GMODE)
1180 macctl |= B43_MACCTL_GMODE;
1181 macctl |= B43_MACCTL_IHR_ENABLED;
1182 b43_write32(dev, B43_MMIO_MACCTL, macctl);
1183}
1184
1185static void handle_irq_transmit_status(struct b43_wldev *dev)
1186{
1187 u32 v0, v1;
1188 u16 tmp;
1189 struct b43_txstatus stat;
1190
1191 while (1) {
1192 v0 = b43_read32(dev, B43_MMIO_XMITSTAT_0);
1193 if (!(v0 & 0x00000001))
1194 break;
1195 v1 = b43_read32(dev, B43_MMIO_XMITSTAT_1);
1196
1197 stat.cookie = (v0 >> 16);
1198 stat.seq = (v1 & 0x0000FFFF);
1199 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
1200 tmp = (v0 & 0x0000FFFF);
1201 stat.frame_count = ((tmp & 0xF000) >> 12);
1202 stat.rts_count = ((tmp & 0x0F00) >> 8);
1203 stat.supp_reason = ((tmp & 0x001C) >> 2);
1204 stat.pm_indicated = !!(tmp & 0x0080);
1205 stat.intermediate = !!(tmp & 0x0040);
1206 stat.for_ampdu = !!(tmp & 0x0020);
1207 stat.acked = !!(tmp & 0x0002);
1208
1209 b43_handle_txstatus(dev, &stat);
1210 }
1211}
1212
1213static void drain_txstatus_queue(struct b43_wldev *dev)
1214{
1215 u32 dummy;
1216
1217 if (dev->dev->id.revision < 5)
1218 return;
1219 /* Read all entries from the microcode TXstatus FIFO
1220 * and throw them away.
1221 */
1222 while (1) {
1223 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_0);
1224 if (!(dummy & 0x00000001))
1225 break;
1226 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_1);
1227 }
1228}
1229
1230static u32 b43_jssi_read(struct b43_wldev *dev)
1231{
1232 u32 val = 0;
1233
1234 val = b43_shm_read16(dev, B43_SHM_SHARED, 0x08A);
1235 val <<= 16;
1236 val |= b43_shm_read16(dev, B43_SHM_SHARED, 0x088);
1237
1238 return val;
1239}
1240
1241static void b43_jssi_write(struct b43_wldev *dev, u32 jssi)
1242{
1243 b43_shm_write16(dev, B43_SHM_SHARED, 0x088, (jssi & 0x0000FFFF));
1244 b43_shm_write16(dev, B43_SHM_SHARED, 0x08A, (jssi & 0xFFFF0000) >> 16);
1245}
1246
1247static void b43_generate_noise_sample(struct b43_wldev *dev)
1248{
1249 b43_jssi_write(dev, 0x7F7F7F7F);
Michael Bueschaa6c7ae2007-12-26 16:26:36 +01001250 b43_write32(dev, B43_MMIO_MACCMD,
1251 b43_read32(dev, B43_MMIO_MACCMD) | B43_MACCMD_BGNOISE);
Michael Buesche4d6b792007-09-18 15:39:42 -04001252}
1253
1254static void b43_calculate_link_quality(struct b43_wldev *dev)
1255{
1256 /* Top half of Link Quality calculation. */
1257
Michael Bueschef1a6282008-08-27 18:53:02 +02001258 if (dev->phy.type != B43_PHYTYPE_G)
1259 return;
Michael Buesche4d6b792007-09-18 15:39:42 -04001260 if (dev->noisecalc.calculation_running)
1261 return;
Michael Buesche4d6b792007-09-18 15:39:42 -04001262 dev->noisecalc.calculation_running = 1;
1263 dev->noisecalc.nr_samples = 0;
1264
1265 b43_generate_noise_sample(dev);
1266}
1267
1268static void handle_irq_noise(struct b43_wldev *dev)
1269{
Michael Bueschef1a6282008-08-27 18:53:02 +02001270 struct b43_phy_g *phy = dev->phy.g;
Michael Buesche4d6b792007-09-18 15:39:42 -04001271 u16 tmp;
1272 u8 noise[4];
1273 u8 i, j;
1274 s32 average;
1275
1276 /* Bottom half of Link Quality calculation. */
1277
Michael Bueschef1a6282008-08-27 18:53:02 +02001278 if (dev->phy.type != B43_PHYTYPE_G)
1279 return;
1280
Michael Buesch98a3b2f2008-06-12 12:36:29 +02001281 /* Possible race condition: It might be possible that the user
1282 * changed to a different channel in the meantime since we
1283 * started the calculation. We ignore that fact, since it's
1284 * not really that much of a problem. The background noise is
1285 * an estimation only anyway. Slightly wrong results will get damped
1286 * by the averaging of the 8 sample rounds. Additionally the
1287 * value is shortlived. So it will be replaced by the next noise
1288 * calculation round soon. */
1289
Michael Buesche4d6b792007-09-18 15:39:42 -04001290 B43_WARN_ON(!dev->noisecalc.calculation_running);
Michael Buesch1a094042007-09-20 11:13:40 -07001291 *((__le32 *)noise) = cpu_to_le32(b43_jssi_read(dev));
Michael Buesche4d6b792007-09-18 15:39:42 -04001292 if (noise[0] == 0x7F || noise[1] == 0x7F ||
1293 noise[2] == 0x7F || noise[3] == 0x7F)
1294 goto generate_new;
1295
1296 /* Get the noise samples. */
1297 B43_WARN_ON(dev->noisecalc.nr_samples >= 8);
1298 i = dev->noisecalc.nr_samples;
Harvey Harrisoncdbf0842008-05-02 13:47:48 -07001299 noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
1300 noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
1301 noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
1302 noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04001303 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
1304 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
1305 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
1306 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
1307 dev->noisecalc.nr_samples++;
1308 if (dev->noisecalc.nr_samples == 8) {
1309 /* Calculate the Link Quality by the noise samples. */
1310 average = 0;
1311 for (i = 0; i < 8; i++) {
1312 for (j = 0; j < 4; j++)
1313 average += dev->noisecalc.samples[i][j];
1314 }
1315 average /= (8 * 4);
1316 average *= 125;
1317 average += 64;
1318 average /= 128;
1319 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C);
1320 tmp = (tmp / 128) & 0x1F;
1321 if (tmp >= 8)
1322 average += 2;
1323 else
1324 average -= 25;
1325 if (tmp == 8)
1326 average -= 72;
1327 else
1328 average -= 48;
1329
1330 dev->stats.link_noise = average;
Michael Buesche4d6b792007-09-18 15:39:42 -04001331 dev->noisecalc.calculation_running = 0;
1332 return;
1333 }
Michael Buesch98a3b2f2008-06-12 12:36:29 +02001334generate_new:
Michael Buesche4d6b792007-09-18 15:39:42 -04001335 b43_generate_noise_sample(dev);
1336}
1337
1338static void handle_irq_tbtt_indication(struct b43_wldev *dev)
1339{
Johannes Berg05c914f2008-09-11 00:01:58 +02001340 if (b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
Michael Buesche4d6b792007-09-18 15:39:42 -04001341 ///TODO: PS TBTT
1342 } else {
1343 if (1 /*FIXME: the last PSpoll frame was sent successfully */ )
1344 b43_power_saving_ctl_bits(dev, 0);
1345 }
Johannes Berg05c914f2008-09-11 00:01:58 +02001346 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
Michael Bueschaa6c7ae2007-12-26 16:26:36 +01001347 dev->dfq_valid = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04001348}
1349
1350static void handle_irq_atim_end(struct b43_wldev *dev)
1351{
Michael Bueschaa6c7ae2007-12-26 16:26:36 +01001352 if (dev->dfq_valid) {
1353 b43_write32(dev, B43_MMIO_MACCMD,
1354 b43_read32(dev, B43_MMIO_MACCMD)
1355 | B43_MACCMD_DFQ_VALID);
1356 dev->dfq_valid = 0;
1357 }
Michael Buesche4d6b792007-09-18 15:39:42 -04001358}
1359
1360static void handle_irq_pmq(struct b43_wldev *dev)
1361{
1362 u32 tmp;
1363
1364 //TODO: AP mode.
1365
1366 while (1) {
1367 tmp = b43_read32(dev, B43_MMIO_PS_STATUS);
1368 if (!(tmp & 0x00000008))
1369 break;
1370 }
1371 /* 16bit write is odd, but correct. */
1372 b43_write16(dev, B43_MMIO_PS_STATUS, 0x0002);
1373}
1374
1375static void b43_write_template_common(struct b43_wldev *dev,
John Daiker99da1852009-02-24 02:16:42 -08001376 const u8 *data, u16 size,
Michael Buesche4d6b792007-09-18 15:39:42 -04001377 u16 ram_offset,
1378 u16 shm_size_offset, u8 rate)
1379{
1380 u32 i, tmp;
1381 struct b43_plcp_hdr4 plcp;
1382
1383 plcp.data = 0;
1384 b43_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
1385 b43_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
1386 ram_offset += sizeof(u32);
1387 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
1388 * So leave the first two bytes of the next write blank.
1389 */
1390 tmp = (u32) (data[0]) << 16;
1391 tmp |= (u32) (data[1]) << 24;
1392 b43_ram_write(dev, ram_offset, tmp);
1393 ram_offset += sizeof(u32);
1394 for (i = 2; i < size; i += sizeof(u32)) {
1395 tmp = (u32) (data[i + 0]);
1396 if (i + 1 < size)
1397 tmp |= (u32) (data[i + 1]) << 8;
1398 if (i + 2 < size)
1399 tmp |= (u32) (data[i + 2]) << 16;
1400 if (i + 3 < size)
1401 tmp |= (u32) (data[i + 3]) << 24;
1402 b43_ram_write(dev, ram_offset + i - 2, tmp);
1403 }
1404 b43_shm_write16(dev, B43_SHM_SHARED, shm_size_offset,
1405 size + sizeof(struct b43_plcp_hdr6));
1406}
1407
Michael Buesch5042c502008-04-05 15:05:00 +02001408/* Check if the use of the antenna that ieee80211 told us to
1409 * use is possible. This will fall back to DEFAULT.
1410 * "antenna_nr" is the antenna identifier we got from ieee80211. */
1411u8 b43_ieee80211_antenna_sanitize(struct b43_wldev *dev,
1412 u8 antenna_nr)
1413{
1414 u8 antenna_mask;
1415
1416 if (antenna_nr == 0) {
1417 /* Zero means "use default antenna". That's always OK. */
1418 return 0;
1419 }
1420
1421 /* Get the mask of available antennas. */
1422 if (dev->phy.gmode)
1423 antenna_mask = dev->dev->bus->sprom.ant_available_bg;
1424 else
1425 antenna_mask = dev->dev->bus->sprom.ant_available_a;
1426
1427 if (!(antenna_mask & (1 << (antenna_nr - 1)))) {
1428 /* This antenna is not available. Fall back to default. */
1429 return 0;
1430 }
1431
1432 return antenna_nr;
1433}
1434
Michael Buesch5042c502008-04-05 15:05:00 +02001435/* Convert a b43 antenna number value to the PHY TX control value. */
1436static u16 b43_antenna_to_phyctl(int antenna)
1437{
1438 switch (antenna) {
1439 case B43_ANTENNA0:
1440 return B43_TXH_PHY_ANT0;
1441 case B43_ANTENNA1:
1442 return B43_TXH_PHY_ANT1;
1443 case B43_ANTENNA2:
1444 return B43_TXH_PHY_ANT2;
1445 case B43_ANTENNA3:
1446 return B43_TXH_PHY_ANT3;
Gábor Stefanik64e368b2009-08-27 22:49:49 +02001447 case B43_ANTENNA_AUTO0:
1448 case B43_ANTENNA_AUTO1:
Michael Buesch5042c502008-04-05 15:05:00 +02001449 return B43_TXH_PHY_ANT01AUTO;
1450 }
1451 B43_WARN_ON(1);
1452 return 0;
1453}
1454
Michael Buesche4d6b792007-09-18 15:39:42 -04001455static void b43_write_beacon_template(struct b43_wldev *dev,
1456 u16 ram_offset,
Michael Buesch5042c502008-04-05 15:05:00 +02001457 u16 shm_size_offset)
Michael Buesche4d6b792007-09-18 15:39:42 -04001458{
Michael Buesch47f76ca2007-12-27 22:15:11 +01001459 unsigned int i, len, variable_len;
Michael Buesche66fee62007-12-26 17:47:10 +01001460 const struct ieee80211_mgmt *bcn;
1461 const u8 *ie;
1462 bool tim_found = 0;
Michael Buesch5042c502008-04-05 15:05:00 +02001463 unsigned int rate;
1464 u16 ctl;
1465 int antenna;
Johannes Berge039fa42008-05-15 12:55:29 +02001466 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
Michael Buesche4d6b792007-09-18 15:39:42 -04001467
Michael Buesche66fee62007-12-26 17:47:10 +01001468 bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
1469 len = min((size_t) dev->wl->current_beacon->len,
Michael Buesche4d6b792007-09-18 15:39:42 -04001470 0x200 - sizeof(struct b43_plcp_hdr6));
Johannes Berge039fa42008-05-15 12:55:29 +02001471 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
Michael Buesche66fee62007-12-26 17:47:10 +01001472
1473 b43_write_template_common(dev, (const u8 *)bcn,
Michael Buesche4d6b792007-09-18 15:39:42 -04001474 len, ram_offset, shm_size_offset, rate);
Michael Buesche66fee62007-12-26 17:47:10 +01001475
Michael Buesch5042c502008-04-05 15:05:00 +02001476 /* Write the PHY TX control parameters. */
Johannes Berg0f4ac382008-10-09 12:18:04 +02001477 antenna = B43_ANTENNA_DEFAULT;
Michael Buesch5042c502008-04-05 15:05:00 +02001478 antenna = b43_antenna_to_phyctl(antenna);
1479 ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL);
1480 /* We can't send beacons with short preamble. Would get PHY errors. */
1481 ctl &= ~B43_TXH_PHY_SHORTPRMBL;
1482 ctl &= ~B43_TXH_PHY_ANT;
1483 ctl &= ~B43_TXH_PHY_ENC;
1484 ctl |= antenna;
1485 if (b43_is_cck_rate(rate))
1486 ctl |= B43_TXH_PHY_ENC_CCK;
1487 else
1488 ctl |= B43_TXH_PHY_ENC_OFDM;
1489 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl);
1490
Michael Buesche66fee62007-12-26 17:47:10 +01001491 /* Find the position of the TIM and the DTIM_period value
1492 * and write them to SHM. */
1493 ie = bcn->u.beacon.variable;
Michael Buesch47f76ca2007-12-27 22:15:11 +01001494 variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
1495 for (i = 0; i < variable_len - 2; ) {
Michael Buesche66fee62007-12-26 17:47:10 +01001496 uint8_t ie_id, ie_len;
1497
1498 ie_id = ie[i];
1499 ie_len = ie[i + 1];
1500 if (ie_id == 5) {
1501 u16 tim_position;
1502 u16 dtim_period;
1503 /* This is the TIM Information Element */
1504
1505 /* Check whether the ie_len is in the beacon data range. */
Michael Buesch47f76ca2007-12-27 22:15:11 +01001506 if (variable_len < ie_len + 2 + i)
Michael Buesche66fee62007-12-26 17:47:10 +01001507 break;
1508 /* A valid TIM is at least 4 bytes long. */
1509 if (ie_len < 4)
1510 break;
1511 tim_found = 1;
1512
1513 tim_position = sizeof(struct b43_plcp_hdr6);
1514 tim_position += offsetof(struct ieee80211_mgmt, u.beacon.variable);
1515 tim_position += i;
1516
1517 dtim_period = ie[i + 3];
1518
1519 b43_shm_write16(dev, B43_SHM_SHARED,
1520 B43_SHM_SH_TIMBPOS, tim_position);
1521 b43_shm_write16(dev, B43_SHM_SHARED,
1522 B43_SHM_SH_DTIMPER, dtim_period);
1523 break;
1524 }
1525 i += ie_len + 2;
1526 }
1527 if (!tim_found) {
Johannes Berg04dea132008-05-20 12:10:49 +02001528 /*
1529 * If ucode wants to modify TIM do it behind the beacon, this
1530 * will happen, for example, when doing mesh networking.
1531 */
1532 b43_shm_write16(dev, B43_SHM_SHARED,
1533 B43_SHM_SH_TIMBPOS,
1534 len + sizeof(struct b43_plcp_hdr6));
1535 b43_shm_write16(dev, B43_SHM_SHARED,
1536 B43_SHM_SH_DTIMPER, 0);
1537 }
1538 b43dbg(dev->wl, "Updated beacon template at 0x%x\n", ram_offset);
Michael Buesche4d6b792007-09-18 15:39:42 -04001539}
1540
Michael Buesch6b4bec02008-05-20 12:16:28 +02001541static void b43_upload_beacon0(struct b43_wldev *dev)
1542{
1543 struct b43_wl *wl = dev->wl;
1544
1545 if (wl->beacon0_uploaded)
1546 return;
1547 b43_write_beacon_template(dev, 0x68, 0x18);
Michael Buesch6b4bec02008-05-20 12:16:28 +02001548 wl->beacon0_uploaded = 1;
1549}
1550
1551static void b43_upload_beacon1(struct b43_wldev *dev)
1552{
1553 struct b43_wl *wl = dev->wl;
1554
1555 if (wl->beacon1_uploaded)
1556 return;
1557 b43_write_beacon_template(dev, 0x468, 0x1A);
1558 wl->beacon1_uploaded = 1;
1559}
1560
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001561static void handle_irq_beacon(struct b43_wldev *dev)
1562{
1563 struct b43_wl *wl = dev->wl;
1564 u32 cmd, beacon0_valid, beacon1_valid;
1565
Johannes Berg05c914f2008-09-11 00:01:58 +02001566 if (!b43_is_mode(wl, NL80211_IFTYPE_AP) &&
1567 !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT))
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001568 return;
1569
1570 /* This is the bottom half of the asynchronous beacon update. */
1571
1572 /* Ignore interrupt in the future. */
Michael Buesch13790722009-04-08 21:26:27 +02001573 dev->irq_mask &= ~B43_IRQ_BEACON;
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001574
1575 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1576 beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
1577 beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
1578
1579 /* Schedule interrupt manually, if busy. */
1580 if (beacon0_valid && beacon1_valid) {
1581 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
Michael Buesch13790722009-04-08 21:26:27 +02001582 dev->irq_mask |= B43_IRQ_BEACON;
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001583 return;
1584 }
1585
Michael Buesch6b4bec02008-05-20 12:16:28 +02001586 if (unlikely(wl->beacon_templates_virgin)) {
1587 /* We never uploaded a beacon before.
1588 * Upload both templates now, but only mark one valid. */
1589 wl->beacon_templates_virgin = 0;
1590 b43_upload_beacon0(dev);
1591 b43_upload_beacon1(dev);
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001592 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1593 cmd |= B43_MACCMD_BEACON0_VALID;
1594 b43_write32(dev, B43_MMIO_MACCMD, cmd);
Michael Buesch6b4bec02008-05-20 12:16:28 +02001595 } else {
1596 if (!beacon0_valid) {
1597 b43_upload_beacon0(dev);
1598 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1599 cmd |= B43_MACCMD_BEACON0_VALID;
1600 b43_write32(dev, B43_MMIO_MACCMD, cmd);
1601 } else if (!beacon1_valid) {
1602 b43_upload_beacon1(dev);
1603 cmd = b43_read32(dev, B43_MMIO_MACCMD);
1604 cmd |= B43_MACCMD_BEACON1_VALID;
1605 b43_write32(dev, B43_MMIO_MACCMD, cmd);
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001606 }
Michael Bueschc97a4cc2008-04-05 15:02:09 +02001607 }
1608}
1609
Michael Buesch36dbd952009-09-04 22:51:29 +02001610static void b43_do_beacon_update_trigger_work(struct b43_wldev *dev)
1611{
1612 u32 old_irq_mask = dev->irq_mask;
1613
1614 /* update beacon right away or defer to irq */
1615 handle_irq_beacon(dev);
1616 if (old_irq_mask != dev->irq_mask) {
1617 /* The handler updated the IRQ mask. */
1618 B43_WARN_ON(!dev->irq_mask);
1619 if (b43_read32(dev, B43_MMIO_GEN_IRQ_MASK)) {
1620 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1621 } else {
1622 /* Device interrupts are currently disabled. That means
1623 * we just ran the hardirq handler and scheduled the
1624 * IRQ thread. The thread will write the IRQ mask when
1625 * it finished, so there's nothing to do here. Writing
1626 * the mask _here_ would incorrectly re-enable IRQs. */
1627 }
1628 }
1629}
1630
Michael Buescha82d9922008-04-04 21:40:06 +02001631static void b43_beacon_update_trigger_work(struct work_struct *work)
1632{
1633 struct b43_wl *wl = container_of(work, struct b43_wl,
1634 beacon_update_trigger);
1635 struct b43_wldev *dev;
1636
1637 mutex_lock(&wl->mutex);
1638 dev = wl->current_dev;
1639 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001640 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
Michael Buesch36dbd952009-09-04 22:51:29 +02001641 /* wl->mutex is enough. */
1642 b43_do_beacon_update_trigger_work(dev);
1643 mmiowb();
1644 } else {
1645 spin_lock_irq(&wl->hardirq_lock);
1646 b43_do_beacon_update_trigger_work(dev);
1647 mmiowb();
1648 spin_unlock_irq(&wl->hardirq_lock);
1649 }
Michael Buescha82d9922008-04-04 21:40:06 +02001650 }
1651 mutex_unlock(&wl->mutex);
1652}
1653
Michael Bueschd4df6f12007-12-26 18:04:14 +01001654/* Asynchronously update the packet templates in template RAM.
Michael Buesch36dbd952009-09-04 22:51:29 +02001655 * Locking: Requires wl->mutex to be locked. */
Johannes Berg9d139c82008-07-09 14:40:37 +02001656static void b43_update_templates(struct b43_wl *wl)
Michael Buesche4d6b792007-09-18 15:39:42 -04001657{
Johannes Berg9d139c82008-07-09 14:40:37 +02001658 struct sk_buff *beacon;
1659
Michael Buesche66fee62007-12-26 17:47:10 +01001660 /* This is the top half of the ansynchronous beacon update.
1661 * The bottom half is the beacon IRQ.
1662 * Beacon update must be asynchronous to avoid sending an
1663 * invalid beacon. This can happen for example, if the firmware
1664 * transmits a beacon while we are updating it. */
Michael Buesche4d6b792007-09-18 15:39:42 -04001665
Johannes Berg9d139c82008-07-09 14:40:37 +02001666 /* We could modify the existing beacon and set the aid bit in
1667 * the TIM field, but that would probably require resizing and
1668 * moving of data within the beacon template.
1669 * Simply request a new beacon and let mac80211 do the hard work. */
1670 beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1671 if (unlikely(!beacon))
1672 return;
1673
Michael Buesche66fee62007-12-26 17:47:10 +01001674 if (wl->current_beacon)
1675 dev_kfree_skb_any(wl->current_beacon);
1676 wl->current_beacon = beacon;
1677 wl->beacon0_uploaded = 0;
1678 wl->beacon1_uploaded = 0;
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04001679 ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
Michael Buesche4d6b792007-09-18 15:39:42 -04001680}
1681
Michael Buesche4d6b792007-09-18 15:39:42 -04001682static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
1683{
1684 b43_time_lock(dev);
1685 if (dev->dev->id.revision >= 3) {
Michael Buescha82d9922008-04-04 21:40:06 +02001686 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16));
1687 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10));
Michael Buesche4d6b792007-09-18 15:39:42 -04001688 } else {
1689 b43_write16(dev, 0x606, (beacon_int >> 6));
1690 b43_write16(dev, 0x610, beacon_int);
1691 }
1692 b43_time_unlock(dev);
Michael Buescha82d9922008-04-04 21:40:06 +02001693 b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
Michael Buesche4d6b792007-09-18 15:39:42 -04001694}
1695
Michael Bueschafa83e22008-05-19 23:51:37 +02001696static void b43_handle_firmware_panic(struct b43_wldev *dev)
1697{
1698 u16 reason;
1699
1700 /* Read the register that contains the reason code for the panic. */
1701 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_FWPANIC_REASON_REG);
1702 b43err(dev->wl, "Whoopsy, firmware panic! Reason: %u\n", reason);
1703
1704 switch (reason) {
1705 default:
1706 b43dbg(dev->wl, "The panic reason is unknown.\n");
1707 /* fallthrough */
1708 case B43_FWPANIC_DIE:
1709 /* Do not restart the controller or firmware.
1710 * The device is nonfunctional from now on.
1711 * Restarting would result in this panic to trigger again,
1712 * so we avoid that recursion. */
1713 break;
1714 case B43_FWPANIC_RESTART:
1715 b43_controller_restart(dev, "Microcode panic");
1716 break;
1717 }
1718}
1719
Michael Buesche4d6b792007-09-18 15:39:42 -04001720static void handle_irq_ucode_debug(struct b43_wldev *dev)
1721{
Michael Buesche48b0ee2008-05-17 22:44:35 +02001722 unsigned int i, cnt;
Michael Buesch53c06852008-05-20 00:24:36 +02001723 u16 reason, marker_id, marker_line;
Michael Buesche48b0ee2008-05-17 22:44:35 +02001724 __le16 *buf;
1725
1726 /* The proprietary firmware doesn't have this IRQ. */
1727 if (!dev->fw.opensource)
1728 return;
1729
Michael Bueschafa83e22008-05-19 23:51:37 +02001730 /* Read the register that contains the reason code for this IRQ. */
1731 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_DEBUGIRQ_REASON_REG);
1732
Michael Buesche48b0ee2008-05-17 22:44:35 +02001733 switch (reason) {
1734 case B43_DEBUGIRQ_PANIC:
Michael Bueschafa83e22008-05-19 23:51:37 +02001735 b43_handle_firmware_panic(dev);
Michael Buesche48b0ee2008-05-17 22:44:35 +02001736 break;
1737 case B43_DEBUGIRQ_DUMP_SHM:
1738 if (!B43_DEBUG)
1739 break; /* Only with driver debugging enabled. */
1740 buf = kmalloc(4096, GFP_ATOMIC);
1741 if (!buf) {
1742 b43dbg(dev->wl, "SHM-dump: Failed to allocate memory\n");
1743 goto out;
1744 }
1745 for (i = 0; i < 4096; i += 2) {
1746 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i);
1747 buf[i / 2] = cpu_to_le16(tmp);
1748 }
1749 b43info(dev->wl, "Shared memory dump:\n");
1750 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET,
1751 16, 2, buf, 4096, 1);
1752 kfree(buf);
1753 break;
1754 case B43_DEBUGIRQ_DUMP_REGS:
1755 if (!B43_DEBUG)
1756 break; /* Only with driver debugging enabled. */
1757 b43info(dev->wl, "Microcode register dump:\n");
1758 for (i = 0, cnt = 0; i < 64; i++) {
1759 u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i);
1760 if (cnt == 0)
1761 printk(KERN_INFO);
1762 printk("r%02u: 0x%04X ", i, tmp);
1763 cnt++;
1764 if (cnt == 6) {
1765 printk("\n");
1766 cnt = 0;
1767 }
1768 }
1769 printk("\n");
1770 break;
Michael Buesch53c06852008-05-20 00:24:36 +02001771 case B43_DEBUGIRQ_MARKER:
1772 if (!B43_DEBUG)
1773 break; /* Only with driver debugging enabled. */
1774 marker_id = b43_shm_read16(dev, B43_SHM_SCRATCH,
1775 B43_MARKER_ID_REG);
1776 marker_line = b43_shm_read16(dev, B43_SHM_SCRATCH,
1777 B43_MARKER_LINE_REG);
1778 b43info(dev->wl, "The firmware just executed the MARKER(%u) "
1779 "at line number %u\n",
1780 marker_id, marker_line);
1781 break;
Michael Buesche48b0ee2008-05-17 22:44:35 +02001782 default:
1783 b43dbg(dev->wl, "Debug-IRQ triggered for unknown reason: %u\n",
1784 reason);
1785 }
1786out:
Michael Bueschafa83e22008-05-19 23:51:37 +02001787 /* Acknowledge the debug-IRQ, so the firmware can continue. */
1788 b43_shm_write16(dev, B43_SHM_SCRATCH,
1789 B43_DEBUGIRQ_REASON_REG, B43_DEBUGIRQ_ACK);
Michael Buesche4d6b792007-09-18 15:39:42 -04001790}
1791
Michael Buesch36dbd952009-09-04 22:51:29 +02001792static void b43_do_interrupt_thread(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -04001793{
1794 u32 reason;
1795 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1796 u32 merged_dma_reason = 0;
Michael Buesch21954c32007-09-27 15:31:40 +02001797 int i;
Michael Buesche4d6b792007-09-18 15:39:42 -04001798
Michael Buesch36dbd952009-09-04 22:51:29 +02001799 if (unlikely(b43_status(dev) != B43_STAT_STARTED))
1800 return;
Michael Buesche4d6b792007-09-18 15:39:42 -04001801
1802 reason = dev->irq_reason;
1803 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1804 dma_reason[i] = dev->dma_reason[i];
1805 merged_dma_reason |= dma_reason[i];
1806 }
1807
1808 if (unlikely(reason & B43_IRQ_MAC_TXERR))
1809 b43err(dev->wl, "MAC transmission error\n");
1810
Stefano Brivio00e0b8c2007-11-25 11:10:33 +01001811 if (unlikely(reason & B43_IRQ_PHY_TXERR)) {
Michael Buesche4d6b792007-09-18 15:39:42 -04001812 b43err(dev->wl, "PHY transmission error\n");
Stefano Brivio00e0b8c2007-11-25 11:10:33 +01001813 rmb();
1814 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1815 atomic_set(&dev->phy.txerr_cnt,
1816 B43_PHY_TX_BADNESS_LIMIT);
1817 b43err(dev->wl, "Too many PHY TX errors, "
1818 "restarting the controller\n");
1819 b43_controller_restart(dev, "PHY TX errors");
1820 }
1821 }
Michael Buesche4d6b792007-09-18 15:39:42 -04001822
1823 if (unlikely(merged_dma_reason & (B43_DMAIRQ_FATALMASK |
1824 B43_DMAIRQ_NONFATALMASK))) {
1825 if (merged_dma_reason & B43_DMAIRQ_FATALMASK) {
1826 b43err(dev->wl, "Fatal DMA error: "
1827 "0x%08X, 0x%08X, 0x%08X, "
1828 "0x%08X, 0x%08X, 0x%08X\n",
1829 dma_reason[0], dma_reason[1],
1830 dma_reason[2], dma_reason[3],
1831 dma_reason[4], dma_reason[5]);
Larry Finger214ac9a2009-12-09 13:25:56 -06001832 b43err(dev->wl, "This device does not support DMA "
Larry Fingerbb64d952010-06-19 08:29:08 -05001833 "on your system. It will now be switched to PIO.\n");
Linus Torvalds9e3bd912010-02-26 10:34:27 -08001834 /* Fall back to PIO transfers if we get fatal DMA errors! */
1835 dev->use_pio = 1;
1836 b43_controller_restart(dev, "DMA error");
Michael Buesche4d6b792007-09-18 15:39:42 -04001837 return;
1838 }
1839 if (merged_dma_reason & B43_DMAIRQ_NONFATALMASK) {
1840 b43err(dev->wl, "DMA error: "
1841 "0x%08X, 0x%08X, 0x%08X, "
1842 "0x%08X, 0x%08X, 0x%08X\n",
1843 dma_reason[0], dma_reason[1],
1844 dma_reason[2], dma_reason[3],
1845 dma_reason[4], dma_reason[5]);
1846 }
1847 }
1848
1849 if (unlikely(reason & B43_IRQ_UCODE_DEBUG))
1850 handle_irq_ucode_debug(dev);
1851 if (reason & B43_IRQ_TBTT_INDI)
1852 handle_irq_tbtt_indication(dev);
1853 if (reason & B43_IRQ_ATIM_END)
1854 handle_irq_atim_end(dev);
1855 if (reason & B43_IRQ_BEACON)
1856 handle_irq_beacon(dev);
1857 if (reason & B43_IRQ_PMQ)
1858 handle_irq_pmq(dev);
Michael Buesch21954c32007-09-27 15:31:40 +02001859 if (reason & B43_IRQ_TXFIFO_FLUSH_OK)
1860 ;/* TODO */
1861 if (reason & B43_IRQ_NOISESAMPLE_OK)
Michael Buesche4d6b792007-09-18 15:39:42 -04001862 handle_irq_noise(dev);
1863
1864 /* Check the DMA reason registers for received data. */
Michael Buesch5100d5a2008-03-29 21:01:16 +01001865 if (dma_reason[0] & B43_DMAIRQ_RX_DONE) {
1866 if (b43_using_pio_transfers(dev))
1867 b43_pio_rx(dev->pio.rx_queue);
1868 else
1869 b43_dma_rx(dev->dma.rx_ring);
1870 }
Michael Buesche4d6b792007-09-18 15:39:42 -04001871 B43_WARN_ON(dma_reason[1] & B43_DMAIRQ_RX_DONE);
1872 B43_WARN_ON(dma_reason[2] & B43_DMAIRQ_RX_DONE);
Michael Bueschb27faf82008-03-06 16:32:46 +01001873 B43_WARN_ON(dma_reason[3] & B43_DMAIRQ_RX_DONE);
Michael Buesche4d6b792007-09-18 15:39:42 -04001874 B43_WARN_ON(dma_reason[4] & B43_DMAIRQ_RX_DONE);
1875 B43_WARN_ON(dma_reason[5] & B43_DMAIRQ_RX_DONE);
1876
Michael Buesch21954c32007-09-27 15:31:40 +02001877 if (reason & B43_IRQ_TX_OK)
Michael Buesche4d6b792007-09-18 15:39:42 -04001878 handle_irq_transmit_status(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04001879
Michael Buesch36dbd952009-09-04 22:51:29 +02001880 /* Re-enable interrupts on the device by restoring the current interrupt mask. */
Michael Buesch13790722009-04-08 21:26:27 +02001881 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
Michael Buesch990b86f2009-09-12 00:48:03 +02001882
1883#if B43_DEBUG
1884 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) {
1885 dev->irq_count++;
1886 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) {
1887 if (reason & (1 << i))
1888 dev->irq_bit_count[i]++;
1889 }
1890 }
1891#endif
Michael Buesche4d6b792007-09-18 15:39:42 -04001892}
1893
Michael Buesch36dbd952009-09-04 22:51:29 +02001894/* Interrupt thread handler. Handles device interrupts in thread context. */
1895static irqreturn_t b43_interrupt_thread_handler(int irq, void *dev_id)
Michael Buesche4d6b792007-09-18 15:39:42 -04001896{
Michael Buesche4d6b792007-09-18 15:39:42 -04001897 struct b43_wldev *dev = dev_id;
Michael Buesch36dbd952009-09-04 22:51:29 +02001898
1899 mutex_lock(&dev->wl->mutex);
1900 b43_do_interrupt_thread(dev);
1901 mmiowb();
1902 mutex_unlock(&dev->wl->mutex);
1903
1904 return IRQ_HANDLED;
1905}
1906
1907static irqreturn_t b43_do_interrupt(struct b43_wldev *dev)
1908{
Michael Buesche4d6b792007-09-18 15:39:42 -04001909 u32 reason;
1910
Michael Buesch36dbd952009-09-04 22:51:29 +02001911 /* This code runs under wl->hardirq_lock, but _only_ on non-SDIO busses.
1912 * On SDIO, this runs under wl->mutex. */
Michael Buesche4d6b792007-09-18 15:39:42 -04001913
Michael Buesche4d6b792007-09-18 15:39:42 -04001914 reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
1915 if (reason == 0xffffffff) /* shared IRQ */
Michael Buesch36dbd952009-09-04 22:51:29 +02001916 return IRQ_NONE;
Michael Buesch13790722009-04-08 21:26:27 +02001917 reason &= dev->irq_mask;
Michael Buesche4d6b792007-09-18 15:39:42 -04001918 if (!reason)
Michael Buesch36dbd952009-09-04 22:51:29 +02001919 return IRQ_HANDLED;
Michael Buesche4d6b792007-09-18 15:39:42 -04001920
1921 dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON)
1922 & 0x0001DC00;
1923 dev->dma_reason[1] = b43_read32(dev, B43_MMIO_DMA1_REASON)
1924 & 0x0000DC00;
1925 dev->dma_reason[2] = b43_read32(dev, B43_MMIO_DMA2_REASON)
1926 & 0x0000DC00;
1927 dev->dma_reason[3] = b43_read32(dev, B43_MMIO_DMA3_REASON)
1928 & 0x0001DC00;
1929 dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON)
1930 & 0x0000DC00;
Michael Buesch13790722009-04-08 21:26:27 +02001931/* Unused ring
Michael Buesche4d6b792007-09-18 15:39:42 -04001932 dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON)
1933 & 0x0000DC00;
Michael Buesch13790722009-04-08 21:26:27 +02001934*/
Michael Buesche4d6b792007-09-18 15:39:42 -04001935
Michael Buesch36dbd952009-09-04 22:51:29 +02001936 /* ACK the interrupt. */
1937 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, reason);
1938 b43_write32(dev, B43_MMIO_DMA0_REASON, dev->dma_reason[0]);
1939 b43_write32(dev, B43_MMIO_DMA1_REASON, dev->dma_reason[1]);
1940 b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]);
1941 b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]);
1942 b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]);
1943/* Unused ring
1944 b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]);
1945*/
1946
1947 /* Disable IRQs on the device. The IRQ thread handler will re-enable them. */
Michael Buesch13790722009-04-08 21:26:27 +02001948 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
Michael Buesch36dbd952009-09-04 22:51:29 +02001949 /* Save the reason bitmasks for the IRQ thread handler. */
Michael Buesche4d6b792007-09-18 15:39:42 -04001950 dev->irq_reason = reason;
Michael Buesch36dbd952009-09-04 22:51:29 +02001951
1952 return IRQ_WAKE_THREAD;
1953}
1954
1955/* Interrupt handler top-half. This runs with interrupts disabled. */
1956static irqreturn_t b43_interrupt_handler(int irq, void *dev_id)
1957{
1958 struct b43_wldev *dev = dev_id;
1959 irqreturn_t ret;
1960
1961 if (unlikely(b43_status(dev) < B43_STAT_STARTED))
1962 return IRQ_NONE;
1963
1964 spin_lock(&dev->wl->hardirq_lock);
1965 ret = b43_do_interrupt(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04001966 mmiowb();
Michael Buesch36dbd952009-09-04 22:51:29 +02001967 spin_unlock(&dev->wl->hardirq_lock);
Michael Buesche4d6b792007-09-18 15:39:42 -04001968
1969 return ret;
1970}
1971
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001972/* SDIO interrupt handler. This runs in process context. */
1973static void b43_sdio_interrupt_handler(struct b43_wldev *dev)
1974{
1975 struct b43_wl *wl = dev->wl;
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001976 irqreturn_t ret;
1977
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001978 mutex_lock(&wl->mutex);
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001979
1980 ret = b43_do_interrupt(dev);
1981 if (ret == IRQ_WAKE_THREAD)
1982 b43_do_interrupt_thread(dev);
1983
Albert Herranz3dbba8e2009-09-10 19:34:49 +02001984 mutex_unlock(&wl->mutex);
1985}
1986
Michael Buesch1a9f5092009-01-23 21:21:51 +01001987void b43_do_release_fw(struct b43_firmware_file *fw)
Michael Buesch61cb5dd2008-01-21 19:55:09 +01001988{
1989 release_firmware(fw->data);
1990 fw->data = NULL;
1991 fw->filename = NULL;
1992}
1993
Michael Buesche4d6b792007-09-18 15:39:42 -04001994static void b43_release_firmware(struct b43_wldev *dev)
1995{
Michael Buesch1a9f5092009-01-23 21:21:51 +01001996 b43_do_release_fw(&dev->fw.ucode);
1997 b43_do_release_fw(&dev->fw.pcm);
1998 b43_do_release_fw(&dev->fw.initvals);
1999 b43_do_release_fw(&dev->fw.initvals_band);
Michael Buesche4d6b792007-09-18 15:39:42 -04002000}
2001
Michael Buescheb189d82008-01-28 14:47:41 -08002002static void b43_print_fw_helptext(struct b43_wl *wl, bool error)
Michael Buesche4d6b792007-09-18 15:39:42 -04002003{
Hannes Ederfc68ed42009-02-14 11:50:06 +00002004 const char text[] =
2005 "You must go to " \
2006 "http://wireless.kernel.org/en/users/Drivers/b43#devicefirmware " \
2007 "and download the correct firmware for this driver version. " \
2008 "Please carefully read all instructions on this website.\n";
Michael Buescheb189d82008-01-28 14:47:41 -08002009
Michael Buescheb189d82008-01-28 14:47:41 -08002010 if (error)
2011 b43err(wl, text);
2012 else
2013 b43warn(wl, text);
Michael Buesche4d6b792007-09-18 15:39:42 -04002014}
2015
Michael Buesch1a9f5092009-01-23 21:21:51 +01002016int b43_do_request_fw(struct b43_request_fw_context *ctx,
2017 const char *name,
2018 struct b43_firmware_file *fw)
Michael Buesche4d6b792007-09-18 15:39:42 -04002019{
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002020 const struct firmware *blob;
Michael Buesche4d6b792007-09-18 15:39:42 -04002021 struct b43_fw_header *hdr;
2022 u32 size;
2023 int err;
2024
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002025 if (!name) {
2026 /* Don't fetch anything. Free possibly cached firmware. */
Michael Buesch1a9f5092009-01-23 21:21:51 +01002027 /* FIXME: We should probably keep it anyway, to save some headache
2028 * on suspend/resume with multiband devices. */
2029 b43_do_release_fw(fw);
Michael Buesche4d6b792007-09-18 15:39:42 -04002030 return 0;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002031 }
2032 if (fw->filename) {
Michael Buesch1a9f5092009-01-23 21:21:51 +01002033 if ((fw->type == ctx->req_type) &&
2034 (strcmp(fw->filename, name) == 0))
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002035 return 0; /* Already have this fw. */
2036 /* Free the cached firmware first. */
Michael Buesch1a9f5092009-01-23 21:21:51 +01002037 /* FIXME: We should probably do this later after we successfully
2038 * got the new fw. This could reduce headache with multiband devices.
2039 * We could also redesign this to cache the firmware for all possible
2040 * bands all the time. */
2041 b43_do_release_fw(fw);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002042 }
Michael Buesche4d6b792007-09-18 15:39:42 -04002043
Michael Buesch1a9f5092009-01-23 21:21:51 +01002044 switch (ctx->req_type) {
2045 case B43_FWTYPE_PROPRIETARY:
2046 snprintf(ctx->fwname, sizeof(ctx->fwname),
2047 "b43%s/%s.fw",
2048 modparam_fwpostfix, name);
2049 break;
2050 case B43_FWTYPE_OPENSOURCE:
2051 snprintf(ctx->fwname, sizeof(ctx->fwname),
2052 "b43-open%s/%s.fw",
2053 modparam_fwpostfix, name);
2054 break;
2055 default:
2056 B43_WARN_ON(1);
2057 return -ENOSYS;
2058 }
2059 err = request_firmware(&blob, ctx->fwname, ctx->dev->dev->dev);
Michael Buesch68217832008-05-17 23:43:57 +02002060 if (err == -ENOENT) {
Michael Buesch1a9f5092009-01-23 21:21:51 +01002061 snprintf(ctx->errors[ctx->req_type],
2062 sizeof(ctx->errors[ctx->req_type]),
2063 "Firmware file \"%s\" not found\n", ctx->fwname);
Michael Buesch68217832008-05-17 23:43:57 +02002064 return err;
2065 } else if (err) {
Michael Buesch1a9f5092009-01-23 21:21:51 +01002066 snprintf(ctx->errors[ctx->req_type],
2067 sizeof(ctx->errors[ctx->req_type]),
2068 "Firmware file \"%s\" request failed (err=%d)\n",
2069 ctx->fwname, err);
Michael Buesche4d6b792007-09-18 15:39:42 -04002070 return err;
2071 }
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002072 if (blob->size < sizeof(struct b43_fw_header))
Michael Buesche4d6b792007-09-18 15:39:42 -04002073 goto err_format;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002074 hdr = (struct b43_fw_header *)(blob->data);
Michael Buesche4d6b792007-09-18 15:39:42 -04002075 switch (hdr->type) {
2076 case B43_FW_TYPE_UCODE:
2077 case B43_FW_TYPE_PCM:
2078 size = be32_to_cpu(hdr->size);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002079 if (size != blob->size - sizeof(struct b43_fw_header))
Michael Buesche4d6b792007-09-18 15:39:42 -04002080 goto err_format;
2081 /* fallthrough */
2082 case B43_FW_TYPE_IV:
2083 if (hdr->ver != 1)
2084 goto err_format;
2085 break;
2086 default:
2087 goto err_format;
2088 }
2089
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002090 fw->data = blob;
2091 fw->filename = name;
Michael Buesch1a9f5092009-01-23 21:21:51 +01002092 fw->type = ctx->req_type;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002093
2094 return 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04002095
2096err_format:
Michael Buesch1a9f5092009-01-23 21:21:51 +01002097 snprintf(ctx->errors[ctx->req_type],
2098 sizeof(ctx->errors[ctx->req_type]),
2099 "Firmware file \"%s\" format error.\n", ctx->fwname);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002100 release_firmware(blob);
2101
Michael Buesche4d6b792007-09-18 15:39:42 -04002102 return -EPROTO;
2103}
2104
Michael Buesch1a9f5092009-01-23 21:21:51 +01002105static int b43_try_request_fw(struct b43_request_fw_context *ctx)
Michael Buesche4d6b792007-09-18 15:39:42 -04002106{
Michael Buesch1a9f5092009-01-23 21:21:51 +01002107 struct b43_wldev *dev = ctx->dev;
2108 struct b43_firmware *fw = &ctx->dev->fw;
2109 const u8 rev = ctx->dev->dev->id.revision;
Michael Buesche4d6b792007-09-18 15:39:42 -04002110 const char *filename;
2111 u32 tmshigh;
2112 int err;
2113
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002114 /* Get microcode */
Michael Buesche4d6b792007-09-18 15:39:42 -04002115 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002116 if ((rev >= 5) && (rev <= 10))
2117 filename = "ucode5";
2118 else if ((rev >= 11) && (rev <= 12))
2119 filename = "ucode11";
Gábor Stefanik759b9732009-08-14 14:39:53 +02002120 else if (rev == 13)
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002121 filename = "ucode13";
Gábor Stefanik759b9732009-08-14 14:39:53 +02002122 else if (rev == 14)
2123 filename = "ucode14";
Rafał Miłeckie41596a2010-12-21 11:50:19 +01002124 else if (rev == 15)
Gábor Stefanik759b9732009-08-14 14:39:53 +02002125 filename = "ucode15";
Rafał Miłeckie41596a2010-12-21 11:50:19 +01002126 else if ((rev >= 16) && (rev <= 20))
2127 filename = "ucode16_mimo";
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002128 else
2129 goto err_no_ucode;
Michael Buesch1a9f5092009-01-23 21:21:51 +01002130 err = b43_do_request_fw(ctx, filename, &fw->ucode);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002131 if (err)
2132 goto err_load;
2133
2134 /* Get PCM code */
2135 if ((rev >= 5) && (rev <= 10))
2136 filename = "pcm5";
2137 else if (rev >= 11)
2138 filename = NULL;
2139 else
2140 goto err_no_pcm;
Michael Buesch68217832008-05-17 23:43:57 +02002141 fw->pcm_request_failed = 0;
Michael Buesch1a9f5092009-01-23 21:21:51 +01002142 err = b43_do_request_fw(ctx, filename, &fw->pcm);
Michael Buesch68217832008-05-17 23:43:57 +02002143 if (err == -ENOENT) {
2144 /* We did not find a PCM file? Not fatal, but
2145 * core rev <= 10 must do without hwcrypto then. */
2146 fw->pcm_request_failed = 1;
2147 } else if (err)
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002148 goto err_load;
2149
2150 /* Get initvals */
2151 switch (dev->phy.type) {
2152 case B43_PHYTYPE_A:
2153 if ((rev >= 5) && (rev <= 10)) {
2154 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2155 filename = "a0g1initvals5";
2156 else
2157 filename = "a0g0initvals5";
2158 } else
2159 goto err_no_initvals;
2160 break;
2161 case B43_PHYTYPE_G:
Michael Buesche4d6b792007-09-18 15:39:42 -04002162 if ((rev >= 5) && (rev <= 10))
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002163 filename = "b0g0initvals5";
Michael Buesche4d6b792007-09-18 15:39:42 -04002164 else if (rev >= 13)
Larry.Finger@lwfinger.nete9304882008-05-15 14:07:36 -05002165 filename = "b0g0initvals13";
Michael Buesche4d6b792007-09-18 15:39:42 -04002166 else
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002167 goto err_no_initvals;
2168 break;
2169 case B43_PHYTYPE_N:
Rafał Miłeckie41596a2010-12-21 11:50:19 +01002170 if (rev >= 16)
2171 filename = "n0initvals16";
2172 else if ((rev >= 11) && (rev <= 12))
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002173 filename = "n0initvals11";
2174 else
2175 goto err_no_initvals;
2176 break;
Gábor Stefanik759b9732009-08-14 14:39:53 +02002177 case B43_PHYTYPE_LP:
2178 if (rev == 13)
2179 filename = "lp0initvals13";
2180 else if (rev == 14)
2181 filename = "lp0initvals14";
2182 else if (rev >= 15)
2183 filename = "lp0initvals15";
2184 else
2185 goto err_no_initvals;
2186 break;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002187 default:
2188 goto err_no_initvals;
Michael Buesche4d6b792007-09-18 15:39:42 -04002189 }
Michael Buesch1a9f5092009-01-23 21:21:51 +01002190 err = b43_do_request_fw(ctx, filename, &fw->initvals);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002191 if (err)
2192 goto err_load;
2193
2194 /* Get bandswitch initvals */
2195 switch (dev->phy.type) {
2196 case B43_PHYTYPE_A:
2197 if ((rev >= 5) && (rev <= 10)) {
2198 if (tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY)
2199 filename = "a0g1bsinitvals5";
2200 else
2201 filename = "a0g0bsinitvals5";
2202 } else if (rev >= 11)
2203 filename = NULL;
2204 else
2205 goto err_no_initvals;
2206 break;
2207 case B43_PHYTYPE_G:
Michael Buesche4d6b792007-09-18 15:39:42 -04002208 if ((rev >= 5) && (rev <= 10))
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002209 filename = "b0g0bsinitvals5";
Michael Buesche4d6b792007-09-18 15:39:42 -04002210 else if (rev >= 11)
2211 filename = NULL;
2212 else
Michael Buesche4d6b792007-09-18 15:39:42 -04002213 goto err_no_initvals;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002214 break;
2215 case B43_PHYTYPE_N:
Rafał Miłeckie41596a2010-12-21 11:50:19 +01002216 if (rev >= 16)
2217 filename = "n0bsinitvals16";
2218 else if ((rev >= 11) && (rev <= 12))
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002219 filename = "n0bsinitvals11";
2220 else
Michael Buesche4d6b792007-09-18 15:39:42 -04002221 goto err_no_initvals;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002222 break;
Gábor Stefanik759b9732009-08-14 14:39:53 +02002223 case B43_PHYTYPE_LP:
2224 if (rev == 13)
2225 filename = "lp0bsinitvals13";
2226 else if (rev == 14)
2227 filename = "lp0bsinitvals14";
2228 else if (rev >= 15)
2229 filename = "lp0bsinitvals15";
2230 else
2231 goto err_no_initvals;
2232 break;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002233 default:
2234 goto err_no_initvals;
Michael Buesche4d6b792007-09-18 15:39:42 -04002235 }
Michael Buesch1a9f5092009-01-23 21:21:51 +01002236 err = b43_do_request_fw(ctx, filename, &fw->initvals_band);
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002237 if (err)
2238 goto err_load;
Michael Buesche4d6b792007-09-18 15:39:42 -04002239
2240 return 0;
2241
Michael Buesche4d6b792007-09-18 15:39:42 -04002242err_no_ucode:
Michael Buesch1a9f5092009-01-23 21:21:51 +01002243 err = ctx->fatal_failure = -EOPNOTSUPP;
2244 b43err(dev->wl, "The driver does not know which firmware (ucode) "
2245 "is required for your device (wl-core rev %u)\n", rev);
Michael Buesche4d6b792007-09-18 15:39:42 -04002246 goto error;
2247
2248err_no_pcm:
Michael Buesch1a9f5092009-01-23 21:21:51 +01002249 err = ctx->fatal_failure = -EOPNOTSUPP;
2250 b43err(dev->wl, "The driver does not know which firmware (PCM) "
2251 "is required for your device (wl-core rev %u)\n", rev);
Michael Buesche4d6b792007-09-18 15:39:42 -04002252 goto error;
2253
2254err_no_initvals:
Michael Buesch1a9f5092009-01-23 21:21:51 +01002255 err = ctx->fatal_failure = -EOPNOTSUPP;
2256 b43err(dev->wl, "The driver does not know which firmware (initvals) "
2257 "is required for your device (wl-core rev %u)\n", rev);
2258 goto error;
2259
2260err_load:
2261 /* We failed to load this firmware image. The error message
2262 * already is in ctx->errors. Return and let our caller decide
2263 * what to do. */
Michael Buesche4d6b792007-09-18 15:39:42 -04002264 goto error;
2265
2266error:
2267 b43_release_firmware(dev);
2268 return err;
2269}
2270
Michael Buesch1a9f5092009-01-23 21:21:51 +01002271static int b43_request_firmware(struct b43_wldev *dev)
2272{
2273 struct b43_request_fw_context *ctx;
2274 unsigned int i;
2275 int err;
2276 const char *errmsg;
2277
2278 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
2279 if (!ctx)
2280 return -ENOMEM;
2281 ctx->dev = dev;
2282
2283 ctx->req_type = B43_FWTYPE_PROPRIETARY;
2284 err = b43_try_request_fw(ctx);
2285 if (!err)
2286 goto out; /* Successfully loaded it. */
2287 err = ctx->fatal_failure;
2288 if (err)
2289 goto out;
2290
2291 ctx->req_type = B43_FWTYPE_OPENSOURCE;
2292 err = b43_try_request_fw(ctx);
2293 if (!err)
2294 goto out; /* Successfully loaded it. */
2295 err = ctx->fatal_failure;
2296 if (err)
2297 goto out;
2298
2299 /* Could not find a usable firmware. Print the errors. */
2300 for (i = 0; i < B43_NR_FWTYPES; i++) {
2301 errmsg = ctx->errors[i];
2302 if (strlen(errmsg))
2303 b43err(dev->wl, errmsg);
2304 }
2305 b43_print_fw_helptext(dev->wl, 1);
2306 err = -ENOENT;
2307
2308out:
2309 kfree(ctx);
2310 return err;
2311}
2312
Michael Buesche4d6b792007-09-18 15:39:42 -04002313static int b43_upload_microcode(struct b43_wldev *dev)
2314{
John W. Linville652caa52010-07-29 13:27:28 -04002315 struct wiphy *wiphy = dev->wl->hw->wiphy;
Michael Buesche4d6b792007-09-18 15:39:42 -04002316 const size_t hdr_len = sizeof(struct b43_fw_header);
2317 const __be32 *data;
2318 unsigned int i, len;
2319 u16 fwrev, fwpatch, fwdate, fwtime;
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002320 u32 tmp, macctl;
Michael Buesche4d6b792007-09-18 15:39:42 -04002321 int err = 0;
2322
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002323 /* Jump the microcode PSM to offset 0 */
2324 macctl = b43_read32(dev, B43_MMIO_MACCTL);
2325 B43_WARN_ON(macctl & B43_MACCTL_PSM_RUN);
2326 macctl |= B43_MACCTL_PSM_JMP0;
2327 b43_write32(dev, B43_MMIO_MACCTL, macctl);
2328 /* Zero out all microcode PSM registers and shared memory. */
2329 for (i = 0; i < 64; i++)
2330 b43_shm_write16(dev, B43_SHM_SCRATCH, i, 0);
2331 for (i = 0; i < 4096; i += 2)
2332 b43_shm_write16(dev, B43_SHM_SHARED, i, 0);
2333
Michael Buesche4d6b792007-09-18 15:39:42 -04002334 /* Upload Microcode. */
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002335 data = (__be32 *) (dev->fw.ucode.data->data + hdr_len);
2336 len = (dev->fw.ucode.data->size - hdr_len) / sizeof(__be32);
Michael Buesche4d6b792007-09-18 15:39:42 -04002337 b43_shm_control_word(dev, B43_SHM_UCODE | B43_SHM_AUTOINC_W, 0x0000);
2338 for (i = 0; i < len; i++) {
2339 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));
2340 udelay(10);
2341 }
2342
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002343 if (dev->fw.pcm.data) {
Michael Buesche4d6b792007-09-18 15:39:42 -04002344 /* Upload PCM data. */
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002345 data = (__be32 *) (dev->fw.pcm.data->data + hdr_len);
2346 len = (dev->fw.pcm.data->size - hdr_len) / sizeof(__be32);
Michael Buesche4d6b792007-09-18 15:39:42 -04002347 b43_shm_control_word(dev, B43_SHM_HW, 0x01EA);
2348 b43_write32(dev, B43_MMIO_SHM_DATA, 0x00004000);
2349 /* No need for autoinc bit in SHM_HW */
2350 b43_shm_control_word(dev, B43_SHM_HW, 0x01EB);
2351 for (i = 0; i < len; i++) {
2352 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i]));
2353 udelay(10);
2354 }
2355 }
2356
2357 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL);
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002358
2359 /* Start the microcode PSM */
2360 macctl = b43_read32(dev, B43_MMIO_MACCTL);
2361 macctl &= ~B43_MACCTL_PSM_JMP0;
2362 macctl |= B43_MACCTL_PSM_RUN;
2363 b43_write32(dev, B43_MMIO_MACCTL, macctl);
Michael Buesche4d6b792007-09-18 15:39:42 -04002364
2365 /* Wait for the microcode to load and respond */
2366 i = 0;
2367 while (1) {
2368 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2369 if (tmp == B43_IRQ_MAC_SUSPENDED)
2370 break;
2371 i++;
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002372 if (i >= 20) {
Michael Buesche4d6b792007-09-18 15:39:42 -04002373 b43err(dev->wl, "Microcode not responding\n");
Michael Buescheb189d82008-01-28 14:47:41 -08002374 b43_print_fw_helptext(dev->wl, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04002375 err = -ENODEV;
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002376 goto error;
Michael Buesche4d6b792007-09-18 15:39:42 -04002377 }
Michael Buesche175e992009-09-11 18:31:32 +02002378 msleep(50);
Michael Buesche4d6b792007-09-18 15:39:42 -04002379 }
2380 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read */
2381
2382 /* Get and check the revisions. */
2383 fwrev = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEREV);
2384 fwpatch = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEPATCH);
2385 fwdate = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEDATE);
2386 fwtime = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODETIME);
2387
2388 if (fwrev <= 0x128) {
2389 b43err(dev->wl, "YOUR FIRMWARE IS TOO OLD. Firmware from "
2390 "binary drivers older than version 4.x is unsupported. "
2391 "You must upgrade your firmware files.\n");
Michael Buescheb189d82008-01-28 14:47:41 -08002392 b43_print_fw_helptext(dev->wl, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04002393 err = -EOPNOTSUPP;
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002394 goto error;
Michael Buesche4d6b792007-09-18 15:39:42 -04002395 }
Michael Buesche4d6b792007-09-18 15:39:42 -04002396 dev->fw.rev = fwrev;
2397 dev->fw.patch = fwpatch;
Michael Buesche48b0ee2008-05-17 22:44:35 +02002398 dev->fw.opensource = (fwdate == 0xFFFF);
2399
Michael Buesch403a3a12009-06-08 21:04:57 +02002400 /* Default to use-all-queues. */
2401 dev->wl->hw->queues = dev->wl->mac80211_initially_registered_queues;
2402 dev->qos_enabled = !!modparam_qos;
2403 /* Default to firmware/hardware crypto acceleration. */
2404 dev->hwcrypto_enabled = 1;
2405
Michael Buesche48b0ee2008-05-17 22:44:35 +02002406 if (dev->fw.opensource) {
Michael Buesch403a3a12009-06-08 21:04:57 +02002407 u16 fwcapa;
2408
Michael Buesche48b0ee2008-05-17 22:44:35 +02002409 /* Patchlevel info is encoded in the "time" field. */
2410 dev->fw.patch = fwtime;
Michael Buesch403a3a12009-06-08 21:04:57 +02002411 b43info(dev->wl, "Loading OpenSource firmware version %u.%u\n",
2412 dev->fw.rev, dev->fw.patch);
2413
2414 fwcapa = b43_fwcapa_read(dev);
2415 if (!(fwcapa & B43_FWCAPA_HWCRYPTO) || dev->fw.pcm_request_failed) {
2416 b43info(dev->wl, "Hardware crypto acceleration not supported by firmware\n");
2417 /* Disable hardware crypto and fall back to software crypto. */
2418 dev->hwcrypto_enabled = 0;
2419 }
2420 if (!(fwcapa & B43_FWCAPA_QOS)) {
2421 b43info(dev->wl, "QoS not supported by firmware\n");
2422 /* Disable QoS. Tweak hw->queues to 1. It will be restored before
2423 * ieee80211_unregister to make sure the networking core can
2424 * properly free possible resources. */
2425 dev->wl->hw->queues = 1;
2426 dev->qos_enabled = 0;
2427 }
Michael Buesche48b0ee2008-05-17 22:44:35 +02002428 } else {
2429 b43info(dev->wl, "Loading firmware version %u.%u "
2430 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n",
2431 fwrev, fwpatch,
2432 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
2433 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
Michael Buesch68217832008-05-17 23:43:57 +02002434 if (dev->fw.pcm_request_failed) {
2435 b43warn(dev->wl, "No \"pcm5.fw\" firmware file found. "
2436 "Hardware accelerated cryptography is disabled.\n");
2437 b43_print_fw_helptext(dev->wl, 0);
2438 }
Michael Buesche48b0ee2008-05-17 22:44:35 +02002439 }
Michael Buesche4d6b792007-09-18 15:39:42 -04002440
John W. Linville652caa52010-07-29 13:27:28 -04002441 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
2442 dev->fw.rev, dev->fw.patch);
2443 wiphy->hw_version = dev->dev->id.coreid;
2444
Michael Buescheb189d82008-01-28 14:47:41 -08002445 if (b43_is_old_txhdr_format(dev)) {
Michael Bueschc5572892008-12-27 18:26:39 +01002446 /* We're over the deadline, but we keep support for old fw
2447 * until it turns out to be in major conflict with something new. */
Michael Buescheb189d82008-01-28 14:47:41 -08002448 b43warn(dev->wl, "You are using an old firmware image. "
Michael Bueschc5572892008-12-27 18:26:39 +01002449 "Support for old firmware will be removed soon "
2450 "(official deadline was July 2008).\n");
Michael Buescheb189d82008-01-28 14:47:41 -08002451 b43_print_fw_helptext(dev->wl, 0);
2452 }
2453
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002454 return 0;
2455
2456error:
2457 macctl = b43_read32(dev, B43_MMIO_MACCTL);
2458 macctl &= ~B43_MACCTL_PSM_RUN;
2459 macctl |= B43_MACCTL_PSM_JMP0;
2460 b43_write32(dev, B43_MMIO_MACCTL, macctl);
2461
Michael Buesche4d6b792007-09-18 15:39:42 -04002462 return err;
2463}
2464
2465static int b43_write_initvals(struct b43_wldev *dev,
2466 const struct b43_iv *ivals,
2467 size_t count,
2468 size_t array_size)
2469{
2470 const struct b43_iv *iv;
2471 u16 offset;
2472 size_t i;
2473 bool bit32;
2474
2475 BUILD_BUG_ON(sizeof(struct b43_iv) != 6);
2476 iv = ivals;
2477 for (i = 0; i < count; i++) {
2478 if (array_size < sizeof(iv->offset_size))
2479 goto err_format;
2480 array_size -= sizeof(iv->offset_size);
2481 offset = be16_to_cpu(iv->offset_size);
2482 bit32 = !!(offset & B43_IV_32BIT);
2483 offset &= B43_IV_OFFSET_MASK;
2484 if (offset >= 0x1000)
2485 goto err_format;
2486 if (bit32) {
2487 u32 value;
2488
2489 if (array_size < sizeof(iv->data.d32))
2490 goto err_format;
2491 array_size -= sizeof(iv->data.d32);
2492
Harvey Harrison533dd1b2008-04-29 01:03:36 -07002493 value = get_unaligned_be32(&iv->data.d32);
Michael Buesche4d6b792007-09-18 15:39:42 -04002494 b43_write32(dev, offset, value);
2495
2496 iv = (const struct b43_iv *)((const uint8_t *)iv +
2497 sizeof(__be16) +
2498 sizeof(__be32));
2499 } else {
2500 u16 value;
2501
2502 if (array_size < sizeof(iv->data.d16))
2503 goto err_format;
2504 array_size -= sizeof(iv->data.d16);
2505
2506 value = be16_to_cpu(iv->data.d16);
2507 b43_write16(dev, offset, value);
2508
2509 iv = (const struct b43_iv *)((const uint8_t *)iv +
2510 sizeof(__be16) +
2511 sizeof(__be16));
2512 }
2513 }
2514 if (array_size)
2515 goto err_format;
2516
2517 return 0;
2518
2519err_format:
2520 b43err(dev->wl, "Initial Values Firmware file-format error.\n");
Michael Buescheb189d82008-01-28 14:47:41 -08002521 b43_print_fw_helptext(dev->wl, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04002522
2523 return -EPROTO;
2524}
2525
2526static int b43_upload_initvals(struct b43_wldev *dev)
2527{
2528 const size_t hdr_len = sizeof(struct b43_fw_header);
2529 const struct b43_fw_header *hdr;
2530 struct b43_firmware *fw = &dev->fw;
2531 const struct b43_iv *ivals;
2532 size_t count;
2533 int err;
2534
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002535 hdr = (const struct b43_fw_header *)(fw->initvals.data->data);
2536 ivals = (const struct b43_iv *)(fw->initvals.data->data + hdr_len);
Michael Buesche4d6b792007-09-18 15:39:42 -04002537 count = be32_to_cpu(hdr->size);
2538 err = b43_write_initvals(dev, ivals, count,
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002539 fw->initvals.data->size - hdr_len);
Michael Buesche4d6b792007-09-18 15:39:42 -04002540 if (err)
2541 goto out;
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002542 if (fw->initvals_band.data) {
2543 hdr = (const struct b43_fw_header *)(fw->initvals_band.data->data);
2544 ivals = (const struct b43_iv *)(fw->initvals_band.data->data + hdr_len);
Michael Buesche4d6b792007-09-18 15:39:42 -04002545 count = be32_to_cpu(hdr->size);
2546 err = b43_write_initvals(dev, ivals, count,
Michael Buesch61cb5dd2008-01-21 19:55:09 +01002547 fw->initvals_band.data->size - hdr_len);
Michael Buesche4d6b792007-09-18 15:39:42 -04002548 if (err)
2549 goto out;
2550 }
2551out:
2552
2553 return err;
2554}
2555
2556/* Initialize the GPIOs
2557 * http://bcm-specs.sipsolutions.net/GPIO
2558 */
2559static int b43_gpio_init(struct b43_wldev *dev)
2560{
2561 struct ssb_bus *bus = dev->dev->bus;
2562 struct ssb_device *gpiodev, *pcidev = NULL;
2563 u32 mask, set;
2564
2565 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
2566 & ~B43_MACCTL_GPOUTSMSK);
2567
Michael Buesche4d6b792007-09-18 15:39:42 -04002568 b43_write16(dev, B43_MMIO_GPIO_MASK, b43_read16(dev, B43_MMIO_GPIO_MASK)
2569 | 0x000F);
2570
2571 mask = 0x0000001F;
2572 set = 0x0000000F;
2573 if (dev->dev->bus->chip_id == 0x4301) {
2574 mask |= 0x0060;
2575 set |= 0x0060;
2576 }
2577 if (0 /* FIXME: conditional unknown */ ) {
2578 b43_write16(dev, B43_MMIO_GPIO_MASK,
2579 b43_read16(dev, B43_MMIO_GPIO_MASK)
2580 | 0x0100);
2581 mask |= 0x0180;
2582 set |= 0x0180;
2583 }
Larry Finger95de2842007-11-09 16:57:18 -06002584 if (dev->dev->bus->sprom.boardflags_lo & B43_BFL_PACTRL) {
Michael Buesche4d6b792007-09-18 15:39:42 -04002585 b43_write16(dev, B43_MMIO_GPIO_MASK,
2586 b43_read16(dev, B43_MMIO_GPIO_MASK)
2587 | 0x0200);
2588 mask |= 0x0200;
2589 set |= 0x0200;
2590 }
2591 if (dev->dev->id.revision >= 2)
2592 mask |= 0x0010; /* FIXME: This is redundant. */
2593
2594#ifdef CONFIG_SSB_DRIVER_PCICORE
2595 pcidev = bus->pcicore.dev;
2596#endif
2597 gpiodev = bus->chipco.dev ? : pcidev;
2598 if (!gpiodev)
2599 return 0;
2600 ssb_write32(gpiodev, B43_GPIO_CONTROL,
2601 (ssb_read32(gpiodev, B43_GPIO_CONTROL)
2602 & mask) | set);
2603
2604 return 0;
2605}
2606
2607/* Turn off all GPIO stuff. Call this on module unload, for example. */
2608static void b43_gpio_cleanup(struct b43_wldev *dev)
2609{
2610 struct ssb_bus *bus = dev->dev->bus;
2611 struct ssb_device *gpiodev, *pcidev = NULL;
2612
2613#ifdef CONFIG_SSB_DRIVER_PCICORE
2614 pcidev = bus->pcicore.dev;
2615#endif
2616 gpiodev = bus->chipco.dev ? : pcidev;
2617 if (!gpiodev)
2618 return;
2619 ssb_write32(gpiodev, B43_GPIO_CONTROL, 0);
2620}
2621
2622/* http://bcm-specs.sipsolutions.net/EnableMac */
Michael Bueschf5eda472008-04-20 16:03:32 +02002623void b43_mac_enable(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -04002624{
Michael Buesch923fd702008-06-20 18:02:08 +02002625 if (b43_debug(dev, B43_DBG_FIRMWARE)) {
2626 u16 fwstate;
2627
2628 fwstate = b43_shm_read16(dev, B43_SHM_SHARED,
2629 B43_SHM_SH_UCODESTAT);
2630 if ((fwstate != B43_SHM_SH_UCODESTAT_SUSP) &&
2631 (fwstate != B43_SHM_SH_UCODESTAT_SLEEP)) {
2632 b43err(dev->wl, "b43_mac_enable(): The firmware "
2633 "should be suspended, but current state is %u\n",
2634 fwstate);
2635 }
2636 }
2637
Michael Buesche4d6b792007-09-18 15:39:42 -04002638 dev->mac_suspended--;
2639 B43_WARN_ON(dev->mac_suspended < 0);
2640 if (dev->mac_suspended == 0) {
2641 b43_write32(dev, B43_MMIO_MACCTL,
2642 b43_read32(dev, B43_MMIO_MACCTL)
2643 | B43_MACCTL_ENABLED);
2644 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON,
2645 B43_IRQ_MAC_SUSPENDED);
2646 /* Commit writes */
2647 b43_read32(dev, B43_MMIO_MACCTL);
2648 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2649 b43_power_saving_ctl_bits(dev, 0);
2650 }
2651}
2652
2653/* http://bcm-specs.sipsolutions.net/SuspendMAC */
Michael Bueschf5eda472008-04-20 16:03:32 +02002654void b43_mac_suspend(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -04002655{
2656 int i;
2657 u32 tmp;
2658
Michael Buesch05b64b32007-09-28 16:19:03 +02002659 might_sleep();
Michael Buesche4d6b792007-09-18 15:39:42 -04002660 B43_WARN_ON(dev->mac_suspended < 0);
Michael Buesch05b64b32007-09-28 16:19:03 +02002661
Michael Buesche4d6b792007-09-18 15:39:42 -04002662 if (dev->mac_suspended == 0) {
2663 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
2664 b43_write32(dev, B43_MMIO_MACCTL,
2665 b43_read32(dev, B43_MMIO_MACCTL)
2666 & ~B43_MACCTL_ENABLED);
2667 /* force pci to flush the write */
2668 b43_read32(dev, B43_MMIO_MACCTL);
Michael Bueschba380012008-04-15 21:13:36 +02002669 for (i = 35; i; i--) {
2670 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2671 if (tmp & B43_IRQ_MAC_SUSPENDED)
2672 goto out;
2673 udelay(10);
2674 }
2675 /* Hm, it seems this will take some time. Use msleep(). */
Michael Buesch05b64b32007-09-28 16:19:03 +02002676 for (i = 40; i; i--) {
Michael Buesche4d6b792007-09-18 15:39:42 -04002677 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2678 if (tmp & B43_IRQ_MAC_SUSPENDED)
2679 goto out;
Michael Buesch05b64b32007-09-28 16:19:03 +02002680 msleep(1);
Michael Buesche4d6b792007-09-18 15:39:42 -04002681 }
2682 b43err(dev->wl, "MAC suspend failed\n");
2683 }
Michael Buesch05b64b32007-09-28 16:19:03 +02002684out:
Michael Buesche4d6b792007-09-18 15:39:42 -04002685 dev->mac_suspended++;
2686}
2687
2688static void b43_adjust_opmode(struct b43_wldev *dev)
2689{
2690 struct b43_wl *wl = dev->wl;
2691 u32 ctl;
2692 u16 cfp_pretbtt;
2693
2694 ctl = b43_read32(dev, B43_MMIO_MACCTL);
2695 /* Reset status to STA infrastructure mode. */
2696 ctl &= ~B43_MACCTL_AP;
2697 ctl &= ~B43_MACCTL_KEEP_CTL;
2698 ctl &= ~B43_MACCTL_KEEP_BADPLCP;
2699 ctl &= ~B43_MACCTL_KEEP_BAD;
2700 ctl &= ~B43_MACCTL_PROMISC;
Johannes Berg4150c572007-09-17 01:29:23 -04002701 ctl &= ~B43_MACCTL_BEACPROMISC;
Michael Buesche4d6b792007-09-18 15:39:42 -04002702 ctl |= B43_MACCTL_INFRA;
2703
Johannes Berg05c914f2008-09-11 00:01:58 +02002704 if (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
2705 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT))
Johannes Berg4150c572007-09-17 01:29:23 -04002706 ctl |= B43_MACCTL_AP;
Johannes Berg05c914f2008-09-11 00:01:58 +02002707 else if (b43_is_mode(wl, NL80211_IFTYPE_ADHOC))
Johannes Berg4150c572007-09-17 01:29:23 -04002708 ctl &= ~B43_MACCTL_INFRA;
2709
2710 if (wl->filter_flags & FIF_CONTROL)
Michael Buesche4d6b792007-09-18 15:39:42 -04002711 ctl |= B43_MACCTL_KEEP_CTL;
Johannes Berg4150c572007-09-17 01:29:23 -04002712 if (wl->filter_flags & FIF_FCSFAIL)
2713 ctl |= B43_MACCTL_KEEP_BAD;
2714 if (wl->filter_flags & FIF_PLCPFAIL)
2715 ctl |= B43_MACCTL_KEEP_BADPLCP;
2716 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
Michael Buesche4d6b792007-09-18 15:39:42 -04002717 ctl |= B43_MACCTL_PROMISC;
Johannes Berg4150c572007-09-17 01:29:23 -04002718 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2719 ctl |= B43_MACCTL_BEACPROMISC;
2720
Michael Buesche4d6b792007-09-18 15:39:42 -04002721 /* Workaround: On old hardware the HW-MAC-address-filter
2722 * doesn't work properly, so always run promisc in filter
2723 * it in software. */
2724 if (dev->dev->id.revision <= 4)
2725 ctl |= B43_MACCTL_PROMISC;
2726
2727 b43_write32(dev, B43_MMIO_MACCTL, ctl);
2728
2729 cfp_pretbtt = 2;
2730 if ((ctl & B43_MACCTL_INFRA) && !(ctl & B43_MACCTL_AP)) {
2731 if (dev->dev->bus->chip_id == 0x4306 &&
2732 dev->dev->bus->chip_rev == 3)
2733 cfp_pretbtt = 100;
2734 else
2735 cfp_pretbtt = 50;
2736 }
2737 b43_write16(dev, 0x612, cfp_pretbtt);
Michael Buesch09ebe2f2009-09-12 00:52:48 +02002738
2739 /* FIXME: We don't currently implement the PMQ mechanism,
2740 * so always disable it. If we want to implement PMQ,
2741 * we need to enable it here (clear DISCPMQ) in AP mode.
2742 */
2743 if (0 /* ctl & B43_MACCTL_AP */) {
2744 b43_write32(dev, B43_MMIO_MACCTL,
2745 b43_read32(dev, B43_MMIO_MACCTL)
2746 & ~B43_MACCTL_DISCPMQ);
2747 } else {
2748 b43_write32(dev, B43_MMIO_MACCTL,
2749 b43_read32(dev, B43_MMIO_MACCTL)
2750 | B43_MACCTL_DISCPMQ);
2751 }
Michael Buesche4d6b792007-09-18 15:39:42 -04002752}
2753
2754static void b43_rate_memory_write(struct b43_wldev *dev, u16 rate, int is_ofdm)
2755{
2756 u16 offset;
2757
2758 if (is_ofdm) {
2759 offset = 0x480;
2760 offset += (b43_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2761 } else {
2762 offset = 0x4C0;
2763 offset += (b43_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2764 }
2765 b43_shm_write16(dev, B43_SHM_SHARED, offset + 0x20,
2766 b43_shm_read16(dev, B43_SHM_SHARED, offset));
2767}
2768
2769static void b43_rate_memory_init(struct b43_wldev *dev)
2770{
2771 switch (dev->phy.type) {
2772 case B43_PHYTYPE_A:
2773 case B43_PHYTYPE_G:
Michael Buesch53a6e232008-01-13 21:23:44 +01002774 case B43_PHYTYPE_N:
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02002775 case B43_PHYTYPE_LP:
Michael Buesche4d6b792007-09-18 15:39:42 -04002776 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1);
2777 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1);
2778 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1);
2779 b43_rate_memory_write(dev, B43_OFDM_RATE_24MB, 1);
2780 b43_rate_memory_write(dev, B43_OFDM_RATE_36MB, 1);
2781 b43_rate_memory_write(dev, B43_OFDM_RATE_48MB, 1);
2782 b43_rate_memory_write(dev, B43_OFDM_RATE_54MB, 1);
2783 if (dev->phy.type == B43_PHYTYPE_A)
2784 break;
2785 /* fallthrough */
2786 case B43_PHYTYPE_B:
2787 b43_rate_memory_write(dev, B43_CCK_RATE_1MB, 0);
2788 b43_rate_memory_write(dev, B43_CCK_RATE_2MB, 0);
2789 b43_rate_memory_write(dev, B43_CCK_RATE_5MB, 0);
2790 b43_rate_memory_write(dev, B43_CCK_RATE_11MB, 0);
2791 break;
2792 default:
2793 B43_WARN_ON(1);
2794 }
2795}
2796
Michael Buesch5042c502008-04-05 15:05:00 +02002797/* Set the default values for the PHY TX Control Words. */
2798static void b43_set_phytxctl_defaults(struct b43_wldev *dev)
2799{
2800 u16 ctl = 0;
2801
2802 ctl |= B43_TXH_PHY_ENC_CCK;
2803 ctl |= B43_TXH_PHY_ANT01AUTO;
2804 ctl |= B43_TXH_PHY_TXPWR;
2805
2806 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl);
2807 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, ctl);
2808 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, ctl);
2809}
2810
Michael Buesche4d6b792007-09-18 15:39:42 -04002811/* Set the TX-Antenna for management frames sent by firmware. */
2812static void b43_mgmtframe_txantenna(struct b43_wldev *dev, int antenna)
2813{
Michael Buesch5042c502008-04-05 15:05:00 +02002814 u16 ant;
Michael Buesche4d6b792007-09-18 15:39:42 -04002815 u16 tmp;
2816
Michael Buesch5042c502008-04-05 15:05:00 +02002817 ant = b43_antenna_to_phyctl(antenna);
Michael Buesche4d6b792007-09-18 15:39:42 -04002818
Michael Buesche4d6b792007-09-18 15:39:42 -04002819 /* For ACK/CTS */
2820 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL);
Michael Buescheb189d82008-01-28 14:47:41 -08002821 tmp = (tmp & ~B43_TXH_PHY_ANT) | ant;
Michael Buesche4d6b792007-09-18 15:39:42 -04002822 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, tmp);
2823 /* For Probe Resposes */
2824 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL);
Michael Buescheb189d82008-01-28 14:47:41 -08002825 tmp = (tmp & ~B43_TXH_PHY_ANT) | ant;
Michael Buesche4d6b792007-09-18 15:39:42 -04002826 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, tmp);
2827}
2828
2829/* This is the opposite of b43_chip_init() */
2830static void b43_chip_exit(struct b43_wldev *dev)
2831{
Michael Bueschfb111372008-09-02 13:00:34 +02002832 b43_phy_exit(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04002833 b43_gpio_cleanup(dev);
2834 /* firmware is released later */
2835}
2836
2837/* Initialize the chip
2838 * http://bcm-specs.sipsolutions.net/ChipInit
2839 */
2840static int b43_chip_init(struct b43_wldev *dev)
2841{
2842 struct b43_phy *phy = &dev->phy;
Michael Bueschef1a6282008-08-27 18:53:02 +02002843 int err;
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002844 u32 value32, macctl;
Michael Buesche4d6b792007-09-18 15:39:42 -04002845 u16 value16;
2846
Michael Buesch1f7d87b2008-01-22 20:23:34 +01002847 /* Initialize the MAC control */
2848 macctl = B43_MACCTL_IHR_ENABLED | B43_MACCTL_SHM_ENABLED;
2849 if (dev->phy.gmode)
2850 macctl |= B43_MACCTL_GMODE;
2851 macctl |= B43_MACCTL_INFRA;
2852 b43_write32(dev, B43_MMIO_MACCTL, macctl);
Michael Buesche4d6b792007-09-18 15:39:42 -04002853
2854 err = b43_request_firmware(dev);
2855 if (err)
2856 goto out;
2857 err = b43_upload_microcode(dev);
2858 if (err)
2859 goto out; /* firmware is released later */
2860
2861 err = b43_gpio_init(dev);
2862 if (err)
2863 goto out; /* firmware is released later */
Michael Buesch21954c32007-09-27 15:31:40 +02002864
Michael Buesche4d6b792007-09-18 15:39:42 -04002865 err = b43_upload_initvals(dev);
2866 if (err)
Larry Finger1a8d1222007-12-14 13:59:11 +01002867 goto err_gpio_clean;
Michael Buesche4d6b792007-09-18 15:39:42 -04002868
Michael Buesch0b7dcd92008-09-03 12:31:54 +02002869 /* Turn the Analog on and initialize the PHY. */
2870 phy->ops->switch_analog(dev, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04002871 err = b43_phy_init(dev);
2872 if (err)
Michael Bueschef1a6282008-08-27 18:53:02 +02002873 goto err_gpio_clean;
Michael Buesche4d6b792007-09-18 15:39:42 -04002874
Michael Bueschef1a6282008-08-27 18:53:02 +02002875 /* Disable Interference Mitigation. */
2876 if (phy->ops->interf_mitigation)
2877 phy->ops->interf_mitigation(dev, B43_INTERFMODE_NONE);
Michael Buesche4d6b792007-09-18 15:39:42 -04002878
Michael Bueschef1a6282008-08-27 18:53:02 +02002879 /* Select the antennae */
2880 if (phy->ops->set_rx_antenna)
2881 phy->ops->set_rx_antenna(dev, B43_ANTENNA_DEFAULT);
Michael Buesche4d6b792007-09-18 15:39:42 -04002882 b43_mgmtframe_txantenna(dev, B43_ANTENNA_DEFAULT);
2883
2884 if (phy->type == B43_PHYTYPE_B) {
2885 value16 = b43_read16(dev, 0x005E);
2886 value16 |= 0x0004;
2887 b43_write16(dev, 0x005E, value16);
2888 }
2889 b43_write32(dev, 0x0100, 0x01000000);
2890 if (dev->dev->id.revision < 5)
2891 b43_write32(dev, 0x010C, 0x01000000);
2892
2893 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
2894 & ~B43_MACCTL_INFRA);
2895 b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
2896 | B43_MACCTL_INFRA);
Michael Buesche4d6b792007-09-18 15:39:42 -04002897
Michael Buesche4d6b792007-09-18 15:39:42 -04002898 /* Probe Response Timeout value */
2899 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2900 b43_shm_write16(dev, B43_SHM_SHARED, 0x0074, 0x0000);
2901
2902 /* Initially set the wireless operation mode. */
2903 b43_adjust_opmode(dev);
2904
2905 if (dev->dev->id.revision < 3) {
2906 b43_write16(dev, 0x060E, 0x0000);
2907 b43_write16(dev, 0x0610, 0x8000);
2908 b43_write16(dev, 0x0604, 0x0000);
2909 b43_write16(dev, 0x0606, 0x0200);
2910 } else {
2911 b43_write32(dev, 0x0188, 0x80000000);
2912 b43_write32(dev, 0x018C, 0x02000000);
2913 }
2914 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, 0x00004000);
2915 b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2916 b43_write32(dev, B43_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2917 b43_write32(dev, B43_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2918 b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2919 b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2920 b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2921
2922 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2923 value32 |= 0x00100000;
2924 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2925
2926 b43_write16(dev, B43_MMIO_POWERUP_DELAY,
2927 dev->dev->bus->chipco.fast_pwrup_delay);
2928
2929 err = 0;
2930 b43dbg(dev->wl, "Chip initialized\n");
Michael Buesch21954c32007-09-27 15:31:40 +02002931out:
Michael Buesche4d6b792007-09-18 15:39:42 -04002932 return err;
2933
Larry Finger1a8d1222007-12-14 13:59:11 +01002934err_gpio_clean:
Michael Buesche4d6b792007-09-18 15:39:42 -04002935 b43_gpio_cleanup(dev);
Michael Buesch21954c32007-09-27 15:31:40 +02002936 return err;
Michael Buesche4d6b792007-09-18 15:39:42 -04002937}
2938
Michael Buesche4d6b792007-09-18 15:39:42 -04002939static void b43_periodic_every60sec(struct b43_wldev *dev)
2940{
Michael Bueschef1a6282008-08-27 18:53:02 +02002941 const struct b43_phy_operations *ops = dev->phy.ops;
Michael Buesche4d6b792007-09-18 15:39:42 -04002942
Michael Bueschef1a6282008-08-27 18:53:02 +02002943 if (ops->pwork_60sec)
2944 ops->pwork_60sec(dev);
Michael Buesch18c8ade2008-08-28 19:33:40 +02002945
2946 /* Force check the TX power emission now. */
2947 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME);
Michael Buesche4d6b792007-09-18 15:39:42 -04002948}
2949
2950static void b43_periodic_every30sec(struct b43_wldev *dev)
2951{
2952 /* Update device statistics. */
2953 b43_calculate_link_quality(dev);
2954}
2955
2956static void b43_periodic_every15sec(struct b43_wldev *dev)
2957{
2958 struct b43_phy *phy = &dev->phy;
Michael Buesch9b839a72008-06-20 17:44:02 +02002959 u16 wdr;
2960
2961 if (dev->fw.opensource) {
2962 /* Check if the firmware is still alive.
2963 * It will reset the watchdog counter to 0 in its idle loop. */
2964 wdr = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_WATCHDOG_REG);
2965 if (unlikely(wdr)) {
2966 b43err(dev->wl, "Firmware watchdog: The firmware died!\n");
2967 b43_controller_restart(dev, "Firmware watchdog");
2968 return;
2969 } else {
2970 b43_shm_write16(dev, B43_SHM_SCRATCH,
2971 B43_WATCHDOG_REG, 1);
2972 }
2973 }
Michael Buesche4d6b792007-09-18 15:39:42 -04002974
Michael Bueschef1a6282008-08-27 18:53:02 +02002975 if (phy->ops->pwork_15sec)
2976 phy->ops->pwork_15sec(dev);
2977
Stefano Brivio00e0b8c2007-11-25 11:10:33 +01002978 atomic_set(&phy->txerr_cnt, B43_PHY_TX_BADNESS_LIMIT);
2979 wmb();
Michael Buesch990b86f2009-09-12 00:48:03 +02002980
2981#if B43_DEBUG
2982 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) {
2983 unsigned int i;
2984
2985 b43dbg(dev->wl, "Stats: %7u IRQs/sec, %7u TX/sec, %7u RX/sec\n",
2986 dev->irq_count / 15,
2987 dev->tx_count / 15,
2988 dev->rx_count / 15);
2989 dev->irq_count = 0;
2990 dev->tx_count = 0;
2991 dev->rx_count = 0;
2992 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) {
2993 if (dev->irq_bit_count[i]) {
2994 b43dbg(dev->wl, "Stats: %7u IRQ-%02u/sec (0x%08X)\n",
2995 dev->irq_bit_count[i] / 15, i, (1 << i));
2996 dev->irq_bit_count[i] = 0;
2997 }
2998 }
2999 }
3000#endif
Michael Buesche4d6b792007-09-18 15:39:42 -04003001}
3002
Michael Buesche4d6b792007-09-18 15:39:42 -04003003static void do_periodic_work(struct b43_wldev *dev)
3004{
3005 unsigned int state;
3006
3007 state = dev->periodic_state;
Michael Buesch42bb4cd2007-09-28 14:22:33 +02003008 if (state % 4 == 0)
Michael Buesche4d6b792007-09-18 15:39:42 -04003009 b43_periodic_every60sec(dev);
Michael Buesch42bb4cd2007-09-28 14:22:33 +02003010 if (state % 2 == 0)
Michael Buesche4d6b792007-09-18 15:39:42 -04003011 b43_periodic_every30sec(dev);
Michael Buesch42bb4cd2007-09-28 14:22:33 +02003012 b43_periodic_every15sec(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04003013}
3014
Michael Buesch05b64b32007-09-28 16:19:03 +02003015/* Periodic work locking policy:
3016 * The whole periodic work handler is protected by
3017 * wl->mutex. If another lock is needed somewhere in the
Uwe Kleine-König21ae2952009-10-07 15:21:09 +02003018 * pwork callchain, it's acquired in-place, where it's needed.
Michael Buesche4d6b792007-09-18 15:39:42 -04003019 */
Michael Buesche4d6b792007-09-18 15:39:42 -04003020static void b43_periodic_work_handler(struct work_struct *work)
3021{
Michael Buesch05b64b32007-09-28 16:19:03 +02003022 struct b43_wldev *dev = container_of(work, struct b43_wldev,
3023 periodic_work.work);
3024 struct b43_wl *wl = dev->wl;
3025 unsigned long delay;
Michael Buesche4d6b792007-09-18 15:39:42 -04003026
Michael Buesch05b64b32007-09-28 16:19:03 +02003027 mutex_lock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003028
3029 if (unlikely(b43_status(dev) != B43_STAT_STARTED))
3030 goto out;
3031 if (b43_debug(dev, B43_DBG_PWORK_STOP))
3032 goto out_requeue;
3033
Michael Buesch05b64b32007-09-28 16:19:03 +02003034 do_periodic_work(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04003035
Michael Buesche4d6b792007-09-18 15:39:42 -04003036 dev->periodic_state++;
Michael Buesch42bb4cd2007-09-28 14:22:33 +02003037out_requeue:
Michael Buesche4d6b792007-09-18 15:39:42 -04003038 if (b43_debug(dev, B43_DBG_PWORK_FAST))
3039 delay = msecs_to_jiffies(50);
3040 else
Anton Blanchard82cd6822007-10-15 00:42:23 -05003041 delay = round_jiffies_relative(HZ * 15);
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04003042 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
Michael Buesch42bb4cd2007-09-28 14:22:33 +02003043out:
Michael Buesch05b64b32007-09-28 16:19:03 +02003044 mutex_unlock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003045}
3046
3047static void b43_periodic_tasks_setup(struct b43_wldev *dev)
3048{
3049 struct delayed_work *work = &dev->periodic_work;
3050
3051 dev->periodic_state = 0;
3052 INIT_DELAYED_WORK(work, b43_periodic_work_handler);
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04003053 ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
Michael Buesche4d6b792007-09-18 15:39:42 -04003054}
3055
Michael Bueschf3dd3fc2007-12-22 21:56:30 +01003056/* Check if communication with the device works correctly. */
Michael Buesche4d6b792007-09-18 15:39:42 -04003057static int b43_validate_chipaccess(struct b43_wldev *dev)
3058{
Michael Bueschf62ae6c2009-07-31 20:51:41 +02003059 u32 v, backup0, backup4;
Michael Buesche4d6b792007-09-18 15:39:42 -04003060
Michael Bueschf62ae6c2009-07-31 20:51:41 +02003061 backup0 = b43_shm_read32(dev, B43_SHM_SHARED, 0);
3062 backup4 = b43_shm_read32(dev, B43_SHM_SHARED, 4);
Michael Bueschf3dd3fc2007-12-22 21:56:30 +01003063
3064 /* Check for read/write and endianness problems. */
Michael Buesche4d6b792007-09-18 15:39:42 -04003065 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0x55AAAA55);
3066 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0x55AAAA55)
3067 goto error;
Michael Bueschf3dd3fc2007-12-22 21:56:30 +01003068 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0xAA5555AA);
3069 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0xAA5555AA)
Michael Buesche4d6b792007-09-18 15:39:42 -04003070 goto error;
3071
Michael Bueschf62ae6c2009-07-31 20:51:41 +02003072 /* Check if unaligned 32bit SHM_SHARED access works properly.
3073 * However, don't bail out on failure, because it's noncritical. */
3074 b43_shm_write16(dev, B43_SHM_SHARED, 0, 0x1122);
3075 b43_shm_write16(dev, B43_SHM_SHARED, 2, 0x3344);
3076 b43_shm_write16(dev, B43_SHM_SHARED, 4, 0x5566);
3077 b43_shm_write16(dev, B43_SHM_SHARED, 6, 0x7788);
3078 if (b43_shm_read32(dev, B43_SHM_SHARED, 2) != 0x55663344)
3079 b43warn(dev->wl, "Unaligned 32bit SHM read access is broken\n");
3080 b43_shm_write32(dev, B43_SHM_SHARED, 2, 0xAABBCCDD);
3081 if (b43_shm_read16(dev, B43_SHM_SHARED, 0) != 0x1122 ||
3082 b43_shm_read16(dev, B43_SHM_SHARED, 2) != 0xCCDD ||
3083 b43_shm_read16(dev, B43_SHM_SHARED, 4) != 0xAABB ||
3084 b43_shm_read16(dev, B43_SHM_SHARED, 6) != 0x7788)
3085 b43warn(dev->wl, "Unaligned 32bit SHM write access is broken\n");
3086
3087 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0);
3088 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4);
Michael Bueschf3dd3fc2007-12-22 21:56:30 +01003089
3090 if ((dev->dev->id.revision >= 3) && (dev->dev->id.revision <= 10)) {
3091 /* The 32bit register shadows the two 16bit registers
3092 * with update sideeffects. Validate this. */
3093 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
3094 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0xCCCCBBBB);
3095 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_LOW) != 0xBBBB)
3096 goto error;
3097 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_HIGH) != 0xCCCC)
3098 goto error;
3099 }
3100 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0);
3101
3102 v = b43_read32(dev, B43_MMIO_MACCTL);
3103 v |= B43_MACCTL_GMODE;
3104 if (v != (B43_MACCTL_GMODE | B43_MACCTL_IHR_ENABLED))
Michael Buesche4d6b792007-09-18 15:39:42 -04003105 goto error;
3106
3107 return 0;
Michael Bueschf3dd3fc2007-12-22 21:56:30 +01003108error:
Michael Buesche4d6b792007-09-18 15:39:42 -04003109 b43err(dev->wl, "Failed to validate the chipaccess\n");
3110 return -ENODEV;
3111}
3112
3113static void b43_security_init(struct b43_wldev *dev)
3114{
Michael Buesche4d6b792007-09-18 15:39:42 -04003115 dev->ktp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_KTP);
3116 /* KTP is a word address, but we address SHM bytewise.
3117 * So multiply by two.
3118 */
3119 dev->ktp *= 2;
Michael Buesch66d2d082009-08-06 10:36:50 +02003120 /* Number of RCMTA address slots */
3121 b43_write16(dev, B43_MMIO_RCMTA_COUNT, B43_NR_PAIRWISE_KEYS);
3122 /* Clear the key memory. */
Michael Buesche4d6b792007-09-18 15:39:42 -04003123 b43_clear_keys(dev);
3124}
3125
Michael Buesch616de352009-03-29 13:19:31 +02003126#ifdef CONFIG_B43_HWRNG
John Daiker99da1852009-02-24 02:16:42 -08003127static int b43_rng_read(struct hwrng *rng, u32 *data)
Michael Buesche4d6b792007-09-18 15:39:42 -04003128{
3129 struct b43_wl *wl = (struct b43_wl *)rng->priv;
Michael Buescha78b3bb2009-09-11 21:44:05 +02003130 struct b43_wldev *dev;
3131 int count = -ENODEV;
Michael Buesche4d6b792007-09-18 15:39:42 -04003132
Michael Buescha78b3bb2009-09-11 21:44:05 +02003133 mutex_lock(&wl->mutex);
3134 dev = wl->current_dev;
3135 if (likely(dev && b43_status(dev) >= B43_STAT_INITIALIZED)) {
3136 *data = b43_read16(dev, B43_MMIO_RNG);
3137 count = sizeof(u16);
3138 }
3139 mutex_unlock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003140
Michael Buescha78b3bb2009-09-11 21:44:05 +02003141 return count;
Michael Buesche4d6b792007-09-18 15:39:42 -04003142}
Michael Buesch616de352009-03-29 13:19:31 +02003143#endif /* CONFIG_B43_HWRNG */
Michael Buesche4d6b792007-09-18 15:39:42 -04003144
Rafael J. Wysockib844eba2008-03-23 20:28:24 +01003145static void b43_rng_exit(struct b43_wl *wl)
Michael Buesche4d6b792007-09-18 15:39:42 -04003146{
Michael Buesch616de352009-03-29 13:19:31 +02003147#ifdef CONFIG_B43_HWRNG
Michael Buesche4d6b792007-09-18 15:39:42 -04003148 if (wl->rng_initialized)
Rafael J. Wysockib844eba2008-03-23 20:28:24 +01003149 hwrng_unregister(&wl->rng);
Michael Buesch616de352009-03-29 13:19:31 +02003150#endif /* CONFIG_B43_HWRNG */
Michael Buesche4d6b792007-09-18 15:39:42 -04003151}
3152
3153static int b43_rng_init(struct b43_wl *wl)
3154{
Michael Buesch616de352009-03-29 13:19:31 +02003155 int err = 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04003156
Michael Buesch616de352009-03-29 13:19:31 +02003157#ifdef CONFIG_B43_HWRNG
Michael Buesche4d6b792007-09-18 15:39:42 -04003158 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
3159 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
3160 wl->rng.name = wl->rng_name;
3161 wl->rng.data_read = b43_rng_read;
3162 wl->rng.priv = (unsigned long)wl;
3163 wl->rng_initialized = 1;
3164 err = hwrng_register(&wl->rng);
3165 if (err) {
3166 wl->rng_initialized = 0;
3167 b43err(wl, "Failed to register the random "
3168 "number generator (%d)\n", err);
3169 }
Michael Buesch616de352009-03-29 13:19:31 +02003170#endif /* CONFIG_B43_HWRNG */
Michael Buesche4d6b792007-09-18 15:39:42 -04003171
3172 return err;
3173}
3174
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003175static void b43_tx_work(struct work_struct *work)
Michael Buesche4d6b792007-09-18 15:39:42 -04003176{
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003177 struct b43_wl *wl = container_of(work, struct b43_wl, tx_work);
3178 struct b43_wldev *dev;
3179 struct sk_buff *skb;
3180 int err = 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04003181
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003182 mutex_lock(&wl->mutex);
3183 dev = wl->current_dev;
3184 if (unlikely(!dev || b43_status(dev) < B43_STAT_STARTED)) {
3185 mutex_unlock(&wl->mutex);
3186 return;
Michael Buesch5100d5a2008-03-29 21:01:16 +01003187 }
Michael Buesch21a75d72008-04-25 19:29:08 +02003188
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003189 while (skb_queue_len(&wl->tx_queue)) {
3190 skb = skb_dequeue(&wl->tx_queue);
Michael Buesch21a75d72008-04-25 19:29:08 +02003191
Michael Buesch21a75d72008-04-25 19:29:08 +02003192 if (b43_using_pio_transfers(dev))
Johannes Berge039fa42008-05-15 12:55:29 +02003193 err = b43_pio_tx(dev, skb);
Michael Buesch21a75d72008-04-25 19:29:08 +02003194 else
Johannes Berge039fa42008-05-15 12:55:29 +02003195 err = b43_dma_tx(dev, skb);
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003196 if (unlikely(err))
3197 dev_kfree_skb(skb); /* Drop it */
Michael Buesch21a75d72008-04-25 19:29:08 +02003198 }
3199
Michael Buesch990b86f2009-09-12 00:48:03 +02003200#if B43_DEBUG
3201 dev->tx_count++;
3202#endif
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003203 mutex_unlock(&wl->mutex);
3204}
Michael Buesch21a75d72008-04-25 19:29:08 +02003205
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003206static int b43_op_tx(struct ieee80211_hw *hw,
3207 struct sk_buff *skb)
3208{
3209 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Bueschc9e8eae2008-06-15 15:17:29 +02003210
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003211 if (unlikely(skb->len < 2 + 2 + 6)) {
3212 /* Too short, this can't be a valid frame. */
3213 dev_kfree_skb_any(skb);
3214 return NETDEV_TX_OK;
3215 }
3216 B43_WARN_ON(skb_shinfo(skb)->nr_frags);
3217
3218 skb_queue_tail(&wl->tx_queue, skb);
3219 ieee80211_queue_work(wl->hw, &wl->tx_work);
3220
Michael Buesche4d6b792007-09-18 15:39:42 -04003221 return NETDEV_TX_OK;
3222}
3223
Michael Buesche6f5b932008-03-05 21:18:49 +01003224static void b43_qos_params_upload(struct b43_wldev *dev,
3225 const struct ieee80211_tx_queue_params *p,
3226 u16 shm_offset)
3227{
3228 u16 params[B43_NR_QOSPARAMS];
Johannes Berg0b576642008-07-15 02:08:24 -07003229 int bslots, tmp;
Michael Buesche6f5b932008-03-05 21:18:49 +01003230 unsigned int i;
3231
Michael Bueschb0544eb2009-09-06 15:42:45 +02003232 if (!dev->qos_enabled)
3233 return;
3234
Johannes Berg0b576642008-07-15 02:08:24 -07003235 bslots = b43_read16(dev, B43_MMIO_RNG) & p->cw_min;
Michael Buesche6f5b932008-03-05 21:18:49 +01003236
3237 memset(&params, 0, sizeof(params));
3238
3239 params[B43_QOSPARAM_TXOP] = p->txop * 32;
Johannes Berg0b576642008-07-15 02:08:24 -07003240 params[B43_QOSPARAM_CWMIN] = p->cw_min;
3241 params[B43_QOSPARAM_CWMAX] = p->cw_max;
3242 params[B43_QOSPARAM_CWCUR] = p->cw_min;
3243 params[B43_QOSPARAM_AIFS] = p->aifs;
Michael Buesche6f5b932008-03-05 21:18:49 +01003244 params[B43_QOSPARAM_BSLOTS] = bslots;
Johannes Berg0b576642008-07-15 02:08:24 -07003245 params[B43_QOSPARAM_REGGAP] = bslots + p->aifs;
Michael Buesche6f5b932008-03-05 21:18:49 +01003246
3247 for (i = 0; i < ARRAY_SIZE(params); i++) {
3248 if (i == B43_QOSPARAM_STATUS) {
3249 tmp = b43_shm_read16(dev, B43_SHM_SHARED,
3250 shm_offset + (i * 2));
3251 /* Mark the parameters as updated. */
3252 tmp |= 0x100;
3253 b43_shm_write16(dev, B43_SHM_SHARED,
3254 shm_offset + (i * 2),
3255 tmp);
3256 } else {
3257 b43_shm_write16(dev, B43_SHM_SHARED,
3258 shm_offset + (i * 2),
3259 params[i]);
3260 }
3261 }
3262}
3263
Michael Bueschc40c1122008-09-06 16:21:47 +02003264/* Mapping of mac80211 queue numbers to b43 QoS SHM offsets. */
3265static const u16 b43_qos_shm_offsets[] = {
3266 /* [mac80211-queue-nr] = SHM_OFFSET, */
3267 [0] = B43_QOS_VOICE,
3268 [1] = B43_QOS_VIDEO,
3269 [2] = B43_QOS_BESTEFFORT,
3270 [3] = B43_QOS_BACKGROUND,
3271};
3272
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003273/* Update all QOS parameters in hardware. */
3274static void b43_qos_upload_all(struct b43_wldev *dev)
Michael Buesche6f5b932008-03-05 21:18:49 +01003275{
3276 struct b43_wl *wl = dev->wl;
3277 struct b43_qos_params *params;
Michael Buesche6f5b932008-03-05 21:18:49 +01003278 unsigned int i;
3279
Michael Bueschb0544eb2009-09-06 15:42:45 +02003280 if (!dev->qos_enabled)
3281 return;
3282
Michael Bueschc40c1122008-09-06 16:21:47 +02003283 BUILD_BUG_ON(ARRAY_SIZE(b43_qos_shm_offsets) !=
3284 ARRAY_SIZE(wl->qos_params));
Michael Buesche6f5b932008-03-05 21:18:49 +01003285
3286 b43_mac_suspend(dev);
Michael Buesche6f5b932008-03-05 21:18:49 +01003287 for (i = 0; i < ARRAY_SIZE(wl->qos_params); i++) {
3288 params = &(wl->qos_params[i]);
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003289 b43_qos_params_upload(dev, &(params->p),
3290 b43_qos_shm_offsets[i]);
Michael Buesche6f5b932008-03-05 21:18:49 +01003291 }
Michael Buesche6f5b932008-03-05 21:18:49 +01003292 b43_mac_enable(dev);
3293}
3294
3295static void b43_qos_clear(struct b43_wl *wl)
3296{
3297 struct b43_qos_params *params;
3298 unsigned int i;
3299
Michael Bueschc40c1122008-09-06 16:21:47 +02003300 /* Initialize QoS parameters to sane defaults. */
3301
3302 BUILD_BUG_ON(ARRAY_SIZE(b43_qos_shm_offsets) !=
3303 ARRAY_SIZE(wl->qos_params));
3304
Michael Buesche6f5b932008-03-05 21:18:49 +01003305 for (i = 0; i < ARRAY_SIZE(wl->qos_params); i++) {
3306 params = &(wl->qos_params[i]);
3307
Michael Bueschc40c1122008-09-06 16:21:47 +02003308 switch (b43_qos_shm_offsets[i]) {
3309 case B43_QOS_VOICE:
3310 params->p.txop = 0;
3311 params->p.aifs = 2;
3312 params->p.cw_min = 0x0001;
3313 params->p.cw_max = 0x0001;
3314 break;
3315 case B43_QOS_VIDEO:
3316 params->p.txop = 0;
3317 params->p.aifs = 2;
3318 params->p.cw_min = 0x0001;
3319 params->p.cw_max = 0x0001;
3320 break;
3321 case B43_QOS_BESTEFFORT:
3322 params->p.txop = 0;
3323 params->p.aifs = 3;
3324 params->p.cw_min = 0x0001;
3325 params->p.cw_max = 0x03FF;
3326 break;
3327 case B43_QOS_BACKGROUND:
3328 params->p.txop = 0;
3329 params->p.aifs = 7;
3330 params->p.cw_min = 0x0001;
3331 params->p.cw_max = 0x03FF;
3332 break;
3333 default:
3334 B43_WARN_ON(1);
3335 }
Michael Buesche6f5b932008-03-05 21:18:49 +01003336 }
3337}
3338
3339/* Initialize the core's QOS capabilities */
3340static void b43_qos_init(struct b43_wldev *dev)
3341{
Michael Bueschb0544eb2009-09-06 15:42:45 +02003342 if (!dev->qos_enabled) {
3343 /* Disable QOS support. */
3344 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_EDCF);
3345 b43_write16(dev, B43_MMIO_IFSCTL,
3346 b43_read16(dev, B43_MMIO_IFSCTL)
3347 & ~B43_MMIO_IFSCTL_USE_EDCF);
3348 b43dbg(dev->wl, "QoS disabled\n");
3349 return;
3350 }
3351
Michael Buesche6f5b932008-03-05 21:18:49 +01003352 /* Upload the current QOS parameters. */
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003353 b43_qos_upload_all(dev);
Michael Buesche6f5b932008-03-05 21:18:49 +01003354
3355 /* Enable QOS support. */
3356 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_EDCF);
3357 b43_write16(dev, B43_MMIO_IFSCTL,
3358 b43_read16(dev, B43_MMIO_IFSCTL)
3359 | B43_MMIO_IFSCTL_USE_EDCF);
Michael Bueschb0544eb2009-09-06 15:42:45 +02003360 b43dbg(dev->wl, "QoS enabled\n");
Michael Buesche6f5b932008-03-05 21:18:49 +01003361}
3362
Johannes Berge100bb62008-04-30 18:51:21 +02003363static int b43_op_conf_tx(struct ieee80211_hw *hw, u16 _queue,
Michael Buesch40faacc2007-10-28 16:29:32 +01003364 const struct ieee80211_tx_queue_params *params)
Michael Buesche4d6b792007-09-18 15:39:42 -04003365{
Michael Buesche6f5b932008-03-05 21:18:49 +01003366 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003367 struct b43_wldev *dev;
Michael Buesche6f5b932008-03-05 21:18:49 +01003368 unsigned int queue = (unsigned int)_queue;
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003369 int err = -ENODEV;
Michael Buesche6f5b932008-03-05 21:18:49 +01003370
3371 if (queue >= ARRAY_SIZE(wl->qos_params)) {
3372 /* Queue not available or don't support setting
3373 * params on this queue. Return success to not
3374 * confuse mac80211. */
3375 return 0;
3376 }
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003377 BUILD_BUG_ON(ARRAY_SIZE(b43_qos_shm_offsets) !=
3378 ARRAY_SIZE(wl->qos_params));
Michael Buesche6f5b932008-03-05 21:18:49 +01003379
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003380 mutex_lock(&wl->mutex);
3381 dev = wl->current_dev;
3382 if (unlikely(!dev || (b43_status(dev) < B43_STAT_INITIALIZED)))
3383 goto out_unlock;
Michael Buesche6f5b932008-03-05 21:18:49 +01003384
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003385 memcpy(&(wl->qos_params[queue].p), params, sizeof(*params));
3386 b43_mac_suspend(dev);
3387 b43_qos_params_upload(dev, &(wl->qos_params[queue].p),
3388 b43_qos_shm_offsets[queue]);
3389 b43_mac_enable(dev);
3390 err = 0;
Michael Buesche6f5b932008-03-05 21:18:49 +01003391
Michael Buesch5a5f3b42008-09-06 20:07:31 +02003392out_unlock:
3393 mutex_unlock(&wl->mutex);
3394
3395 return err;
Michael Buesche4d6b792007-09-18 15:39:42 -04003396}
3397
Michael Buesch40faacc2007-10-28 16:29:32 +01003398static int b43_op_get_stats(struct ieee80211_hw *hw,
3399 struct ieee80211_low_level_stats *stats)
Michael Buesche4d6b792007-09-18 15:39:42 -04003400{
3401 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Buesche4d6b792007-09-18 15:39:42 -04003402
Michael Buesch36dbd952009-09-04 22:51:29 +02003403 mutex_lock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003404 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
Michael Buesch36dbd952009-09-04 22:51:29 +02003405 mutex_unlock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003406
3407 return 0;
3408}
3409
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01003410static u64 b43_op_get_tsf(struct ieee80211_hw *hw)
3411{
3412 struct b43_wl *wl = hw_to_b43_wl(hw);
3413 struct b43_wldev *dev;
3414 u64 tsf;
3415
3416 mutex_lock(&wl->mutex);
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01003417 dev = wl->current_dev;
3418
3419 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED))
3420 b43_tsf_read(dev, &tsf);
3421 else
3422 tsf = 0;
3423
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01003424 mutex_unlock(&wl->mutex);
3425
3426 return tsf;
3427}
3428
3429static void b43_op_set_tsf(struct ieee80211_hw *hw, u64 tsf)
3430{
3431 struct b43_wl *wl = hw_to_b43_wl(hw);
3432 struct b43_wldev *dev;
3433
3434 mutex_lock(&wl->mutex);
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01003435 dev = wl->current_dev;
3436
3437 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED))
3438 b43_tsf_write(dev, tsf);
3439
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01003440 mutex_unlock(&wl->mutex);
3441}
3442
Michael Buesche4d6b792007-09-18 15:39:42 -04003443static void b43_put_phy_into_reset(struct b43_wldev *dev)
3444{
3445 struct ssb_device *sdev = dev->dev;
3446 u32 tmslow;
3447
3448 tmslow = ssb_read32(sdev, SSB_TMSLOW);
3449 tmslow &= ~B43_TMSLOW_GMODE;
3450 tmslow |= B43_TMSLOW_PHYRESET;
3451 tmslow |= SSB_TMSLOW_FGC;
3452 ssb_write32(sdev, SSB_TMSLOW, tmslow);
3453 msleep(1);
3454
3455 tmslow = ssb_read32(sdev, SSB_TMSLOW);
3456 tmslow &= ~SSB_TMSLOW_FGC;
3457 tmslow |= B43_TMSLOW_PHYRESET;
3458 ssb_write32(sdev, SSB_TMSLOW, tmslow);
3459 msleep(1);
3460}
3461
John Daiker99da1852009-02-24 02:16:42 -08003462static const char *band_to_string(enum ieee80211_band band)
Michael Buesche4d6b792007-09-18 15:39:42 -04003463{
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003464 switch (band) {
3465 case IEEE80211_BAND_5GHZ:
3466 return "5";
3467 case IEEE80211_BAND_2GHZ:
3468 return "2.4";
3469 default:
3470 break;
3471 }
3472 B43_WARN_ON(1);
3473 return "";
3474}
3475
3476/* Expects wl->mutex locked */
3477static int b43_switch_band(struct b43_wl *wl, struct ieee80211_channel *chan)
3478{
3479 struct b43_wldev *up_dev = NULL;
Michael Buesche4d6b792007-09-18 15:39:42 -04003480 struct b43_wldev *down_dev;
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003481 struct b43_wldev *d;
Michael Buesche4d6b792007-09-18 15:39:42 -04003482 int err;
John W. Linville922d8a02009-01-12 14:40:20 -05003483 bool uninitialized_var(gmode);
Michael Buesche4d6b792007-09-18 15:39:42 -04003484 int prev_status;
3485
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003486 /* Find a device and PHY which supports the band. */
3487 list_for_each_entry(d, &wl->devlist, list) {
3488 switch (chan->band) {
3489 case IEEE80211_BAND_5GHZ:
3490 if (d->phy.supports_5ghz) {
3491 up_dev = d;
3492 gmode = 0;
3493 }
3494 break;
3495 case IEEE80211_BAND_2GHZ:
3496 if (d->phy.supports_2ghz) {
3497 up_dev = d;
3498 gmode = 1;
3499 }
3500 break;
3501 default:
3502 B43_WARN_ON(1);
3503 return -EINVAL;
3504 }
3505 if (up_dev)
3506 break;
3507 }
3508 if (!up_dev) {
3509 b43err(wl, "Could not find a device for %s-GHz band operation\n",
3510 band_to_string(chan->band));
3511 return -ENODEV;
Michael Buesche4d6b792007-09-18 15:39:42 -04003512 }
3513 if ((up_dev == wl->current_dev) &&
3514 (!!wl->current_dev->phy.gmode == !!gmode)) {
3515 /* This device is already running. */
3516 return 0;
3517 }
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003518 b43dbg(wl, "Switching to %s-GHz band\n",
3519 band_to_string(chan->band));
Michael Buesche4d6b792007-09-18 15:39:42 -04003520 down_dev = wl->current_dev;
3521
3522 prev_status = b43_status(down_dev);
3523 /* Shutdown the currently running core. */
3524 if (prev_status >= B43_STAT_STARTED)
Michael Buesch36dbd952009-09-04 22:51:29 +02003525 down_dev = b43_wireless_core_stop(down_dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04003526 if (prev_status >= B43_STAT_INITIALIZED)
3527 b43_wireless_core_exit(down_dev);
3528
3529 if (down_dev != up_dev) {
3530 /* We switch to a different core, so we put PHY into
3531 * RESET on the old core. */
3532 b43_put_phy_into_reset(down_dev);
3533 }
3534
3535 /* Now start the new core. */
3536 up_dev->phy.gmode = gmode;
3537 if (prev_status >= B43_STAT_INITIALIZED) {
3538 err = b43_wireless_core_init(up_dev);
3539 if (err) {
3540 b43err(wl, "Fatal: Could not initialize device for "
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003541 "selected %s-GHz band\n",
3542 band_to_string(chan->band));
Michael Buesche4d6b792007-09-18 15:39:42 -04003543 goto init_failure;
3544 }
3545 }
3546 if (prev_status >= B43_STAT_STARTED) {
3547 err = b43_wireless_core_start(up_dev);
3548 if (err) {
3549 b43err(wl, "Fatal: Coult not start device for "
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003550 "selected %s-GHz band\n",
3551 band_to_string(chan->band));
Michael Buesche4d6b792007-09-18 15:39:42 -04003552 b43_wireless_core_exit(up_dev);
3553 goto init_failure;
3554 }
3555 }
3556 B43_WARN_ON(b43_status(up_dev) != prev_status);
3557
3558 wl->current_dev = up_dev;
3559
3560 return 0;
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003561init_failure:
Michael Buesche4d6b792007-09-18 15:39:42 -04003562 /* Whoops, failed to init the new core. No core is operating now. */
3563 wl->current_dev = NULL;
3564 return err;
3565}
3566
Johannes Berg9124b072008-10-14 19:17:54 +02003567/* Write the short and long frame retry limit values. */
3568static void b43_set_retry_limits(struct b43_wldev *dev,
3569 unsigned int short_retry,
3570 unsigned int long_retry)
3571{
3572 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
3573 * the chip-internal counter. */
3574 short_retry = min(short_retry, (unsigned int)0xF);
3575 long_retry = min(long_retry, (unsigned int)0xF);
3576
3577 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_SRLIMIT,
3578 short_retry);
3579 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_LRLIMIT,
3580 long_retry);
3581}
3582
Johannes Berge8975582008-10-09 12:18:51 +02003583static int b43_op_config(struct ieee80211_hw *hw, u32 changed)
Michael Buesche4d6b792007-09-18 15:39:42 -04003584{
3585 struct b43_wl *wl = hw_to_b43_wl(hw);
3586 struct b43_wldev *dev;
3587 struct b43_phy *phy;
Johannes Berge8975582008-10-09 12:18:51 +02003588 struct ieee80211_conf *conf = &hw->conf;
Michael Buesch9db1f6d2007-12-22 21:54:20 +01003589 int antenna;
Michael Buesche4d6b792007-09-18 15:39:42 -04003590 int err = 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04003591
Michael Buesche4d6b792007-09-18 15:39:42 -04003592 mutex_lock(&wl->mutex);
3593
Michael Bueschbb1eeff2008-02-09 12:08:58 +01003594 /* Switch the band (if necessary). This might change the active core. */
3595 err = b43_switch_band(wl, conf->channel);
Michael Buesche4d6b792007-09-18 15:39:42 -04003596 if (err)
3597 goto out_unlock_mutex;
3598 dev = wl->current_dev;
3599 phy = &dev->phy;
3600
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +01003601 if (conf_is_ht(conf))
3602 phy->is_40mhz =
3603 (conf_is_ht40_minus(conf) || conf_is_ht40_plus(conf));
3604 else
3605 phy->is_40mhz = false;
3606
Michael Bueschd10d0e52008-12-18 22:13:39 +01003607 b43_mac_suspend(dev);
3608
Johannes Berg9124b072008-10-14 19:17:54 +02003609 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
3610 b43_set_retry_limits(dev, conf->short_frame_max_tx_count,
3611 conf->long_frame_max_tx_count);
3612 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
3613 if (!changed)
Michael Bueschd10d0e52008-12-18 22:13:39 +01003614 goto out_mac_enable;
Michael Buesche4d6b792007-09-18 15:39:42 -04003615
3616 /* Switch to the requested channel.
3617 * The firmware takes care of races with the TX handler. */
Johannes Berg8318d782008-01-24 19:38:38 +01003618 if (conf->channel->hw_value != phy->channel)
Michael Bueschef1a6282008-08-27 18:53:02 +02003619 b43_switch_channel(dev, conf->channel->hw_value);
Michael Buesche4d6b792007-09-18 15:39:42 -04003620
Johannes Berg0869aea2009-10-28 10:03:35 +01003621 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
Johannes Bergd42ce842007-11-23 14:50:51 +01003622
Michael Buesche4d6b792007-09-18 15:39:42 -04003623 /* Adjust the desired TX power level. */
3624 if (conf->power_level != 0) {
Michael Buesch18c8ade2008-08-28 19:33:40 +02003625 if (conf->power_level != phy->desired_txpower) {
3626 phy->desired_txpower = conf->power_level;
3627 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME |
3628 B43_TXPWR_IGNORE_TSSI);
Michael Buesche4d6b792007-09-18 15:39:42 -04003629 }
3630 }
3631
3632 /* Antennas for RX and management frame TX. */
Johannes Berg0f4ac382008-10-09 12:18:04 +02003633 antenna = B43_ANTENNA_DEFAULT;
Michael Buesch9db1f6d2007-12-22 21:54:20 +01003634 b43_mgmtframe_txantenna(dev, antenna);
Johannes Berg0f4ac382008-10-09 12:18:04 +02003635 antenna = B43_ANTENNA_DEFAULT;
Michael Bueschef1a6282008-08-27 18:53:02 +02003636 if (phy->ops->set_rx_antenna)
3637 phy->ops->set_rx_antenna(dev, antenna);
Michael Buesche4d6b792007-09-18 15:39:42 -04003638
Larry Fingerfd4973c2009-06-20 12:58:11 -05003639 if (wl->radio_enabled != phy->radio_on) {
3640 if (wl->radio_enabled) {
Johannes Berg19d337d2009-06-02 13:01:37 +02003641 b43_software_rfkill(dev, false);
Michael Bueschfda9abc2007-09-20 22:14:18 +02003642 b43info(dev->wl, "Radio turned on by software\n");
3643 if (!dev->radio_hw_enable) {
3644 b43info(dev->wl, "The hardware RF-kill button "
3645 "still turns the radio physically off. "
3646 "Press the button to turn it on.\n");
3647 }
3648 } else {
Johannes Berg19d337d2009-06-02 13:01:37 +02003649 b43_software_rfkill(dev, true);
Michael Bueschfda9abc2007-09-20 22:14:18 +02003650 b43info(dev->wl, "Radio turned off by software\n");
3651 }
3652 }
3653
Michael Bueschd10d0e52008-12-18 22:13:39 +01003654out_mac_enable:
3655 b43_mac_enable(dev);
3656out_unlock_mutex:
Michael Buesche4d6b792007-09-18 15:39:42 -04003657 mutex_unlock(&wl->mutex);
3658
3659 return err;
3660}
3661
Johannes Berg881d9482009-01-21 15:13:48 +01003662static void b43_update_basic_rates(struct b43_wldev *dev, u32 brates)
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003663{
3664 struct ieee80211_supported_band *sband =
3665 dev->wl->hw->wiphy->bands[b43_current_band(dev->wl)];
3666 struct ieee80211_rate *rate;
3667 int i;
3668 u16 basic, direct, offset, basic_offset, rateptr;
3669
3670 for (i = 0; i < sband->n_bitrates; i++) {
3671 rate = &sband->bitrates[i];
3672
3673 if (b43_is_cck_rate(rate->hw_value)) {
3674 direct = B43_SHM_SH_CCKDIRECT;
3675 basic = B43_SHM_SH_CCKBASIC;
3676 offset = b43_plcp_get_ratecode_cck(rate->hw_value);
3677 offset &= 0xF;
3678 } else {
3679 direct = B43_SHM_SH_OFDMDIRECT;
3680 basic = B43_SHM_SH_OFDMBASIC;
3681 offset = b43_plcp_get_ratecode_ofdm(rate->hw_value);
3682 offset &= 0xF;
3683 }
3684
3685 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
3686
3687 if (b43_is_cck_rate(rate->hw_value)) {
3688 basic_offset = b43_plcp_get_ratecode_cck(rate->hw_value);
3689 basic_offset &= 0xF;
3690 } else {
3691 basic_offset = b43_plcp_get_ratecode_ofdm(rate->hw_value);
3692 basic_offset &= 0xF;
3693 }
3694
3695 /*
3696 * Get the pointer that we need to point to
3697 * from the direct map
3698 */
3699 rateptr = b43_shm_read16(dev, B43_SHM_SHARED,
3700 direct + 2 * basic_offset);
3701 /* and write it to the basic map */
3702 b43_shm_write16(dev, B43_SHM_SHARED, basic + 2 * offset,
3703 rateptr);
3704 }
3705}
3706
3707static void b43_op_bss_info_changed(struct ieee80211_hw *hw,
3708 struct ieee80211_vif *vif,
3709 struct ieee80211_bss_conf *conf,
3710 u32 changed)
3711{
3712 struct b43_wl *wl = hw_to_b43_wl(hw);
3713 struct b43_wldev *dev;
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003714
3715 mutex_lock(&wl->mutex);
3716
3717 dev = wl->current_dev;
Michael Bueschd10d0e52008-12-18 22:13:39 +01003718 if (!dev || b43_status(dev) < B43_STAT_STARTED)
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003719 goto out_unlock_mutex;
Johannes Berg2d0ddec2009-04-23 16:13:26 +02003720
3721 B43_WARN_ON(wl->vif != vif);
3722
3723 if (changed & BSS_CHANGED_BSSID) {
Johannes Berg2d0ddec2009-04-23 16:13:26 +02003724 if (conf->bssid)
3725 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
3726 else
3727 memset(wl->bssid, 0, ETH_ALEN);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02003728 }
3729
Johannes Berg3f0d8432009-05-18 10:53:18 +02003730 if (b43_status(dev) >= B43_STAT_INITIALIZED) {
3731 if (changed & BSS_CHANGED_BEACON &&
3732 (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3733 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) ||
3734 b43_is_mode(wl, NL80211_IFTYPE_ADHOC)))
3735 b43_update_templates(wl);
3736
3737 if (changed & BSS_CHANGED_BSSID)
3738 b43_write_mac_bssid_templates(dev);
3739 }
Johannes Berg3f0d8432009-05-18 10:53:18 +02003740
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003741 b43_mac_suspend(dev);
3742
Johannes Berg57c4d7b2009-04-23 16:10:04 +02003743 /* Update templates for AP/mesh mode. */
3744 if (changed & BSS_CHANGED_BEACON_INT &&
3745 (b43_is_mode(wl, NL80211_IFTYPE_AP) ||
3746 b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) ||
3747 b43_is_mode(wl, NL80211_IFTYPE_ADHOC)))
3748 b43_set_beacon_int(dev, conf->beacon_int);
3749
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003750 if (changed & BSS_CHANGED_BASIC_RATES)
3751 b43_update_basic_rates(dev, conf->basic_rates);
3752
3753 if (changed & BSS_CHANGED_ERP_SLOT) {
3754 if (conf->use_short_slot)
3755 b43_short_slot_timing_enable(dev);
3756 else
3757 b43_short_slot_timing_disable(dev);
3758 }
3759
3760 b43_mac_enable(dev);
Michael Bueschd10d0e52008-12-18 22:13:39 +01003761out_unlock_mutex:
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003762 mutex_unlock(&wl->mutex);
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01003763}
3764
Michael Buesch40faacc2007-10-28 16:29:32 +01003765static int b43_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Johannes Bergdc822b52008-12-29 12:55:09 +01003766 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
3767 struct ieee80211_key_conf *key)
Michael Buesche4d6b792007-09-18 15:39:42 -04003768{
3769 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003770 struct b43_wldev *dev;
Michael Buesche4d6b792007-09-18 15:39:42 -04003771 u8 algorithm;
3772 u8 index;
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003773 int err;
Michael Buesch060210f2009-01-25 15:49:59 +01003774 static const u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
Michael Buesche4d6b792007-09-18 15:39:42 -04003775
3776 if (modparam_nohwcrypt)
3777 return -ENOSPC; /* User disabled HW-crypto */
3778
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003779 mutex_lock(&wl->mutex);
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003780
3781 dev = wl->current_dev;
3782 err = -ENODEV;
3783 if (!dev || b43_status(dev) < B43_STAT_INITIALIZED)
3784 goto out_unlock;
3785
Michael Buesch403a3a12009-06-08 21:04:57 +02003786 if (dev->fw.pcm_request_failed || !dev->hwcrypto_enabled) {
Michael Buesch68217832008-05-17 23:43:57 +02003787 /* We don't have firmware for the crypto engine.
3788 * Must use software-crypto. */
3789 err = -EOPNOTSUPP;
3790 goto out_unlock;
3791 }
3792
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003793 err = -EINVAL;
Johannes Berg97359d12010-08-10 09:46:38 +02003794 switch (key->cipher) {
3795 case WLAN_CIPHER_SUITE_WEP40:
3796 algorithm = B43_SEC_ALGO_WEP40;
Michael Buesche4d6b792007-09-18 15:39:42 -04003797 break;
Johannes Berg97359d12010-08-10 09:46:38 +02003798 case WLAN_CIPHER_SUITE_WEP104:
3799 algorithm = B43_SEC_ALGO_WEP104;
3800 break;
3801 case WLAN_CIPHER_SUITE_TKIP:
Michael Buesche4d6b792007-09-18 15:39:42 -04003802 algorithm = B43_SEC_ALGO_TKIP;
3803 break;
Johannes Berg97359d12010-08-10 09:46:38 +02003804 case WLAN_CIPHER_SUITE_CCMP:
Michael Buesche4d6b792007-09-18 15:39:42 -04003805 algorithm = B43_SEC_ALGO_AES;
3806 break;
3807 default:
3808 B43_WARN_ON(1);
Michael Buesche4d6b792007-09-18 15:39:42 -04003809 goto out_unlock;
3810 }
Michael Bueschc6dfc9a2007-10-28 15:59:58 +01003811 index = (u8) (key->keyidx);
3812 if (index > 3)
3813 goto out_unlock;
Michael Buesche4d6b792007-09-18 15:39:42 -04003814
3815 switch (cmd) {
3816 case SET_KEY:
gregor kowski035d0242009-08-19 22:35:45 +02003817 if (algorithm == B43_SEC_ALGO_TKIP &&
3818 (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE) ||
3819 !modparam_hwtkip)) {
3820 /* We support only pairwise key */
Michael Buesche4d6b792007-09-18 15:39:42 -04003821 err = -EOPNOTSUPP;
3822 goto out_unlock;
3823 }
3824
Michael Buesche808e582008-12-19 21:30:52 +01003825 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
Johannes Bergdc822b52008-12-29 12:55:09 +01003826 if (WARN_ON(!sta)) {
3827 err = -EOPNOTSUPP;
3828 goto out_unlock;
3829 }
Michael Buesche808e582008-12-19 21:30:52 +01003830 /* Pairwise key with an assigned MAC address. */
Michael Buesche4d6b792007-09-18 15:39:42 -04003831 err = b43_key_write(dev, -1, algorithm,
Johannes Bergdc822b52008-12-29 12:55:09 +01003832 key->key, key->keylen,
3833 sta->addr, key);
Michael Buesche808e582008-12-19 21:30:52 +01003834 } else {
3835 /* Group key */
3836 err = b43_key_write(dev, index, algorithm,
3837 key->key, key->keylen, NULL, key);
Michael Buesche4d6b792007-09-18 15:39:42 -04003838 }
3839 if (err)
3840 goto out_unlock;
3841
3842 if (algorithm == B43_SEC_ALGO_WEP40 ||
3843 algorithm == B43_SEC_ALGO_WEP104) {
3844 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_USEDEFKEYS);
3845 } else {
3846 b43_hf_write(dev,
3847 b43_hf_read(dev) & ~B43_HF_USEDEFKEYS);
3848 }
3849 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
gregor kowski035d0242009-08-19 22:35:45 +02003850 if (algorithm == B43_SEC_ALGO_TKIP)
3851 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Michael Buesche4d6b792007-09-18 15:39:42 -04003852 break;
3853 case DISABLE_KEY: {
3854 err = b43_key_clear(dev, key->hw_key_idx);
3855 if (err)
3856 goto out_unlock;
3857 break;
3858 }
3859 default:
3860 B43_WARN_ON(1);
3861 }
Michael Buesch9cf7f242008-12-19 20:24:30 +01003862
Michael Buesche4d6b792007-09-18 15:39:42 -04003863out_unlock:
Michael Buesche4d6b792007-09-18 15:39:42 -04003864 if (!err) {
3865 b43dbg(wl, "%s hardware based encryption for keyidx: %d, "
Johannes Berge1749612008-10-27 15:59:26 -07003866 "mac: %pM\n",
Michael Buesche4d6b792007-09-18 15:39:42 -04003867 cmd == SET_KEY ? "Using" : "Disabling", key->keyidx,
Larry Fingera1d882102009-01-14 11:15:25 -06003868 sta ? sta->addr : bcast_addr);
Michael Buesch9cf7f242008-12-19 20:24:30 +01003869 b43_dump_keymemory(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04003870 }
Michael Buesch9cf7f242008-12-19 20:24:30 +01003871 mutex_unlock(&wl->mutex);
3872
Michael Buesche4d6b792007-09-18 15:39:42 -04003873 return err;
3874}
3875
Michael Buesch40faacc2007-10-28 16:29:32 +01003876static void b43_op_configure_filter(struct ieee80211_hw *hw,
3877 unsigned int changed, unsigned int *fflags,
Johannes Berg3ac64be2009-08-17 16:16:53 +02003878 u64 multicast)
Michael Buesche4d6b792007-09-18 15:39:42 -04003879{
3880 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Buesch36dbd952009-09-04 22:51:29 +02003881 struct b43_wldev *dev;
Michael Buesche4d6b792007-09-18 15:39:42 -04003882
Michael Buesch36dbd952009-09-04 22:51:29 +02003883 mutex_lock(&wl->mutex);
3884 dev = wl->current_dev;
Johannes Berg4150c572007-09-17 01:29:23 -04003885 if (!dev) {
3886 *fflags = 0;
Michael Buesch36dbd952009-09-04 22:51:29 +02003887 goto out_unlock;
Michael Buesche4d6b792007-09-18 15:39:42 -04003888 }
Johannes Berg4150c572007-09-17 01:29:23 -04003889
Johannes Berg4150c572007-09-17 01:29:23 -04003890 *fflags &= FIF_PROMISC_IN_BSS |
3891 FIF_ALLMULTI |
3892 FIF_FCSFAIL |
3893 FIF_PLCPFAIL |
3894 FIF_CONTROL |
3895 FIF_OTHER_BSS |
3896 FIF_BCN_PRBRESP_PROMISC;
3897
3898 changed &= FIF_PROMISC_IN_BSS |
3899 FIF_ALLMULTI |
3900 FIF_FCSFAIL |
3901 FIF_PLCPFAIL |
3902 FIF_CONTROL |
3903 FIF_OTHER_BSS |
3904 FIF_BCN_PRBRESP_PROMISC;
3905
3906 wl->filter_flags = *fflags;
3907
3908 if (changed && b43_status(dev) >= B43_STAT_INITIALIZED)
3909 b43_adjust_opmode(dev);
Michael Buesch36dbd952009-09-04 22:51:29 +02003910
3911out_unlock:
3912 mutex_unlock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003913}
3914
Michael Buesch36dbd952009-09-04 22:51:29 +02003915/* Locking: wl->mutex
3916 * Returns the current dev. This might be different from the passed in dev,
3917 * because the core might be gone away while we unlocked the mutex. */
3918static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev)
Michael Buesche4d6b792007-09-18 15:39:42 -04003919{
3920 struct b43_wl *wl = dev->wl;
Michael Buesch36dbd952009-09-04 22:51:29 +02003921 struct b43_wldev *orig_dev;
Michael Buesch49d965c2009-10-03 00:57:58 +02003922 u32 mask;
Michael Buesche4d6b792007-09-18 15:39:42 -04003923
Michael Buesch36dbd952009-09-04 22:51:29 +02003924redo:
3925 if (!dev || b43_status(dev) < B43_STAT_STARTED)
3926 return dev;
Stefano Brivioa19d12d2007-11-07 18:16:11 +01003927
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003928 /* Cancel work. Unlock to avoid deadlocks. */
Michael Buesche4d6b792007-09-18 15:39:42 -04003929 mutex_unlock(&wl->mutex);
Michael Buesche4d6b792007-09-18 15:39:42 -04003930 cancel_delayed_work_sync(&dev->periodic_work);
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003931 cancel_work_sync(&wl->tx_work);
Michael Buesche4d6b792007-09-18 15:39:42 -04003932 mutex_lock(&wl->mutex);
Michael Buesch36dbd952009-09-04 22:51:29 +02003933 dev = wl->current_dev;
3934 if (!dev || b43_status(dev) < B43_STAT_STARTED) {
3935 /* Whoops, aliens ate up the device while we were unlocked. */
3936 return dev;
3937 }
Michael Buesche4d6b792007-09-18 15:39:42 -04003938
Michael Buesch36dbd952009-09-04 22:51:29 +02003939 /* Disable interrupts on the device. */
3940 b43_set_status(dev, B43_STAT_INITIALIZED);
Albert Herranz3dbba8e2009-09-10 19:34:49 +02003941 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
Michael Buesch36dbd952009-09-04 22:51:29 +02003942 /* wl->mutex is locked. That is enough. */
3943 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
3944 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
3945 } else {
3946 spin_lock_irq(&wl->hardirq_lock);
3947 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0);
3948 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); /* Flush */
3949 spin_unlock_irq(&wl->hardirq_lock);
3950 }
Michael Buesch176e9f62009-09-11 23:04:04 +02003951 /* Synchronize and free the interrupt handlers. Unlock to avoid deadlocks. */
Michael Buesch36dbd952009-09-04 22:51:29 +02003952 orig_dev = dev;
3953 mutex_unlock(&wl->mutex);
Michael Buesch176e9f62009-09-11 23:04:04 +02003954 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
3955 b43_sdio_free_irq(dev);
3956 } else {
3957 synchronize_irq(dev->dev->irq);
3958 free_irq(dev->dev->irq, dev);
3959 }
Michael Buesch36dbd952009-09-04 22:51:29 +02003960 mutex_lock(&wl->mutex);
3961 dev = wl->current_dev;
3962 if (!dev)
3963 return dev;
3964 if (dev != orig_dev) {
3965 if (b43_status(dev) >= B43_STAT_STARTED)
3966 goto redo;
3967 return dev;
3968 }
Michael Buesch49d965c2009-10-03 00:57:58 +02003969 mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
3970 B43_WARN_ON(mask != 0xFFFFFFFF && mask);
Michael Buesch36dbd952009-09-04 22:51:29 +02003971
Michael Bueschf5d40ee2009-09-04 22:53:18 +02003972 /* Drain the TX queue */
3973 while (skb_queue_len(&wl->tx_queue))
3974 dev_kfree_skb(skb_dequeue(&wl->tx_queue));
3975
Michael Buesche4d6b792007-09-18 15:39:42 -04003976 b43_mac_suspend(dev);
Michael Buescha78b3bb2009-09-11 21:44:05 +02003977 b43_leds_exit(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04003978 b43dbg(wl, "Wireless interface stopped\n");
Michael Buesch36dbd952009-09-04 22:51:29 +02003979
3980 return dev;
Michael Buesche4d6b792007-09-18 15:39:42 -04003981}
3982
3983/* Locking: wl->mutex */
3984static int b43_wireless_core_start(struct b43_wldev *dev)
3985{
3986 int err;
3987
3988 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED);
3989
3990 drain_txstatus_queue(dev);
Albert Herranz3dbba8e2009-09-10 19:34:49 +02003991 if (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) {
3992 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler);
3993 if (err) {
3994 b43err(dev->wl, "Cannot request SDIO IRQ\n");
3995 goto out;
3996 }
3997 } else {
3998 err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler,
3999 b43_interrupt_thread_handler,
4000 IRQF_SHARED, KBUILD_MODNAME, dev);
4001 if (err) {
4002 b43err(dev->wl, "Cannot request IRQ-%d\n", dev->dev->irq);
4003 goto out;
4004 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004005 }
4006
4007 /* We are ready to run. */
Larry Finger0866b032010-02-03 13:33:44 -06004008 ieee80211_wake_queues(dev->wl->hw);
Michael Buesche4d6b792007-09-18 15:39:42 -04004009 b43_set_status(dev, B43_STAT_STARTED);
4010
4011 /* Start data flow (TX/RX). */
4012 b43_mac_enable(dev);
Michael Buesch13790722009-04-08 21:26:27 +02004013 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask);
Michael Buesche4d6b792007-09-18 15:39:42 -04004014
4015 /* Start maintainance work */
4016 b43_periodic_tasks_setup(dev);
4017
Michael Buescha78b3bb2009-09-11 21:44:05 +02004018 b43_leds_init(dev);
4019
Michael Buesche4d6b792007-09-18 15:39:42 -04004020 b43dbg(dev->wl, "Wireless interface started\n");
Michael Buescha78b3bb2009-09-11 21:44:05 +02004021out:
Michael Buesche4d6b792007-09-18 15:39:42 -04004022 return err;
4023}
4024
4025/* Get PHY and RADIO versioning numbers */
4026static int b43_phy_versioning(struct b43_wldev *dev)
4027{
4028 struct b43_phy *phy = &dev->phy;
4029 u32 tmp;
4030 u8 analog_type;
4031 u8 phy_type;
4032 u8 phy_rev;
4033 u16 radio_manuf;
4034 u16 radio_ver;
4035 u16 radio_rev;
4036 int unsupported = 0;
4037
4038 /* Get PHY versioning */
4039 tmp = b43_read16(dev, B43_MMIO_PHY_VER);
4040 analog_type = (tmp & B43_PHYVER_ANALOG) >> B43_PHYVER_ANALOG_SHIFT;
4041 phy_type = (tmp & B43_PHYVER_TYPE) >> B43_PHYVER_TYPE_SHIFT;
4042 phy_rev = (tmp & B43_PHYVER_VERSION);
4043 switch (phy_type) {
4044 case B43_PHYTYPE_A:
4045 if (phy_rev >= 4)
4046 unsupported = 1;
4047 break;
4048 case B43_PHYTYPE_B:
4049 if (phy_rev != 2 && phy_rev != 4 && phy_rev != 6
4050 && phy_rev != 7)
4051 unsupported = 1;
4052 break;
4053 case B43_PHYTYPE_G:
Larry Finger013978b2007-11-26 10:29:47 -06004054 if (phy_rev > 9)
Michael Buesche4d6b792007-09-18 15:39:42 -04004055 unsupported = 1;
4056 break;
Rafał Miłecki692d2c02010-12-07 21:56:00 +01004057#ifdef CONFIG_B43_PHY_N
Michael Bueschd5c71e42008-01-04 17:06:29 +01004058 case B43_PHYTYPE_N:
Rafał Miłeckiab72efd2010-12-21 21:29:44 +01004059 if (phy_rev > 9)
Michael Bueschd5c71e42008-01-04 17:06:29 +01004060 unsupported = 1;
4061 break;
4062#endif
Michael Buesch6b1c7c62008-12-25 00:39:28 +01004063#ifdef CONFIG_B43_PHY_LP
4064 case B43_PHYTYPE_LP:
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02004065 if (phy_rev > 2)
Michael Buesch6b1c7c62008-12-25 00:39:28 +01004066 unsupported = 1;
4067 break;
4068#endif
Michael Buesche4d6b792007-09-18 15:39:42 -04004069 default:
4070 unsupported = 1;
4071 };
4072 if (unsupported) {
4073 b43err(dev->wl, "FOUND UNSUPPORTED PHY "
4074 "(Analog %u, Type %u, Revision %u)\n",
4075 analog_type, phy_type, phy_rev);
4076 return -EOPNOTSUPP;
4077 }
4078 b43dbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
4079 analog_type, phy_type, phy_rev);
4080
4081 /* Get RADIO versioning */
4082 if (dev->dev->bus->chip_id == 0x4317) {
4083 if (dev->dev->bus->chip_rev == 0)
4084 tmp = 0x3205017F;
4085 else if (dev->dev->bus->chip_rev == 1)
4086 tmp = 0x4205017F;
4087 else
4088 tmp = 0x5205017F;
4089 } else {
4090 b43_write16(dev, B43_MMIO_RADIO_CONTROL, B43_RADIOCTL_ID);
Michael Buesch243dcfc2008-01-13 14:12:44 +01004091 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
Michael Buesche4d6b792007-09-18 15:39:42 -04004092 b43_write16(dev, B43_MMIO_RADIO_CONTROL, B43_RADIOCTL_ID);
Michael Buesch243dcfc2008-01-13 14:12:44 +01004093 tmp |= (u32)b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH) << 16;
Michael Buesche4d6b792007-09-18 15:39:42 -04004094 }
4095 radio_manuf = (tmp & 0x00000FFF);
4096 radio_ver = (tmp & 0x0FFFF000) >> 12;
4097 radio_rev = (tmp & 0xF0000000) >> 28;
Michael Buesch96c755a2008-01-06 00:09:46 +01004098 if (radio_manuf != 0x17F /* Broadcom */)
4099 unsupported = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004100 switch (phy_type) {
4101 case B43_PHYTYPE_A:
4102 if (radio_ver != 0x2060)
4103 unsupported = 1;
4104 if (radio_rev != 1)
4105 unsupported = 1;
4106 if (radio_manuf != 0x17F)
4107 unsupported = 1;
4108 break;
4109 case B43_PHYTYPE_B:
4110 if ((radio_ver & 0xFFF0) != 0x2050)
4111 unsupported = 1;
4112 break;
4113 case B43_PHYTYPE_G:
4114 if (radio_ver != 0x2050)
4115 unsupported = 1;
4116 break;
Michael Buesch96c755a2008-01-06 00:09:46 +01004117 case B43_PHYTYPE_N:
Johannes Bergbb519be2008-12-24 15:26:40 +01004118 if (radio_ver != 0x2055 && radio_ver != 0x2056)
Michael Buesch96c755a2008-01-06 00:09:46 +01004119 unsupported = 1;
4120 break;
Michael Buesch6b1c7c62008-12-25 00:39:28 +01004121 case B43_PHYTYPE_LP:
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02004122 if (radio_ver != 0x2062 && radio_ver != 0x2063)
Michael Buesch6b1c7c62008-12-25 00:39:28 +01004123 unsupported = 1;
4124 break;
Michael Buesche4d6b792007-09-18 15:39:42 -04004125 default:
4126 B43_WARN_ON(1);
4127 }
4128 if (unsupported) {
4129 b43err(dev->wl, "FOUND UNSUPPORTED RADIO "
4130 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
4131 radio_manuf, radio_ver, radio_rev);
4132 return -EOPNOTSUPP;
4133 }
4134 b43dbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X, Revision %u\n",
4135 radio_manuf, radio_ver, radio_rev);
4136
4137 phy->radio_manuf = radio_manuf;
4138 phy->radio_ver = radio_ver;
4139 phy->radio_rev = radio_rev;
4140
4141 phy->analog = analog_type;
4142 phy->type = phy_type;
4143 phy->rev = phy_rev;
4144
4145 return 0;
4146}
4147
4148static void setup_struct_phy_for_init(struct b43_wldev *dev,
4149 struct b43_phy *phy)
4150{
Michael Buesche4d6b792007-09-18 15:39:42 -04004151 phy->hardware_power_control = !!modparam_hwpctl;
Michael Buesch18c8ade2008-08-28 19:33:40 +02004152 phy->next_txpwr_check_time = jiffies;
Michael Buesch8ed7fc42007-12-09 22:34:59 +01004153 /* PHY TX errors counter. */
4154 atomic_set(&phy->txerr_cnt, B43_PHY_TX_BADNESS_LIMIT);
Michael Buesch591f3dc2009-03-31 12:27:32 +02004155
4156#if B43_DEBUG
4157 phy->phy_locked = 0;
4158 phy->radio_locked = 0;
4159#endif
Michael Buesche4d6b792007-09-18 15:39:42 -04004160}
4161
4162static void setup_struct_wldev_for_init(struct b43_wldev *dev)
4163{
Michael Bueschaa6c7ae2007-12-26 16:26:36 +01004164 dev->dfq_valid = 0;
4165
Michael Buesch6a724d62007-09-20 22:12:58 +02004166 /* Assume the radio is enabled. If it's not enabled, the state will
4167 * immediately get fixed on the first periodic work run. */
4168 dev->radio_hw_enable = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004169
4170 /* Stats */
4171 memset(&dev->stats, 0, sizeof(dev->stats));
4172
4173 setup_struct_phy_for_init(dev, &dev->phy);
4174
4175 /* IRQ related flags */
4176 dev->irq_reason = 0;
4177 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
Michael Buesch13790722009-04-08 21:26:27 +02004178 dev->irq_mask = B43_IRQ_MASKTEMPLATE;
Michael Buesch3e3ccb32009-03-19 19:27:21 +01004179 if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
Michael Buesch13790722009-04-08 21:26:27 +02004180 dev->irq_mask &= ~B43_IRQ_PHY_TXERR;
Michael Buesche4d6b792007-09-18 15:39:42 -04004181
4182 dev->mac_suspended = 1;
4183
4184 /* Noise calculation context */
4185 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
4186}
4187
4188static void b43_bluetooth_coext_enable(struct b43_wldev *dev)
4189{
4190 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
Michael Buescha259d6a2008-04-18 21:06:37 +02004191 u64 hf;
Michael Buesche4d6b792007-09-18 15:39:42 -04004192
Michael Buesch1855ba72008-04-18 20:51:41 +02004193 if (!modparam_btcoex)
4194 return;
Larry Finger95de2842007-11-09 16:57:18 -06004195 if (!(sprom->boardflags_lo & B43_BFL_BTCOEXIST))
Michael Buesche4d6b792007-09-18 15:39:42 -04004196 return;
4197 if (dev->phy.type != B43_PHYTYPE_B && !dev->phy.gmode)
4198 return;
4199
4200 hf = b43_hf_read(dev);
Larry Finger95de2842007-11-09 16:57:18 -06004201 if (sprom->boardflags_lo & B43_BFL_BTCMOD)
Michael Buesche4d6b792007-09-18 15:39:42 -04004202 hf |= B43_HF_BTCOEXALT;
4203 else
4204 hf |= B43_HF_BTCOEX;
4205 b43_hf_write(dev, hf);
Michael Buesche4d6b792007-09-18 15:39:42 -04004206}
4207
4208static void b43_bluetooth_coext_disable(struct b43_wldev *dev)
Michael Buesch1855ba72008-04-18 20:51:41 +02004209{
4210 if (!modparam_btcoex)
4211 return;
4212 //TODO
Michael Buesche4d6b792007-09-18 15:39:42 -04004213}
4214
4215static void b43_imcfglo_timeouts_workaround(struct b43_wldev *dev)
4216{
4217#ifdef CONFIG_SSB_DRIVER_PCICORE
4218 struct ssb_bus *bus = dev->dev->bus;
4219 u32 tmp;
4220
4221 if (bus->pcicore.dev &&
4222 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
4223 bus->pcicore.dev->id.revision <= 5) {
4224 /* IMCFGLO timeouts workaround. */
4225 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
Michael Buesche4d6b792007-09-18 15:39:42 -04004226 switch (bus->bustype) {
4227 case SSB_BUSTYPE_PCI:
4228 case SSB_BUSTYPE_PCMCIA:
Michael Buesch98a1e2a2009-09-08 19:33:31 +02004229 tmp &= ~SSB_IMCFGLO_REQTO;
4230 tmp &= ~SSB_IMCFGLO_SERTO;
Michael Buesche4d6b792007-09-18 15:39:42 -04004231 tmp |= 0x32;
4232 break;
4233 case SSB_BUSTYPE_SSB:
Michael Buesch98a1e2a2009-09-08 19:33:31 +02004234 tmp &= ~SSB_IMCFGLO_REQTO;
4235 tmp &= ~SSB_IMCFGLO_SERTO;
Michael Buesche4d6b792007-09-18 15:39:42 -04004236 tmp |= 0x53;
4237 break;
Michael Buesch98a1e2a2009-09-08 19:33:31 +02004238 default:
4239 break;
Michael Buesche4d6b792007-09-18 15:39:42 -04004240 }
4241 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
4242 }
4243#endif /* CONFIG_SSB_DRIVER_PCICORE */
4244}
4245
Michael Bueschd59f7202008-04-03 18:56:19 +02004246static void b43_set_synth_pu_delay(struct b43_wldev *dev, bool idle)
4247{
4248 u16 pu_delay;
4249
4250 /* The time value is in microseconds. */
4251 if (dev->phy.type == B43_PHYTYPE_A)
4252 pu_delay = 3700;
4253 else
4254 pu_delay = 1050;
Johannes Berg05c914f2008-09-11 00:01:58 +02004255 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
Michael Bueschd59f7202008-04-03 18:56:19 +02004256 pu_delay = 500;
4257 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
4258 pu_delay = max(pu_delay, (u16)2400);
4259
4260 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SPUWKUP, pu_delay);
4261}
4262
4263/* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
4264static void b43_set_pretbtt(struct b43_wldev *dev)
4265{
4266 u16 pretbtt;
4267
4268 /* The time value is in microseconds. */
Johannes Berg05c914f2008-09-11 00:01:58 +02004269 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) {
Michael Bueschd59f7202008-04-03 18:56:19 +02004270 pretbtt = 2;
4271 } else {
4272 if (dev->phy.type == B43_PHYTYPE_A)
4273 pretbtt = 120;
4274 else
4275 pretbtt = 250;
4276 }
4277 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRETBTT, pretbtt);
4278 b43_write16(dev, B43_MMIO_TSF_CFP_PRETBTT, pretbtt);
4279}
4280
Michael Buesche4d6b792007-09-18 15:39:42 -04004281/* Shutdown a wireless core */
4282/* Locking: wl->mutex */
4283static void b43_wireless_core_exit(struct b43_wldev *dev)
4284{
Michael Buesch1f7d87b2008-01-22 20:23:34 +01004285 u32 macctl;
Michael Buesche4d6b792007-09-18 15:39:42 -04004286
Michael Buesch36dbd952009-09-04 22:51:29 +02004287 B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED);
4288 if (!dev || b43_status(dev) != B43_STAT_INITIALIZED)
Michael Buesche4d6b792007-09-18 15:39:42 -04004289 return;
John W. Linville84c164a2010-08-06 15:31:45 -04004290
4291 /* Unregister HW RNG driver */
4292 b43_rng_exit(dev->wl);
4293
Michael Buesche4d6b792007-09-18 15:39:42 -04004294 b43_set_status(dev, B43_STAT_UNINIT);
4295
Michael Buesch1f7d87b2008-01-22 20:23:34 +01004296 /* Stop the microcode PSM. */
4297 macctl = b43_read32(dev, B43_MMIO_MACCTL);
4298 macctl &= ~B43_MACCTL_PSM_RUN;
4299 macctl |= B43_MACCTL_PSM_JMP0;
4300 b43_write32(dev, B43_MMIO_MACCTL, macctl);
4301
Michael Buesche4d6b792007-09-18 15:39:42 -04004302 b43_dma_free(dev);
Michael Buesch5100d5a2008-03-29 21:01:16 +01004303 b43_pio_free(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004304 b43_chip_exit(dev);
Michael Bueschcb24f572008-09-03 12:12:20 +02004305 dev->phy.ops->switch_analog(dev, 0);
Michael Buesche66fee62007-12-26 17:47:10 +01004306 if (dev->wl->current_beacon) {
4307 dev_kfree_skb_any(dev->wl->current_beacon);
4308 dev->wl->current_beacon = NULL;
4309 }
4310
Michael Buesche4d6b792007-09-18 15:39:42 -04004311 ssb_device_disable(dev->dev, 0);
4312 ssb_bus_may_powerdown(dev->dev->bus);
4313}
4314
4315/* Initialize a wireless core */
4316static int b43_wireless_core_init(struct b43_wldev *dev)
4317{
Michael Buesche4d6b792007-09-18 15:39:42 -04004318 struct ssb_bus *bus = dev->dev->bus;
4319 struct ssb_sprom *sprom = &bus->sprom;
4320 struct b43_phy *phy = &dev->phy;
4321 int err;
Michael Buescha259d6a2008-04-18 21:06:37 +02004322 u64 hf;
4323 u32 tmp;
Michael Buesche4d6b792007-09-18 15:39:42 -04004324
4325 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT);
4326
4327 err = ssb_bus_powerup(bus, 0);
4328 if (err)
4329 goto out;
4330 if (!ssb_device_is_enabled(dev->dev)) {
4331 tmp = phy->gmode ? B43_TMSLOW_GMODE : 0;
4332 b43_wireless_core_reset(dev, tmp);
4333 }
4334
Michael Bueschfb111372008-09-02 13:00:34 +02004335 /* Reset all data structures. */
Michael Buesche4d6b792007-09-18 15:39:42 -04004336 setup_struct_wldev_for_init(dev);
Michael Bueschfb111372008-09-02 13:00:34 +02004337 phy->ops->prepare_structs(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004338
4339 /* Enable IRQ routing to this device. */
4340 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
4341
4342 b43_imcfglo_timeouts_workaround(dev);
4343 b43_bluetooth_coext_disable(dev);
Michael Bueschfb111372008-09-02 13:00:34 +02004344 if (phy->ops->prepare_hardware) {
4345 err = phy->ops->prepare_hardware(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +02004346 if (err)
Michael Bueschfb111372008-09-02 13:00:34 +02004347 goto err_busdown;
Michael Bueschef1a6282008-08-27 18:53:02 +02004348 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004349 err = b43_chip_init(dev);
4350 if (err)
Michael Bueschfb111372008-09-02 13:00:34 +02004351 goto err_busdown;
Michael Buesche4d6b792007-09-18 15:39:42 -04004352 b43_shm_write16(dev, B43_SHM_SHARED,
4353 B43_SHM_SH_WLCOREREV, dev->dev->id.revision);
4354 hf = b43_hf_read(dev);
4355 if (phy->type == B43_PHYTYPE_G) {
4356 hf |= B43_HF_SYMW;
4357 if (phy->rev == 1)
4358 hf |= B43_HF_GDCW;
Larry Finger95de2842007-11-09 16:57:18 -06004359 if (sprom->boardflags_lo & B43_BFL_PACTRL)
Michael Buesche4d6b792007-09-18 15:39:42 -04004360 hf |= B43_HF_OFDMPABOOST;
Michael Buesch969d15c2009-02-20 14:27:15 +01004361 }
4362 if (phy->radio_ver == 0x2050) {
4363 if (phy->radio_rev == 6)
4364 hf |= B43_HF_4318TSSI;
4365 if (phy->radio_rev < 6)
4366 hf |= B43_HF_VCORECALC;
Michael Buesche4d6b792007-09-18 15:39:42 -04004367 }
Michael Buesch1cc8f472009-02-20 14:47:56 +01004368 if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)
4369 hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */
Michael Buesch1a777332009-03-04 16:41:10 +01004370#ifdef CONFIG_SSB_DRIVER_PCICORE
Michael Buesch88219052009-02-20 14:58:59 +01004371 if ((bus->bustype == SSB_BUSTYPE_PCI) &&
4372 (bus->pcicore.dev->id.revision <= 10))
4373 hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */
Michael Buesch1a777332009-03-04 16:41:10 +01004374#endif
Michael Buesch25d3ef52009-02-20 15:39:21 +01004375 hf &= ~B43_HF_SKCFPUP;
Michael Buesche4d6b792007-09-18 15:39:42 -04004376 b43_hf_write(dev, hf);
4377
Michael Buesch74cfdba2007-10-28 16:19:44 +01004378 b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT,
4379 B43_DEFAULT_LONG_RETRY_LIMIT);
Michael Buesche4d6b792007-09-18 15:39:42 -04004380 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SFFBLIM, 3);
4381 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_LFFBLIM, 2);
4382
4383 /* Disable sending probe responses from firmware.
4384 * Setting the MaxTime to one usec will always trigger
4385 * a timeout, so we never send any probe resp.
4386 * A timeout of zero is infinite. */
4387 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRMAXTIME, 1);
4388
4389 b43_rate_memory_init(dev);
Michael Buesch5042c502008-04-05 15:05:00 +02004390 b43_set_phytxctl_defaults(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004391
4392 /* Minimum Contention Window */
Daniel Nguc5a079f2010-03-23 00:52:44 +13004393 if (phy->type == B43_PHYTYPE_B)
Michael Buesche4d6b792007-09-18 15:39:42 -04004394 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0x1F);
Daniel Nguc5a079f2010-03-23 00:52:44 +13004395 else
Michael Buesche4d6b792007-09-18 15:39:42 -04004396 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0xF);
Michael Buesche4d6b792007-09-18 15:39:42 -04004397 /* Maximum Contention Window */
4398 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF);
4399
Albert Herranz3dbba8e2009-09-10 19:34:49 +02004400 if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
4401 (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) ||
Linus Torvalds9e3bd912010-02-26 10:34:27 -08004402 dev->use_pio) {
Michael Buesch5100d5a2008-03-29 21:01:16 +01004403 dev->__using_pio_transfers = 1;
4404 err = b43_pio_init(dev);
4405 } else {
4406 dev->__using_pio_transfers = 0;
4407 err = b43_dma_init(dev);
4408 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004409 if (err)
4410 goto err_chip_exit;
Michael Buesch03b29772007-12-26 14:41:30 +01004411 b43_qos_init(dev);
Michael Bueschd59f7202008-04-03 18:56:19 +02004412 b43_set_synth_pu_delay(dev, 1);
Michael Buesche4d6b792007-09-18 15:39:42 -04004413 b43_bluetooth_coext_enable(dev);
4414
Michael Buesch1cc8f472009-02-20 14:47:56 +01004415 ssb_bus_powerup(bus, !(sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW));
Johannes Berg4150c572007-09-17 01:29:23 -04004416 b43_upload_card_macaddress(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004417 b43_security_init(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004418
Michael Buesch5ab95492009-09-10 20:31:46 +02004419 ieee80211_wake_queues(dev->wl->hw);
Michael Buesche4d6b792007-09-18 15:39:42 -04004420
4421 b43_set_status(dev, B43_STAT_INITIALIZED);
4422
John W. Linville84c164a2010-08-06 15:31:45 -04004423 /* Register HW RNG driver */
4424 b43_rng_init(dev->wl);
4425
Larry Finger1a8d1222007-12-14 13:59:11 +01004426out:
Michael Buesche4d6b792007-09-18 15:39:42 -04004427 return err;
4428
Michael Bueschef1a6282008-08-27 18:53:02 +02004429err_chip_exit:
Michael Buesche4d6b792007-09-18 15:39:42 -04004430 b43_chip_exit(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +02004431err_busdown:
Michael Buesche4d6b792007-09-18 15:39:42 -04004432 ssb_bus_may_powerdown(bus);
4433 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT);
4434 return err;
4435}
4436
Michael Buesch40faacc2007-10-28 16:29:32 +01004437static int b43_op_add_interface(struct ieee80211_hw *hw,
Johannes Berg1ed32e42009-12-23 13:15:45 +01004438 struct ieee80211_vif *vif)
Michael Buesche4d6b792007-09-18 15:39:42 -04004439{
4440 struct b43_wl *wl = hw_to_b43_wl(hw);
4441 struct b43_wldev *dev;
Michael Buesche4d6b792007-09-18 15:39:42 -04004442 int err = -EOPNOTSUPP;
Johannes Berg4150c572007-09-17 01:29:23 -04004443
4444 /* TODO: allow WDS/AP devices to coexist */
4445
Johannes Berg1ed32e42009-12-23 13:15:45 +01004446 if (vif->type != NL80211_IFTYPE_AP &&
4447 vif->type != NL80211_IFTYPE_MESH_POINT &&
4448 vif->type != NL80211_IFTYPE_STATION &&
4449 vif->type != NL80211_IFTYPE_WDS &&
4450 vif->type != NL80211_IFTYPE_ADHOC)
Johannes Berg4150c572007-09-17 01:29:23 -04004451 return -EOPNOTSUPP;
Michael Buesche4d6b792007-09-18 15:39:42 -04004452
4453 mutex_lock(&wl->mutex);
Johannes Berg4150c572007-09-17 01:29:23 -04004454 if (wl->operating)
Michael Buesche4d6b792007-09-18 15:39:42 -04004455 goto out_mutex_unlock;
4456
Johannes Berg1ed32e42009-12-23 13:15:45 +01004457 b43dbg(wl, "Adding Interface type %d\n", vif->type);
Michael Buesche4d6b792007-09-18 15:39:42 -04004458
4459 dev = wl->current_dev;
Johannes Berg4150c572007-09-17 01:29:23 -04004460 wl->operating = 1;
Johannes Berg1ed32e42009-12-23 13:15:45 +01004461 wl->vif = vif;
4462 wl->if_type = vif->type;
4463 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
Michael Buesche4d6b792007-09-18 15:39:42 -04004464
Michael Buesche4d6b792007-09-18 15:39:42 -04004465 b43_adjust_opmode(dev);
Michael Bueschd59f7202008-04-03 18:56:19 +02004466 b43_set_pretbtt(dev);
4467 b43_set_synth_pu_delay(dev, 0);
Johannes Berg4150c572007-09-17 01:29:23 -04004468 b43_upload_card_macaddress(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004469
4470 err = 0;
Johannes Berg4150c572007-09-17 01:29:23 -04004471 out_mutex_unlock:
Michael Buesche4d6b792007-09-18 15:39:42 -04004472 mutex_unlock(&wl->mutex);
4473
4474 return err;
4475}
4476
Michael Buesch40faacc2007-10-28 16:29:32 +01004477static void b43_op_remove_interface(struct ieee80211_hw *hw,
Johannes Berg1ed32e42009-12-23 13:15:45 +01004478 struct ieee80211_vif *vif)
Michael Buesche4d6b792007-09-18 15:39:42 -04004479{
4480 struct b43_wl *wl = hw_to_b43_wl(hw);
Johannes Berg4150c572007-09-17 01:29:23 -04004481 struct b43_wldev *dev = wl->current_dev;
Michael Buesche4d6b792007-09-18 15:39:42 -04004482
Johannes Berg1ed32e42009-12-23 13:15:45 +01004483 b43dbg(wl, "Removing Interface type %d\n", vif->type);
Michael Buesche4d6b792007-09-18 15:39:42 -04004484
4485 mutex_lock(&wl->mutex);
Johannes Berg4150c572007-09-17 01:29:23 -04004486
4487 B43_WARN_ON(!wl->operating);
Johannes Berg1ed32e42009-12-23 13:15:45 +01004488 B43_WARN_ON(wl->vif != vif);
Johannes Berg32bfd352007-12-19 01:31:26 +01004489 wl->vif = NULL;
Johannes Berg4150c572007-09-17 01:29:23 -04004490
4491 wl->operating = 0;
4492
Johannes Berg4150c572007-09-17 01:29:23 -04004493 b43_adjust_opmode(dev);
4494 memset(wl->mac_addr, 0, ETH_ALEN);
4495 b43_upload_card_macaddress(dev);
Johannes Berg4150c572007-09-17 01:29:23 -04004496
4497 mutex_unlock(&wl->mutex);
4498}
4499
Michael Buesch40faacc2007-10-28 16:29:32 +01004500static int b43_op_start(struct ieee80211_hw *hw)
Johannes Berg4150c572007-09-17 01:29:23 -04004501{
4502 struct b43_wl *wl = hw_to_b43_wl(hw);
4503 struct b43_wldev *dev = wl->current_dev;
4504 int did_init = 0;
WANG Cong923403b2007-10-16 14:29:38 -07004505 int err = 0;
Johannes Berg4150c572007-09-17 01:29:23 -04004506
Michael Buesch7be1bb62008-01-23 21:10:56 +01004507 /* Kill all old instance specific information to make sure
4508 * the card won't use it in the short timeframe between start
4509 * and mac80211 reconfiguring it. */
4510 memset(wl->bssid, 0, ETH_ALEN);
4511 memset(wl->mac_addr, 0, ETH_ALEN);
4512 wl->filter_flags = 0;
4513 wl->radiotap_enabled = 0;
Michael Buesche6f5b932008-03-05 21:18:49 +01004514 b43_qos_clear(wl);
Michael Buesch6b4bec02008-05-20 12:16:28 +02004515 wl->beacon0_uploaded = 0;
4516 wl->beacon1_uploaded = 0;
4517 wl->beacon_templates_virgin = 1;
Larry Fingerfd4973c2009-06-20 12:58:11 -05004518 wl->radio_enabled = 1;
Michael Buesch7be1bb62008-01-23 21:10:56 +01004519
Johannes Berg4150c572007-09-17 01:29:23 -04004520 mutex_lock(&wl->mutex);
4521
4522 if (b43_status(dev) < B43_STAT_INITIALIZED) {
4523 err = b43_wireless_core_init(dev);
Johannes Bergf41f3f32009-06-07 12:30:34 -05004524 if (err)
Johannes Berg4150c572007-09-17 01:29:23 -04004525 goto out_mutex_unlock;
4526 did_init = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004527 }
4528
Johannes Berg4150c572007-09-17 01:29:23 -04004529 if (b43_status(dev) < B43_STAT_STARTED) {
4530 err = b43_wireless_core_start(dev);
4531 if (err) {
4532 if (did_init)
4533 b43_wireless_core_exit(dev);
4534 goto out_mutex_unlock;
4535 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004536 }
Johannes Berg4150c572007-09-17 01:29:23 -04004537
Johannes Bergf41f3f32009-06-07 12:30:34 -05004538 /* XXX: only do if device doesn't support rfkill irq */
4539 wiphy_rfkill_start_polling(hw->wiphy);
4540
Johannes Berg4150c572007-09-17 01:29:23 -04004541 out_mutex_unlock:
4542 mutex_unlock(&wl->mutex);
4543
4544 return err;
4545}
4546
Michael Buesch40faacc2007-10-28 16:29:32 +01004547static void b43_op_stop(struct ieee80211_hw *hw)
Johannes Berg4150c572007-09-17 01:29:23 -04004548{
4549 struct b43_wl *wl = hw_to_b43_wl(hw);
4550 struct b43_wldev *dev = wl->current_dev;
4551
Michael Buescha82d9922008-04-04 21:40:06 +02004552 cancel_work_sync(&(wl->beacon_update_trigger));
Larry Finger1a8d1222007-12-14 13:59:11 +01004553
Johannes Berg4150c572007-09-17 01:29:23 -04004554 mutex_lock(&wl->mutex);
Michael Buesch36dbd952009-09-04 22:51:29 +02004555 if (b43_status(dev) >= B43_STAT_STARTED) {
4556 dev = b43_wireless_core_stop(dev);
4557 if (!dev)
4558 goto out_unlock;
4559 }
Johannes Berg4150c572007-09-17 01:29:23 -04004560 b43_wireless_core_exit(dev);
Larry Fingerfd4973c2009-06-20 12:58:11 -05004561 wl->radio_enabled = 0;
Michael Buesch36dbd952009-09-04 22:51:29 +02004562
4563out_unlock:
Michael Buesche4d6b792007-09-18 15:39:42 -04004564 mutex_unlock(&wl->mutex);
Michael Buesch18c8ade2008-08-28 19:33:40 +02004565
4566 cancel_work_sync(&(wl->txpower_adjust_work));
Michael Buesche4d6b792007-09-18 15:39:42 -04004567}
4568
Johannes Berg17741cd2008-09-11 00:02:02 +02004569static int b43_op_beacon_set_tim(struct ieee80211_hw *hw,
4570 struct ieee80211_sta *sta, bool set)
Michael Buesche66fee62007-12-26 17:47:10 +01004571{
4572 struct b43_wl *wl = hw_to_b43_wl(hw);
Michael Buesche66fee62007-12-26 17:47:10 +01004573
Felix Fietkau8f611282009-11-07 18:37:37 +01004574 /* FIXME: add locking */
Johannes Berg9d139c82008-07-09 14:40:37 +02004575 b43_update_templates(wl);
Michael Buesche66fee62007-12-26 17:47:10 +01004576
4577 return 0;
4578}
4579
Johannes Berg38968d02008-02-25 16:27:50 +01004580static void b43_op_sta_notify(struct ieee80211_hw *hw,
4581 struct ieee80211_vif *vif,
4582 enum sta_notify_cmd notify_cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02004583 struct ieee80211_sta *sta)
Johannes Berg38968d02008-02-25 16:27:50 +01004584{
4585 struct b43_wl *wl = hw_to_b43_wl(hw);
4586
4587 B43_WARN_ON(!vif || wl->vif != vif);
4588}
4589
Michael Buesch25d3ef52009-02-20 15:39:21 +01004590static void b43_op_sw_scan_start_notifier(struct ieee80211_hw *hw)
4591{
4592 struct b43_wl *wl = hw_to_b43_wl(hw);
4593 struct b43_wldev *dev;
4594
4595 mutex_lock(&wl->mutex);
4596 dev = wl->current_dev;
4597 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) {
4598 /* Disable CFP update during scan on other channels. */
4599 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_SKCFPUP);
4600 }
4601 mutex_unlock(&wl->mutex);
4602}
4603
4604static void b43_op_sw_scan_complete_notifier(struct ieee80211_hw *hw)
4605{
4606 struct b43_wl *wl = hw_to_b43_wl(hw);
4607 struct b43_wldev *dev;
4608
4609 mutex_lock(&wl->mutex);
4610 dev = wl->current_dev;
4611 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) {
4612 /* Re-enable CFP update. */
4613 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_SKCFPUP);
4614 }
4615 mutex_unlock(&wl->mutex);
4616}
4617
John W. Linville354b4f02010-04-29 15:56:06 -04004618static int b43_op_get_survey(struct ieee80211_hw *hw, int idx,
4619 struct survey_info *survey)
4620{
4621 struct b43_wl *wl = hw_to_b43_wl(hw);
4622 struct b43_wldev *dev = wl->current_dev;
4623 struct ieee80211_conf *conf = &hw->conf;
4624
4625 if (idx != 0)
4626 return -ENOENT;
4627
4628 survey->channel = conf->channel;
4629 survey->filled = SURVEY_INFO_NOISE_DBM;
4630 survey->noise = dev->stats.link_noise;
4631
4632 return 0;
4633}
4634
Michael Buesche4d6b792007-09-18 15:39:42 -04004635static const struct ieee80211_ops b43_hw_ops = {
Michael Buesch40faacc2007-10-28 16:29:32 +01004636 .tx = b43_op_tx,
4637 .conf_tx = b43_op_conf_tx,
4638 .add_interface = b43_op_add_interface,
4639 .remove_interface = b43_op_remove_interface,
4640 .config = b43_op_config,
Johannes Bergc7ab5ef2008-10-29 20:02:12 +01004641 .bss_info_changed = b43_op_bss_info_changed,
Michael Buesch40faacc2007-10-28 16:29:32 +01004642 .configure_filter = b43_op_configure_filter,
4643 .set_key = b43_op_set_key,
gregor kowski035d0242009-08-19 22:35:45 +02004644 .update_tkip_key = b43_op_update_tkip_key,
Michael Buesch40faacc2007-10-28 16:29:32 +01004645 .get_stats = b43_op_get_stats,
Alina Friedrichsen08e87a82009-01-25 15:28:28 +01004646 .get_tsf = b43_op_get_tsf,
4647 .set_tsf = b43_op_set_tsf,
Michael Buesch40faacc2007-10-28 16:29:32 +01004648 .start = b43_op_start,
4649 .stop = b43_op_stop,
Michael Buesche66fee62007-12-26 17:47:10 +01004650 .set_tim = b43_op_beacon_set_tim,
Johannes Berg38968d02008-02-25 16:27:50 +01004651 .sta_notify = b43_op_sta_notify,
Michael Buesch25d3ef52009-02-20 15:39:21 +01004652 .sw_scan_start = b43_op_sw_scan_start_notifier,
4653 .sw_scan_complete = b43_op_sw_scan_complete_notifier,
John W. Linville354b4f02010-04-29 15:56:06 -04004654 .get_survey = b43_op_get_survey,
Johannes Bergf41f3f32009-06-07 12:30:34 -05004655 .rfkill_poll = b43_rfkill_poll,
Michael Buesche4d6b792007-09-18 15:39:42 -04004656};
4657
4658/* Hard-reset the chip. Do not call this directly.
4659 * Use b43_controller_restart()
4660 */
4661static void b43_chip_reset(struct work_struct *work)
4662{
4663 struct b43_wldev *dev =
4664 container_of(work, struct b43_wldev, restart_work);
4665 struct b43_wl *wl = dev->wl;
4666 int err = 0;
4667 int prev_status;
4668
4669 mutex_lock(&wl->mutex);
4670
4671 prev_status = b43_status(dev);
4672 /* Bring the device down... */
Michael Buesch36dbd952009-09-04 22:51:29 +02004673 if (prev_status >= B43_STAT_STARTED) {
4674 dev = b43_wireless_core_stop(dev);
4675 if (!dev) {
4676 err = -ENODEV;
4677 goto out;
4678 }
4679 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004680 if (prev_status >= B43_STAT_INITIALIZED)
4681 b43_wireless_core_exit(dev);
4682
4683 /* ...and up again. */
4684 if (prev_status >= B43_STAT_INITIALIZED) {
4685 err = b43_wireless_core_init(dev);
4686 if (err)
4687 goto out;
4688 }
4689 if (prev_status >= B43_STAT_STARTED) {
4690 err = b43_wireless_core_start(dev);
4691 if (err) {
4692 b43_wireless_core_exit(dev);
4693 goto out;
4694 }
4695 }
Michael Buesch3bf0a322008-05-22 16:32:16 +02004696out:
4697 if (err)
4698 wl->current_dev = NULL; /* Failed to init the dev. */
Michael Buesche4d6b792007-09-18 15:39:42 -04004699 mutex_unlock(&wl->mutex);
4700 if (err)
4701 b43err(wl, "Controller restart FAILED\n");
4702 else
4703 b43info(wl, "Controller restarted\n");
4704}
4705
Michael Bueschbb1eeff2008-02-09 12:08:58 +01004706static int b43_setup_bands(struct b43_wldev *dev,
Michael Buesch96c755a2008-01-06 00:09:46 +01004707 bool have_2ghz_phy, bool have_5ghz_phy)
Michael Buesche4d6b792007-09-18 15:39:42 -04004708{
4709 struct ieee80211_hw *hw = dev->wl->hw;
Michael Buesche4d6b792007-09-18 15:39:42 -04004710
Michael Bueschbb1eeff2008-02-09 12:08:58 +01004711 if (have_2ghz_phy)
4712 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &b43_band_2GHz;
4713 if (dev->phy.type == B43_PHYTYPE_N) {
4714 if (have_5ghz_phy)
4715 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &b43_band_5GHz_nphy;
4716 } else {
4717 if (have_5ghz_phy)
4718 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &b43_band_5GHz_aphy;
4719 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004720
Michael Bueschbb1eeff2008-02-09 12:08:58 +01004721 dev->phy.supports_2ghz = have_2ghz_phy;
4722 dev->phy.supports_5ghz = have_5ghz_phy;
Michael Buesche4d6b792007-09-18 15:39:42 -04004723
4724 return 0;
4725}
4726
4727static void b43_wireless_core_detach(struct b43_wldev *dev)
4728{
4729 /* We release firmware that late to not be required to re-request
4730 * is all the time when we reinit the core. */
4731 b43_release_firmware(dev);
Michael Bueschfb111372008-09-02 13:00:34 +02004732 b43_phy_free(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004733}
4734
4735static int b43_wireless_core_attach(struct b43_wldev *dev)
4736{
4737 struct b43_wl *wl = dev->wl;
4738 struct ssb_bus *bus = dev->dev->bus;
Michael Buesch899110f2009-10-09 20:30:10 +02004739 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
Michael Buesche4d6b792007-09-18 15:39:42 -04004740 int err;
Michael Buesch96c755a2008-01-06 00:09:46 +01004741 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04004742 u32 tmp;
4743
4744 /* Do NOT do any device initialization here.
4745 * Do it in wireless_core_init() instead.
4746 * This function is for gathering basic information about the HW, only.
4747 * Also some structs may be set up here. But most likely you want to have
4748 * that in core_init(), too.
4749 */
4750
4751 err = ssb_bus_powerup(bus, 0);
4752 if (err) {
4753 b43err(wl, "Bus powerup failed\n");
4754 goto out;
4755 }
4756 /* Get the PHY type. */
4757 if (dev->dev->id.revision >= 5) {
4758 u32 tmshigh;
4759
4760 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
Michael Buesch96c755a2008-01-06 00:09:46 +01004761 have_2ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_2GHZ_PHY);
4762 have_5ghz_phy = !!(tmshigh & B43_TMSHIGH_HAVE_5GHZ_PHY);
Michael Buesche4d6b792007-09-18 15:39:42 -04004763 } else
Michael Buesch96c755a2008-01-06 00:09:46 +01004764 B43_WARN_ON(1);
Michael Buesche4d6b792007-09-18 15:39:42 -04004765
Michael Buesch96c755a2008-01-06 00:09:46 +01004766 dev->phy.gmode = have_2ghz_phy;
Larry Fingerfd4973c2009-06-20 12:58:11 -05004767 dev->phy.radio_on = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004768 tmp = dev->phy.gmode ? B43_TMSLOW_GMODE : 0;
4769 b43_wireless_core_reset(dev, tmp);
4770
4771 err = b43_phy_versioning(dev);
4772 if (err)
Michael Buesch21954c32007-09-27 15:31:40 +02004773 goto err_powerdown;
Michael Buesche4d6b792007-09-18 15:39:42 -04004774 /* Check if this device supports multiband. */
4775 if (!pdev ||
4776 (pdev->device != 0x4312 &&
4777 pdev->device != 0x4319 && pdev->device != 0x4324)) {
4778 /* No multiband support. */
Michael Buesch96c755a2008-01-06 00:09:46 +01004779 have_2ghz_phy = 0;
4780 have_5ghz_phy = 0;
Michael Buesche4d6b792007-09-18 15:39:42 -04004781 switch (dev->phy.type) {
4782 case B43_PHYTYPE_A:
Michael Buesch96c755a2008-01-06 00:09:46 +01004783 have_5ghz_phy = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004784 break;
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02004785 case B43_PHYTYPE_LP: //FIXME not always!
Gábor Stefanik86b28922009-08-16 20:22:41 +02004786#if 0 //FIXME enabling 5GHz causes a NULL pointer dereference
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02004787 have_5ghz_phy = 1;
Gábor Stefanik86b28922009-08-16 20:22:41 +02004788#endif
Michael Buesche4d6b792007-09-18 15:39:42 -04004789 case B43_PHYTYPE_G:
Michael Buesch96c755a2008-01-06 00:09:46 +01004790 case B43_PHYTYPE_N:
4791 have_2ghz_phy = 1;
Michael Buesche4d6b792007-09-18 15:39:42 -04004792 break;
4793 default:
4794 B43_WARN_ON(1);
4795 }
4796 }
Michael Buesch96c755a2008-01-06 00:09:46 +01004797 if (dev->phy.type == B43_PHYTYPE_A) {
4798 /* FIXME */
4799 b43err(wl, "IEEE 802.11a devices are unsupported\n");
4800 err = -EOPNOTSUPP;
4801 goto err_powerdown;
4802 }
Michael Buesch2e35af12008-04-27 19:06:18 +02004803 if (1 /* disable A-PHY */) {
4804 /* FIXME: For now we disable the A-PHY on multi-PHY devices. */
Gábor Stefanik9d86a2d2009-08-14 14:54:46 +02004805 if (dev->phy.type != B43_PHYTYPE_N &&
4806 dev->phy.type != B43_PHYTYPE_LP) {
Michael Buesch2e35af12008-04-27 19:06:18 +02004807 have_2ghz_phy = 1;
4808 have_5ghz_phy = 0;
4809 }
4810 }
4811
Michael Bueschfb111372008-09-02 13:00:34 +02004812 err = b43_phy_allocate(dev);
4813 if (err)
4814 goto err_powerdown;
4815
Michael Buesch96c755a2008-01-06 00:09:46 +01004816 dev->phy.gmode = have_2ghz_phy;
Michael Buesche4d6b792007-09-18 15:39:42 -04004817 tmp = dev->phy.gmode ? B43_TMSLOW_GMODE : 0;
4818 b43_wireless_core_reset(dev, tmp);
4819
4820 err = b43_validate_chipaccess(dev);
4821 if (err)
Michael Bueschfb111372008-09-02 13:00:34 +02004822 goto err_phy_free;
Michael Bueschbb1eeff2008-02-09 12:08:58 +01004823 err = b43_setup_bands(dev, have_2ghz_phy, have_5ghz_phy);
Michael Buesche4d6b792007-09-18 15:39:42 -04004824 if (err)
Michael Bueschfb111372008-09-02 13:00:34 +02004825 goto err_phy_free;
Michael Buesche4d6b792007-09-18 15:39:42 -04004826
4827 /* Now set some default "current_dev" */
4828 if (!wl->current_dev)
4829 wl->current_dev = dev;
4830 INIT_WORK(&dev->restart_work, b43_chip_reset);
4831
Michael Bueschcb24f572008-09-03 12:12:20 +02004832 dev->phy.ops->switch_analog(dev, 0);
Michael Buesche4d6b792007-09-18 15:39:42 -04004833 ssb_device_disable(dev->dev, 0);
4834 ssb_bus_may_powerdown(bus);
4835
4836out:
4837 return err;
4838
Michael Bueschfb111372008-09-02 13:00:34 +02004839err_phy_free:
4840 b43_phy_free(dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04004841err_powerdown:
4842 ssb_bus_may_powerdown(bus);
4843 return err;
4844}
4845
4846static void b43_one_core_detach(struct ssb_device *dev)
4847{
4848 struct b43_wldev *wldev;
4849 struct b43_wl *wl;
4850
Michael Buesch3bf0a322008-05-22 16:32:16 +02004851 /* Do not cancel ieee80211-workqueue based work here.
4852 * See comment in b43_remove(). */
4853
Michael Buesche4d6b792007-09-18 15:39:42 -04004854 wldev = ssb_get_drvdata(dev);
4855 wl = wldev->wl;
Michael Buesche4d6b792007-09-18 15:39:42 -04004856 b43_debugfs_remove_device(wldev);
4857 b43_wireless_core_detach(wldev);
4858 list_del(&wldev->list);
4859 wl->nr_devs--;
4860 ssb_set_drvdata(dev, NULL);
4861 kfree(wldev);
4862}
4863
4864static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4865{
4866 struct b43_wldev *wldev;
4867 struct pci_dev *pdev;
4868 int err = -ENOMEM;
4869
4870 if (!list_empty(&wl->devlist)) {
4871 /* We are not the first core on this chip. */
Michael Buesch899110f2009-10-09 20:30:10 +02004872 pdev = (dev->bus->bustype == SSB_BUSTYPE_PCI) ? dev->bus->host_pci : NULL;
Michael Buesche4d6b792007-09-18 15:39:42 -04004873 /* Only special chips support more than one wireless
4874 * core, although some of the other chips have more than
4875 * one wireless core as well. Check for this and
4876 * bail out early.
4877 */
4878 if (!pdev ||
4879 ((pdev->device != 0x4321) &&
4880 (pdev->device != 0x4313) && (pdev->device != 0x431A))) {
4881 b43dbg(wl, "Ignoring unconnected 802.11 core\n");
4882 return -ENODEV;
4883 }
4884 }
4885
4886 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
4887 if (!wldev)
4888 goto out;
4889
Linus Torvalds9e3bd912010-02-26 10:34:27 -08004890 wldev->use_pio = b43_modparam_pio;
Michael Buesche4d6b792007-09-18 15:39:42 -04004891 wldev->dev = dev;
4892 wldev->wl = wl;
4893 b43_set_status(wldev, B43_STAT_UNINIT);
4894 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
Michael Buesche4d6b792007-09-18 15:39:42 -04004895 INIT_LIST_HEAD(&wldev->list);
4896
4897 err = b43_wireless_core_attach(wldev);
4898 if (err)
4899 goto err_kfree_wldev;
4900
4901 list_add(&wldev->list, &wl->devlist);
4902 wl->nr_devs++;
4903 ssb_set_drvdata(dev, wldev);
4904 b43_debugfs_add_device(wldev);
4905
4906 out:
4907 return err;
4908
4909 err_kfree_wldev:
4910 kfree(wldev);
4911 return err;
4912}
4913
Michael Buesch9fc38452008-04-19 16:53:00 +02004914#define IS_PDEV(pdev, _vendor, _device, _subvendor, _subdevice) ( \
4915 (pdev->vendor == PCI_VENDOR_ID_##_vendor) && \
4916 (pdev->device == _device) && \
4917 (pdev->subsystem_vendor == PCI_VENDOR_ID_##_subvendor) && \
4918 (pdev->subsystem_device == _subdevice) )
4919
Michael Buesche4d6b792007-09-18 15:39:42 -04004920static void b43_sprom_fixup(struct ssb_bus *bus)
4921{
Michael Buesch1855ba72008-04-18 20:51:41 +02004922 struct pci_dev *pdev;
4923
Michael Buesche4d6b792007-09-18 15:39:42 -04004924 /* boardflags workarounds */
4925 if (bus->boardinfo.vendor == SSB_BOARDVENDOR_DELL &&
4926 bus->chip_id == 0x4301 && bus->boardinfo.rev == 0x74)
Larry Finger95de2842007-11-09 16:57:18 -06004927 bus->sprom.boardflags_lo |= B43_BFL_BTCOEXIST;
Michael Buesche4d6b792007-09-18 15:39:42 -04004928 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
4929 bus->boardinfo.type == 0x4E && bus->boardinfo.rev > 0x40)
Larry Finger95de2842007-11-09 16:57:18 -06004930 bus->sprom.boardflags_lo |= B43_BFL_PACTRL;
Michael Buesch1855ba72008-04-18 20:51:41 +02004931 if (bus->bustype == SSB_BUSTYPE_PCI) {
4932 pdev = bus->host_pci;
Michael Buesch9fc38452008-04-19 16:53:00 +02004933 if (IS_PDEV(pdev, BROADCOM, 0x4318, ASUSTEK, 0x100F) ||
Larry Finger430cd472008-08-14 18:57:11 -05004934 IS_PDEV(pdev, BROADCOM, 0x4320, DELL, 0x0003) ||
Larry Finger570bdfb2008-09-26 08:23:00 -05004935 IS_PDEV(pdev, BROADCOM, 0x4320, HP, 0x12f8) ||
Michael Buesch9fc38452008-04-19 16:53:00 +02004936 IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0015) ||
Larry Fingera58d4522008-08-10 10:19:33 -05004937 IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0014) ||
Larry Finger3bb91bf2008-09-19 14:47:38 -05004938 IS_PDEV(pdev, BROADCOM, 0x4320, LINKSYS, 0x0013) ||
4939 IS_PDEV(pdev, BROADCOM, 0x4320, MOTOROLA, 0x7010))
Michael Buesch1855ba72008-04-18 20:51:41 +02004940 bus->sprom.boardflags_lo &= ~B43_BFL_BTCOEXIST;
4941 }
Michael Buesche4d6b792007-09-18 15:39:42 -04004942}
4943
4944static void b43_wireless_exit(struct ssb_device *dev, struct b43_wl *wl)
4945{
4946 struct ieee80211_hw *hw = wl->hw;
4947
4948 ssb_set_devtypedata(dev, NULL);
4949 ieee80211_free_hw(hw);
4950}
4951
4952static int b43_wireless_init(struct ssb_device *dev)
4953{
4954 struct ssb_sprom *sprom = &dev->bus->sprom;
4955 struct ieee80211_hw *hw;
4956 struct b43_wl *wl;
4957 int err = -ENOMEM;
4958
4959 b43_sprom_fixup(dev->bus);
4960
4961 hw = ieee80211_alloc_hw(sizeof(*wl), &b43_hw_ops);
4962 if (!hw) {
4963 b43err(NULL, "Could not allocate ieee80211 device\n");
4964 goto out;
4965 }
Michael Buesch403a3a12009-06-08 21:04:57 +02004966 wl = hw_to_b43_wl(hw);
Michael Buesche4d6b792007-09-18 15:39:42 -04004967
4968 /* fill hw info */
Johannes Berg605a0bd2008-07-15 10:10:01 +02004969 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
John W. Linvillef5c044e2010-04-30 15:37:00 -04004970 IEEE80211_HW_SIGNAL_DBM;
Bruno Randolf566bfe52008-05-08 19:15:40 +02004971
Luis R. Rodriguezf59ac042008-08-29 16:26:43 -07004972 hw->wiphy->interface_modes =
4973 BIT(NL80211_IFTYPE_AP) |
4974 BIT(NL80211_IFTYPE_MESH_POINT) |
4975 BIT(NL80211_IFTYPE_STATION) |
4976 BIT(NL80211_IFTYPE_WDS) |
4977 BIT(NL80211_IFTYPE_ADHOC);
4978
Michael Buesch403a3a12009-06-08 21:04:57 +02004979 hw->queues = modparam_qos ? 4 : 1;
4980 wl->mac80211_initially_registered_queues = hw->queues;
Johannes Berge6a98542008-10-21 12:40:02 +02004981 hw->max_rates = 2;
Michael Buesche4d6b792007-09-18 15:39:42 -04004982 SET_IEEE80211_DEV(hw, dev->dev);
Larry Finger95de2842007-11-09 16:57:18 -06004983 if (is_valid_ether_addr(sprom->et1mac))
4984 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
Michael Buesche4d6b792007-09-18 15:39:42 -04004985 else
Larry Finger95de2842007-11-09 16:57:18 -06004986 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
Michael Buesche4d6b792007-09-18 15:39:42 -04004987
Michael Buesch403a3a12009-06-08 21:04:57 +02004988 /* Initialize struct b43_wl */
Michael Buesche4d6b792007-09-18 15:39:42 -04004989 wl->hw = hw;
Michael Buesche4d6b792007-09-18 15:39:42 -04004990 mutex_init(&wl->mutex);
Michael Buesch36dbd952009-09-04 22:51:29 +02004991 spin_lock_init(&wl->hardirq_lock);
Michael Buesche4d6b792007-09-18 15:39:42 -04004992 INIT_LIST_HEAD(&wl->devlist);
Michael Buescha82d9922008-04-04 21:40:06 +02004993 INIT_WORK(&wl->beacon_update_trigger, b43_beacon_update_trigger_work);
Michael Buesch18c8ade2008-08-28 19:33:40 +02004994 INIT_WORK(&wl->txpower_adjust_work, b43_phy_txpower_adjust_work);
Michael Bueschf5d40ee2009-09-04 22:53:18 +02004995 INIT_WORK(&wl->tx_work, b43_tx_work);
4996 skb_queue_head_init(&wl->tx_queue);
Michael Buesche4d6b792007-09-18 15:39:42 -04004997
4998 ssb_set_devtypedata(dev, wl);
Michael Buesch060210f2009-01-25 15:49:59 +01004999 b43info(wl, "Broadcom %04X WLAN found (core revision %u)\n",
5000 dev->bus->chip_id, dev->id.revision);
Michael Buesche4d6b792007-09-18 15:39:42 -04005001 err = 0;
Michael Buesch060210f2009-01-25 15:49:59 +01005002out:
Michael Buesche4d6b792007-09-18 15:39:42 -04005003 return err;
5004}
5005
5006static int b43_probe(struct ssb_device *dev, const struct ssb_device_id *id)
5007{
5008 struct b43_wl *wl;
5009 int err;
5010 int first = 0;
5011
5012 wl = ssb_get_devtypedata(dev);
5013 if (!wl) {
5014 /* Probing the first core. Must setup common struct b43_wl */
5015 first = 1;
5016 err = b43_wireless_init(dev);
5017 if (err)
5018 goto out;
5019 wl = ssb_get_devtypedata(dev);
5020 B43_WARN_ON(!wl);
5021 }
5022 err = b43_one_core_attach(dev, wl);
5023 if (err)
5024 goto err_wireless_exit;
5025
5026 if (first) {
5027 err = ieee80211_register_hw(wl->hw);
5028 if (err)
5029 goto err_one_core_detach;
Michael Buescha78b3bb2009-09-11 21:44:05 +02005030 b43_leds_register(wl->current_dev);
Michael Buesche4d6b792007-09-18 15:39:42 -04005031 }
5032
5033 out:
5034 return err;
5035
5036 err_one_core_detach:
5037 b43_one_core_detach(dev);
5038 err_wireless_exit:
5039 if (first)
5040 b43_wireless_exit(dev, wl);
5041 return err;
5042}
5043
5044static void b43_remove(struct ssb_device *dev)
5045{
5046 struct b43_wl *wl = ssb_get_devtypedata(dev);
5047 struct b43_wldev *wldev = ssb_get_drvdata(dev);
5048
Michael Buesch3bf0a322008-05-22 16:32:16 +02005049 /* We must cancel any work here before unregistering from ieee80211,
5050 * as the ieee80211 unreg will destroy the workqueue. */
5051 cancel_work_sync(&wldev->restart_work);
5052
Michael Buesche4d6b792007-09-18 15:39:42 -04005053 B43_WARN_ON(!wl);
Michael Buesch403a3a12009-06-08 21:04:57 +02005054 if (wl->current_dev == wldev) {
5055 /* Restore the queues count before unregistering, because firmware detect
5056 * might have modified it. Restoring is important, so the networking
5057 * stack can properly free resources. */
5058 wl->hw->queues = wl->mac80211_initially_registered_queues;
Albert Herranz82905ac2009-09-16 00:26:19 +02005059 b43_leds_stop(wldev);
Michael Buesche4d6b792007-09-18 15:39:42 -04005060 ieee80211_unregister_hw(wl->hw);
Michael Buesch403a3a12009-06-08 21:04:57 +02005061 }
Michael Buesche4d6b792007-09-18 15:39:42 -04005062
5063 b43_one_core_detach(dev);
5064
5065 if (list_empty(&wl->devlist)) {
Michael Buesch727c9882009-10-01 15:54:32 +02005066 b43_leds_unregister(wl);
Michael Buesche4d6b792007-09-18 15:39:42 -04005067 /* Last core on the chip unregistered.
5068 * We can destroy common struct b43_wl.
5069 */
5070 b43_wireless_exit(dev, wl);
5071 }
5072}
5073
5074/* Perform a hardware reset. This can be called from any context. */
5075void b43_controller_restart(struct b43_wldev *dev, const char *reason)
5076{
5077 /* Must avoid requeueing, if we are in shutdown. */
5078 if (b43_status(dev) < B43_STAT_INITIALIZED)
5079 return;
5080 b43info(dev->wl, "Controller RESET (%s) ...\n", reason);
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04005081 ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
Michael Buesche4d6b792007-09-18 15:39:42 -04005082}
5083
Michael Buesche4d6b792007-09-18 15:39:42 -04005084static struct ssb_driver b43_ssb_driver = {
5085 .name = KBUILD_MODNAME,
5086 .id_table = b43_ssb_tbl,
5087 .probe = b43_probe,
5088 .remove = b43_remove,
Michael Buesche4d6b792007-09-18 15:39:42 -04005089};
5090
Michael Buesch26bc7832008-02-09 00:18:35 +01005091static void b43_print_driverinfo(void)
5092{
5093 const char *feat_pci = "", *feat_pcmcia = "", *feat_nphy = "",
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005094 *feat_leds = "", *feat_sdio = "";
Michael Buesch26bc7832008-02-09 00:18:35 +01005095
5096#ifdef CONFIG_B43_PCI_AUTOSELECT
5097 feat_pci = "P";
5098#endif
5099#ifdef CONFIG_B43_PCMCIA
5100 feat_pcmcia = "M";
5101#endif
Rafał Miłecki692d2c02010-12-07 21:56:00 +01005102#ifdef CONFIG_B43_PHY_N
Michael Buesch26bc7832008-02-09 00:18:35 +01005103 feat_nphy = "N";
5104#endif
5105#ifdef CONFIG_B43_LEDS
5106 feat_leds = "L";
5107#endif
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005108#ifdef CONFIG_B43_SDIO
5109 feat_sdio = "S";
5110#endif
Michael Buesch26bc7832008-02-09 00:18:35 +01005111 printk(KERN_INFO "Broadcom 43xx driver loaded "
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005112 "[ Features: %s%s%s%s%s, Firmware-ID: "
Michael Buesch26bc7832008-02-09 00:18:35 +01005113 B43_SUPPORTED_FIRMWARE_ID " ]\n",
5114 feat_pci, feat_pcmcia, feat_nphy,
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005115 feat_leds, feat_sdio);
Michael Buesch26bc7832008-02-09 00:18:35 +01005116}
5117
Michael Buesche4d6b792007-09-18 15:39:42 -04005118static int __init b43_init(void)
5119{
5120 int err;
5121
5122 b43_debugfs_init();
5123 err = b43_pcmcia_init();
5124 if (err)
5125 goto err_dfs_exit;
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005126 err = b43_sdio_init();
Michael Buesche4d6b792007-09-18 15:39:42 -04005127 if (err)
5128 goto err_pcmcia_exit;
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005129 err = ssb_driver_register(&b43_ssb_driver);
5130 if (err)
5131 goto err_sdio_exit;
Michael Buesch26bc7832008-02-09 00:18:35 +01005132 b43_print_driverinfo();
Michael Buesche4d6b792007-09-18 15:39:42 -04005133
5134 return err;
5135
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005136err_sdio_exit:
5137 b43_sdio_exit();
Michael Buesche4d6b792007-09-18 15:39:42 -04005138err_pcmcia_exit:
5139 b43_pcmcia_exit();
5140err_dfs_exit:
5141 b43_debugfs_exit();
5142 return err;
5143}
5144
5145static void __exit b43_exit(void)
5146{
5147 ssb_driver_unregister(&b43_ssb_driver);
Albert Herranz3dbba8e2009-09-10 19:34:49 +02005148 b43_sdio_exit();
Michael Buesche4d6b792007-09-18 15:39:42 -04005149 b43_pcmcia_exit();
5150 b43_debugfs_exit();
5151}
5152
5153module_init(b43_init)
5154module_exit(b43_exit)