Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Copyright 2006-2009 Analog Devices Inc. |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 3 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 4 | * Licensed under the GPL-2 or later |
Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 5 | */ |
6 | |||||
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 7 | #include <asm/dma.h> |
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 8 | #include <asm/portmux.h> |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 9 | |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 10 | #ifdef CONFIG_BFIN_UART0_CTSRTS |
11 | # define CONFIG_SERIAL_BFIN_CTSRTS | ||||
12 | # ifndef CONFIG_UART0_CTS_PIN | ||||
13 | # define CONFIG_UART0_CTS_PIN -1 | ||||
14 | # endif | ||||
15 | # ifndef CONFIG_UART0_RTS_PIN | ||||
16 | # define CONFIG_UART0_RTS_PIN -1 | ||||
17 | # endif | ||||
18 | #endif | ||||
19 | |||||
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 20 | struct bfin_serial_res { |
21 | unsigned long uart_base_addr; | ||||
22 | int uart_irq; | ||||
Sonic Zhang | d307d36 | 2009-04-07 16:52:26 +0100 | [diff] [blame] | 23 | int uart_status_irq; |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 24 | #ifdef CONFIG_SERIAL_BFIN_DMA |
25 | unsigned int uart_tx_dma_channel; | ||||
26 | unsigned int uart_rx_dma_channel; | ||||
27 | #endif | ||||
28 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||||
29 | int uart_cts_pin; | ||||
30 | int uart_rts_pin; | ||||
31 | #endif | ||||
32 | }; | ||||
33 | |||||
34 | struct bfin_serial_res bfin_serial_resource[] = { | ||||
Mike Frysinger | 9c8f172 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 35 | { |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 36 | 0xFFC00400, |
Mike Frysinger | 8d71e07 | 2009-07-27 00:44:25 +0000 | [diff] [blame] | 37 | IRQ_UART0_RX, |
38 | IRQ_UART0_ERROR, | ||||
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 39 | #ifdef CONFIG_SERIAL_BFIN_DMA |
Mike Frysinger | 8d71e07 | 2009-07-27 00:44:25 +0000 | [diff] [blame] | 40 | CH_UART0_TX, |
41 | CH_UART0_RX, | ||||
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 42 | #endif |
Tom Parker | 97d4b35 | 2009-03-03 17:59:39 +0800 | [diff] [blame] | 43 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 44 | CONFIG_UART0_CTS_PIN, |
45 | CONFIG_UART0_RTS_PIN, | ||||
46 | #endif | ||||
Mike Frysinger | 9c8f172 | 2007-06-21 11:34:16 +0800 | [diff] [blame] | 47 | } |
Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 48 | }; |
49 | |||||
Michael Hennerich | c58c214 | 2007-10-04 00:35:05 +0800 | [diff] [blame] | 50 | #define DRIVER_NAME "bfin-uart" |
Mike Frysinger | b1524e2 | 2009-09-28 03:16:01 +0000 | [diff] [blame^] | 51 | |
52 | #include <asm/bfin_serial.h> |