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Vegard Nossum77ef50a2008-06-18 17:08:48 +02001#ifndef ASM_X86__APIC_H
2#define ASM_X86__APIC_H
Thomas Gleixner67c5fc52008-01-30 13:30:15 +01003
4#include <linux/pm.h>
5#include <linux/delay.h>
Maciej W. Rozycki593f4a72008-07-16 19:15:30 +01006
7#include <asm/alternative.h>
Thomas Gleixner67c5fc52008-01-30 13:30:15 +01008#include <asm/fixmap.h>
9#include <asm/apicdef.h>
10#include <asm/processor.h>
11#include <asm/system.h>
Suresh Siddha13c88fb2008-07-10 11:16:52 -070012#include <asm/cpufeature.h>
13#include <asm/msr.h>
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010014
15#define ARCH_APICTIMER_STOPS_ON_C3 1
16
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010017/*
18 * Debugging macros
19 */
20#define APIC_QUIET 0
21#define APIC_VERBOSE 1
22#define APIC_DEBUG 2
23
24/*
25 * Define the default level of output to be very little
26 * This can be turned up by using apic=verbose for more
27 * information and apic=debug for _lots_ of information.
28 * apic_verbosity is defined in apic.c
29 */
30#define apic_printk(v, s, a...) do { \
31 if ((v) <= apic_verbosity) \
32 printk(s, ##a); \
33 } while (0)
34
35
36extern void generic_apic_probe(void);
37
38#ifdef CONFIG_X86_LOCAL_APIC
39
Maciej W. Rozyckibaa13182008-07-14 18:44:51 +010040extern unsigned int apic_verbosity;
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010041extern int local_apic_timer_c2_ok;
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010042
Yinghai Lu3c999f12008-06-20 16:11:20 -070043extern int disable_apic;
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010044/*
45 * Basic functions accessing APICs.
46 */
47#ifdef CONFIG_PARAVIRT
48#include <asm/paravirt.h>
Thomas Gleixner96a388d2007-10-11 11:20:03 +020049#else
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010050#define setup_boot_clock setup_boot_APIC_clock
51#define setup_secondary_clock setup_secondary_APIC_clock
Thomas Gleixner96a388d2007-10-11 11:20:03 +020052#endif
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010053
Ravikiran G Thirumalaiaa7d8e25e2008-03-20 00:41:16 -070054extern int is_vsmp_box(void);
Jaswinder Singh2b97df02008-07-23 17:13:14 +053055extern void xapic_wait_icr_idle(void);
56extern u32 safe_xapic_wait_icr_idle(void);
57extern u64 xapic_icr_read(void);
58extern void xapic_icr_write(u32, u32);
59extern int setup_profiling_timer(unsigned int);
Ravikiran G Thirumalaiaa7d8e25e2008-03-20 00:41:16 -070060
Suresh Siddha1b374e42008-07-10 11:16:49 -070061static inline void native_apic_mem_write(u32 reg, u32 v)
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010062{
Maciej W. Rozycki593f4a72008-07-16 19:15:30 +010063 volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010064
Maciej W. Rozycki593f4a72008-07-16 19:15:30 +010065 alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP,
66 ASM_OUTPUT2("=r" (v), "=m" (*addr)),
67 ASM_OUTPUT2("0" (v), "m" (*addr)));
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010068}
69
Suresh Siddha1b374e42008-07-10 11:16:49 -070070static inline u32 native_apic_mem_read(u32 reg)
Thomas Gleixner67c5fc52008-01-30 13:30:15 +010071{
72 return *((volatile u32 *)(APIC_BASE + reg));
73}
74
Suresh Siddha13c88fb2008-07-10 11:16:52 -070075static inline void native_apic_msr_write(u32 reg, u32 v)
76{
77 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
78 reg == APIC_LVR)
79 return;
80
81 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
82}
83
84static inline u32 native_apic_msr_read(u32 reg)
85{
86 u32 low, high;
87
88 if (reg == APIC_DFR)
89 return -1;
90
91 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
92 return low;
93}
94
Yinghai Luc535b6a2008-07-11 18:41:54 -070095#ifndef CONFIG_X86_32
Suresh Siddha6e1cb382008-07-10 11:16:58 -070096extern int x2apic, x2apic_preenabled;
97extern void check_x2apic(void);
98extern void enable_x2apic(void);
99extern void enable_IR_x2apic(void);
100extern void x2apic_icr_write(u32 low, u32 id);
Yinghai Lua11b5ab2008-09-03 16:58:31 -0700101static inline int x2apic_enabled(void)
102{
103 int msr, msr2;
104
105 if (!cpu_has_x2apic)
106 return 0;
107
108 rdmsr(MSR_IA32_APICBASE, msr, msr2);
109 if (msr & X2APIC_ENABLE)
110 return 1;
111 return 0;
112}
113#else
114#define x2apic_enabled() 0
Yinghai Luc535b6a2008-07-11 18:41:54 -0700115#endif
Suresh Siddha1b374e42008-07-10 11:16:49 -0700116
117struct apic_ops {
118 u32 (*read)(u32 reg);
119 void (*write)(u32 reg, u32 v);
Suresh Siddha1b374e42008-07-10 11:16:49 -0700120 u64 (*icr_read)(void);
121 void (*icr_write)(u32 low, u32 high);
122 void (*wait_icr_idle)(void);
123 u32 (*safe_wait_icr_idle)(void);
124};
125
126extern struct apic_ops *apic_ops;
127
128#define apic_read (apic_ops->read)
129#define apic_write (apic_ops->write)
Suresh Siddha1b374e42008-07-10 11:16:49 -0700130#define apic_icr_read (apic_ops->icr_read)
131#define apic_icr_write (apic_ops->icr_write)
132#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
133#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
Suresh Siddha1b374e42008-07-10 11:16:49 -0700134
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100135extern int get_physical_broadcast(void);
136
Suresh Siddha89027d32008-07-10 11:16:56 -0700137#ifdef CONFIG_X86_64
138static inline void ack_x2APIC_irq(void)
139{
140 /* Docs say use 0 for future compatibility */
141 native_apic_msr_write(APIC_EOI, 0);
142}
143#endif
144
145
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100146static inline void ack_APIC_irq(void)
147{
148 /*
Maciej W. Rozycki0791e132008-07-21 01:28:43 +0100149 * ack_APIC_irq() actually gets compiled as a single instruction
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100150 * ... yummie.
151 */
152
153 /* Docs say use 0 for future compatibility */
Maciej W. Rozycki593f4a72008-07-16 19:15:30 +0100154 apic_write(APIC_EOI, 0);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100155}
156
157extern int lapic_get_maxlvt(void);
158extern void clear_local_APIC(void);
159extern void connect_bsp_APIC(void);
160extern void disconnect_bsp_APIC(int virt_wire_setup);
161extern void disable_local_APIC(void);
162extern void lapic_shutdown(void);
163extern int verify_local_APIC(void);
164extern void cache_APIC_registers(void);
165extern void sync_Arb_IDs(void);
166extern void init_bsp_APIC(void);
167extern void setup_local_APIC(void);
Andi Kleen739f33b2008-01-30 13:30:40 +0100168extern void end_local_APIC_setup(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100169extern void init_apic_mappings(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100170extern void setup_boot_APIC_clock(void);
171extern void setup_secondary_APIC_clock(void);
172extern int APIC_init_uniprocessor(void);
Jan Beuliche9427102008-01-30 13:31:24 +0100173extern void enable_NMI_through_LVT0(void);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100174
175/*
176 * On 32bit this is mach-xxx local
177 */
178#ifdef CONFIG_X86_64
Yinghai Lu8643f9d2008-02-19 03:21:06 -0800179extern void early_init_lapic_mapping(void);
Alok Kataria8fbbc4b2008-07-01 11:43:34 -0700180extern int apic_is_clustered_box(void);
181#else
182static inline int apic_is_clustered_box(void)
183{
184 return 0;
185}
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100186#endif
187
Robert Richter7b83dae2008-01-30 13:30:40 +0100188extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
189extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100190
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100191
192#else /* !CONFIG_X86_LOCAL_APIC */
193static inline void lapic_shutdown(void) { }
194#define local_apic_timer_c2_ok 1
Yinghai Luf3294a32008-06-27 01:41:56 -0700195static inline void init_apic_mappings(void) { }
Thomas Gleixner67c5fc52008-01-30 13:30:15 +0100196
197#endif /* !CONFIG_X86_LOCAL_APIC */
198
Vegard Nossum77ef50a2008-06-18 17:08:48 +0200199#endif /* ASM_X86__APIC_H */