Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | / { |
| 14 | tmc_etr: tmc@fc322000 { |
| 15 | compatible = "arm,coresight-tmc"; |
| 16 | reg = <0xfc322000 0x1000>, |
| 17 | <0xfc37c000 0x3000>; |
| 18 | reg-names = "tmc-etr-base", "tmc-etr-bam-base"; |
| 19 | |
| 20 | qcom,memory-reservation-type = "EBI1"; |
| 21 | qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */ |
| 22 | |
| 23 | coresight-id = <0>; |
| 24 | coresight-name = "coresight-tmc-etr"; |
| 25 | coresight-nr-inports = <1>; |
Aparna Das | bf92db2 | 2013-03-07 13:21:51 -0800 | [diff] [blame^] | 26 | coresight-ctis = <&cti0 &cti8>; |
Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 27 | }; |
| 28 | |
| 29 | tpiu: tpiu@fc318000 { |
| 30 | compatible = "arm,coresight-tpiu"; |
| 31 | reg = <0xfc318000 0x1000>; |
| 32 | reg-names = "tpiu-base"; |
| 33 | |
| 34 | coresight-id = <1>; |
| 35 | coresight-name = "coresight-tpiu"; |
| 36 | coresight-nr-inports = <1>; |
| 37 | }; |
| 38 | |
| 39 | replicator: replicator@fc31c000 { |
| 40 | compatible = "qcom,coresight-replicator"; |
| 41 | reg = <0xfc31c000 0x1000>; |
| 42 | reg-names = "replicator-base"; |
| 43 | |
| 44 | coresight-id = <2>; |
| 45 | coresight-name = "coresight-replicator"; |
| 46 | coresight-nr-inports = <1>; |
| 47 | coresight-outports = <0 1>; |
| 48 | coresight-child-list = <&tmc_etr &tpiu>; |
| 49 | coresight-child-ports = <0 0>; |
| 50 | }; |
| 51 | |
| 52 | tmc_etf: tmc@fc307000 { |
| 53 | compatible = "arm,coresight-tmc"; |
| 54 | reg = <0xfc307000 0x1000>; |
| 55 | reg-names = "tmc-etf-base"; |
| 56 | |
| 57 | coresight-id = <3>; |
| 58 | coresight-name = "coresight-tmc-etf"; |
| 59 | coresight-nr-inports = <1>; |
| 60 | coresight-outports = <0>; |
| 61 | coresight-child-list = <&replicator>; |
| 62 | coresight-child-ports = <0>; |
| 63 | coresight-default-sink; |
Aparna Das | bf92db2 | 2013-03-07 13:21:51 -0800 | [diff] [blame^] | 64 | coresight-ctis = <&cti0 &cti8>; |
Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 65 | }; |
| 66 | |
| 67 | funnel_merg: funnel@fc31b000 { |
| 68 | compatible = "arm,coresight-funnel"; |
| 69 | reg = <0xfc31b000 0x1000>; |
| 70 | reg-names = "funnel-merg-base"; |
| 71 | |
| 72 | coresight-id = <4>; |
| 73 | coresight-name = "coresight-funnel-merg"; |
| 74 | coresight-nr-inports = <2>; |
| 75 | coresight-outports = <0>; |
| 76 | coresight-child-list = <&tmc_etf>; |
| 77 | coresight-child-ports = <0>; |
| 78 | }; |
| 79 | |
| 80 | funnel_in0: funnel@fc319000 { |
| 81 | compatible = "arm,coresight-funnel"; |
| 82 | reg = <0xfc319000 0x1000>; |
| 83 | reg-names = "funnel-in0-base"; |
| 84 | |
| 85 | coresight-id = <5>; |
| 86 | coresight-name = "coresight-funnel-in0"; |
| 87 | coresight-nr-inports = <8>; |
| 88 | coresight-outports = <0>; |
| 89 | coresight-child-list = <&funnel_merg>; |
| 90 | coresight-child-ports = <0>; |
| 91 | }; |
| 92 | |
| 93 | funnel_in1: funnel@fc31a000 { |
| 94 | compatible = "arm,coresight-funnel"; |
| 95 | reg = <0xfc31a000 0x1000>; |
| 96 | reg-names = "funnel-in1-base"; |
| 97 | |
| 98 | coresight-id = <6>; |
| 99 | coresight-name = "coresight-funnel-in1"; |
| 100 | coresight-nr-inports = <8>; |
| 101 | coresight-outports = <0>; |
| 102 | coresight-child-list = <&funnel_merg>; |
| 103 | coresight-child-ports = <1>; |
| 104 | }; |
| 105 | |
| 106 | funnel_a7ss: funnel@fc345000 { |
| 107 | compatible = "arm,coresight-funnel"; |
| 108 | reg = <0xfc345000 0x1000>; |
| 109 | reg-names = "funnel-a7ss-base"; |
| 110 | |
| 111 | coresight-id = <7>; |
| 112 | coresight-name = "coresight-funnel-a7ss"; |
| 113 | coresight-nr-inports = <4>; |
| 114 | coresight-outports = <0>; |
| 115 | coresight-child-list = <&funnel_in1>; |
| 116 | coresight-child-ports = <5>; |
| 117 | }; |
| 118 | |
| 119 | funnel_mmss: funnel@fc364000 { |
| 120 | compatible = "arm,coresight-funnel"; |
| 121 | reg = <0xfc364000 0x1000>; |
| 122 | reg-names = "funnel-mmss-base"; |
| 123 | |
| 124 | |
| 125 | coresight-id = <8>; |
| 126 | coresight-name = "coresight-funnel-mmss"; |
| 127 | coresight-nr-inports = <8>; |
| 128 | coresight-outports = <0>; |
| 129 | coresight-child-list = <&funnel_in1>; |
| 130 | coresight-child-ports = <1>; |
| 131 | }; |
| 132 | |
| 133 | stm: stm@fc321000 { |
| 134 | compatible = "arm,coresight-stm"; |
| 135 | reg = <0xfc321000 0x1000>, |
| 136 | <0xfa280000 0x180000>; |
| 137 | reg-names = "stm-base", "stm-data-base"; |
| 138 | |
| 139 | coresight-id = <9>; |
| 140 | coresight-name = "coresight-stm"; |
| 141 | coresight-nr-inports = <0>; |
| 142 | coresight-outports = <0>; |
| 143 | coresight-child-list = <&funnel_in1>; |
| 144 | coresight-child-ports = <7>; |
| 145 | }; |
| 146 | |
Pushkar Joshi | 9148a3d | 2013-03-05 18:39:57 -0800 | [diff] [blame] | 147 | etm0: etm@fc33c000 { |
| 148 | compatible = "arm,coresight-etm"; |
| 149 | reg = <0xfc33c000 0x1000>; |
| 150 | reg-names = "etm0-base"; |
| 151 | |
| 152 | coresight-id = <10>; |
| 153 | coresight-name = "coresight-etm0"; |
| 154 | coresight-nr-inports = <0>; |
| 155 | coresight-outports = <0>; |
| 156 | coresight-child-list = <&funnel_a7ss>; |
| 157 | coresight-child-ports = <0>; |
| 158 | |
| 159 | qcom,round-robin; |
| 160 | }; |
| 161 | |
| 162 | etm1: etm@fc33d000 { |
| 163 | compatible = "arm,coresight-etm"; |
| 164 | reg = <0xfc33d000 0x1000>; |
| 165 | reg-names = "etm1-base"; |
| 166 | |
| 167 | coresight-id = <11>; |
| 168 | coresight-name = "coresight-etm1"; |
| 169 | coresight-nr-inports = <0>; |
| 170 | coresight-outports = <0>; |
| 171 | coresight-child-list = <&funnel_a7ss>; |
| 172 | coresight-child-ports = <1>; |
| 173 | |
| 174 | qcom,round-robin; |
| 175 | }; |
| 176 | |
| 177 | etm2: etm@fc33e000 { |
| 178 | compatible = "arm,coresight-etm"; |
| 179 | reg = <0xfc33e000 0x1000>; |
| 180 | reg-names = "etm2-base"; |
| 181 | |
| 182 | coresight-id = <12>; |
| 183 | coresight-name = "coresight-etm2"; |
| 184 | coresight-nr-inports = <0>; |
| 185 | coresight-outports = <0>; |
| 186 | coresight-child-list = <&funnel_a7ss>; |
| 187 | coresight-child-ports = <2>; |
| 188 | |
| 189 | qcom,round-robin; |
| 190 | }; |
| 191 | |
| 192 | etm3: etm@fc33f000 { |
| 193 | compatible = "arm,coresight-etm"; |
| 194 | reg = <0xfc33f000 0x1000>; |
| 195 | reg-names = "etm3-base"; |
| 196 | |
| 197 | coresight-id = <13>; |
| 198 | coresight-name = "coresight-etm3"; |
| 199 | coresight-nr-inports = <0>; |
| 200 | coresight-outports = <0>; |
| 201 | coresight-child-list = <&funnel_a7ss>; |
| 202 | coresight-child-ports = <3>; |
| 203 | |
| 204 | qcom,round-robin; |
| 205 | }; |
| 206 | |
Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 207 | csr: csr@fc302000 { |
| 208 | compatible = "qcom,coresight-csr"; |
| 209 | reg = <0xfc302000 0x1000>; |
| 210 | reg-names = "csr-base"; |
| 211 | |
Pushkar Joshi | 9148a3d | 2013-03-05 18:39:57 -0800 | [diff] [blame] | 212 | coresight-id = <14>; |
Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 213 | coresight-name = "coresight-csr"; |
| 214 | coresight-nr-inports = <0>; |
| 215 | |
| 216 | qcom,blk-size = <3>; |
| 217 | }; |
Aparna Das | bf92db2 | 2013-03-07 13:21:51 -0800 | [diff] [blame^] | 218 | |
| 219 | cti0: cti@fc308000 { |
| 220 | compatible = "arm,coresight-cti"; |
| 221 | reg = <0xfc308000 0x1000>; |
| 222 | reg-names = "cti0-base"; |
| 223 | |
| 224 | coresight-id = <15>; |
| 225 | coresight-name = "coresight-cti0"; |
| 226 | coresight-nr-inports = <0>; |
| 227 | }; |
| 228 | |
| 229 | cti1: cti@fc309000 { |
| 230 | compatible = "arm,coresight-cti"; |
| 231 | reg = <0xfc309000 0x1000>; |
| 232 | reg-names = "cti1-base"; |
| 233 | |
| 234 | coresight-id = <16>; |
| 235 | coresight-name = "coresight-cti1"; |
| 236 | coresight-nr-inports = <0>; |
| 237 | }; |
| 238 | |
| 239 | cti2: cti@fc30a000 { |
| 240 | compatible = "arm,coresight-cti"; |
| 241 | reg = <0xfc30a000 0x1000>; |
| 242 | reg-names = "cti2-base"; |
| 243 | |
| 244 | coresight-id = <17>; |
| 245 | coresight-name = "coresight-cti2"; |
| 246 | coresight-nr-inports = <0>; |
| 247 | }; |
| 248 | |
| 249 | cti3: cti@fc30b000 { |
| 250 | compatible = "arm,coresight-cti"; |
| 251 | reg = <0xfc30b000 0x1000>; |
| 252 | reg-names = "cti3-base"; |
| 253 | |
| 254 | coresight-id = <18>; |
| 255 | coresight-name = "coresight-cti3"; |
| 256 | coresight-nr-inports = <0>; |
| 257 | }; |
| 258 | |
| 259 | cti4: cti@fc30c000 { |
| 260 | compatible = "arm,coresight-cti"; |
| 261 | reg = <0xfc30c000 0x1000>; |
| 262 | reg-names = "cti4-base"; |
| 263 | |
| 264 | coresight-id = <19>; |
| 265 | coresight-name = "coresight-cti4"; |
| 266 | coresight-nr-inports = <0>; |
| 267 | }; |
| 268 | |
| 269 | cti5: cti@fc30d000 { |
| 270 | compatible = "arm,coresight-cti"; |
| 271 | reg = <0xfc30d000 0x1000>; |
| 272 | reg-names = "cti5-base"; |
| 273 | |
| 274 | coresight-id = <20>; |
| 275 | coresight-name = "coresight-cti5"; |
| 276 | coresight-nr-inports = <0>; |
| 277 | }; |
| 278 | |
| 279 | cti6: cti@fc30e000 { |
| 280 | compatible = "arm,coresight-cti"; |
| 281 | reg = <0xfc30e000 0x1000>; |
| 282 | reg-names = "cti6-base"; |
| 283 | |
| 284 | coresight-id = <21>; |
| 285 | coresight-name = "coresight-cti6"; |
| 286 | coresight-nr-inports = <0>; |
| 287 | }; |
| 288 | |
| 289 | cti7: cti@fc30f000 { |
| 290 | compatible = "arm,coresight-cti"; |
| 291 | reg = <0xfc30f000 0x1000>; |
| 292 | reg-names = "cti7-base"; |
| 293 | |
| 294 | coresight-id = <22>; |
| 295 | coresight-name = "coresight-cti7"; |
| 296 | coresight-nr-inports = <0>; |
| 297 | }; |
| 298 | |
| 299 | cti8: cti@fc310000 { |
| 300 | compatible = "arm,coresight-cti"; |
| 301 | reg = <0xfc310000 0x1000>; |
| 302 | reg-names = "cti8-base"; |
| 303 | |
| 304 | coresight-id = <23>; |
| 305 | coresight-name = "coresight-cti8"; |
| 306 | coresight-nr-inports = <0>; |
| 307 | }; |
| 308 | |
| 309 | cti_l2: cti@fc340000 { |
| 310 | compatible = "arm,coresight-cti"; |
| 311 | reg = <0xfc340000 0x1000>; |
| 312 | reg-names = "cti-l2-base"; |
| 313 | |
| 314 | coresight-id = <24>; |
| 315 | coresight-name = "coresight-cti-l2"; |
| 316 | coresight-nr-inports = <0>; |
| 317 | }; |
| 318 | |
| 319 | cti_cpu0: cti@fc341000 { |
| 320 | compatible = "arm,coresight-cti"; |
| 321 | reg = <0xfc341000 0x1000>; |
| 322 | reg-names = "cti-cpu0-base"; |
| 323 | |
| 324 | coresight-id = <25>; |
| 325 | coresight-name = "coresight-cti-cpu0"; |
| 326 | coresight-nr-inports = <0>; |
| 327 | }; |
| 328 | |
| 329 | cti_cpu1: cti@fc342000 { |
| 330 | compatible = "arm,coresight-cti"; |
| 331 | reg = <0xfc342000 0x1000>; |
| 332 | reg-names = "cti-cpu1-base"; |
| 333 | |
| 334 | coresight-id = <26>; |
| 335 | coresight-name = "coresight-cti-cpu1"; |
| 336 | coresight-nr-inports = <0>; |
| 337 | }; |
| 338 | |
| 339 | cti_cpu2: cti@fc343000 { |
| 340 | compatible = "arm,coresight-cti"; |
| 341 | reg = <0xfc343000 0x1000>; |
| 342 | reg-names = "cti-cpu2-base"; |
| 343 | |
| 344 | coresight-id = <27>; |
| 345 | coresight-name = "coresight-cti-cpu2"; |
| 346 | coresight-nr-inports = <0>; |
| 347 | }; |
| 348 | |
| 349 | cti_cpu3: cti@fc344000 { |
| 350 | compatible = "arm,coresight-cti"; |
| 351 | reg = <0xfc344000 0x1000>; |
| 352 | reg-names = "cti-cpu3-base"; |
| 353 | |
| 354 | coresight-id = <28>; |
| 355 | coresight-name = "coresight-cti-cpu3"; |
| 356 | coresight-nr-inports = <0>; |
| 357 | }; |
Aparna Das | bbee084 | 2013-02-28 21:35:15 -0800 | [diff] [blame] | 358 | }; |