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Michael Hennerichdb682542008-04-24 03:18:59 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
Michael Hennerichdb682542008-04-24 03:18:59 +08006 *
Robin Getz96f10502009-09-24 14:11:24 +00007 * Licensed under the GPL-2 or later.
Michael Hennerichdb682542008-04-24 03:18:59 +08008 */
9
10#include <linux/device.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
Mike Frysinger2de73e72008-11-18 17:48:22 +080014#include <linux/mtd/physmap.h>
Michael Hennerichdb682542008-04-24 03:18:59 +080015#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/irq.h>
18#include <linux/interrupt.h>
19#include <linux/usb/musb.h>
20#include <asm/bfin5xx_spi.h>
Michael Hennerichdb682542008-04-24 03:18:59 +080021#include <asm/dma.h>
22#include <asm/gpio.h>
23#include <asm/nand.h>
24#include <asm/portmux.h>
Mike Frysinger8d8921a2009-01-07 23:14:39 +080025#include <asm/bfin_sdh.h>
Bryan Wu639f6572008-08-27 10:51:02 +080026#include <mach/bf54x_keys.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080027#include <asm/dpmc.h>
Michael Hennerichdb682542008-04-24 03:18:59 +080028#include <linux/input.h>
29#include <linux/spi/ad7877.h>
30
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
34const char bfin_board_name[] = "Bluetechnix CM-BF548";
35
36/*
37 * Driver needs to know address, irq and flag pin.
38 */
39
40#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
41
Bryan Wu639f6572008-08-27 10:51:02 +080042#include <mach/bf54x-lq043.h>
Michael Hennerichdb682542008-04-24 03:18:59 +080043
44static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
45 .width = 480,
46 .height = 272,
47 .xres = {480, 480, 480},
48 .yres = {272, 272, 272},
49 .bpp = {24, 24, 24},
50 .disp = GPIO_PE3,
51};
52
53static struct resource bf54x_lq043_resources[] = {
54 {
55 .start = IRQ_EPPI0_ERR,
56 .end = IRQ_EPPI0_ERR,
57 .flags = IORESOURCE_IRQ,
58 },
59};
60
61static struct platform_device bf54x_lq043_device = {
62 .name = "bf54x-lq043",
63 .id = -1,
64 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
65 .resource = bf54x_lq043_resources,
66 .dev = {
67 .platform_data = &bf54x_lq043_data,
68 },
69};
70#endif
71
72#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
73static unsigned int bf548_keymap[] = {
74 KEYVAL(0, 0, KEY_ENTER),
75 KEYVAL(0, 1, KEY_HELP),
76 KEYVAL(0, 2, KEY_0),
77 KEYVAL(0, 3, KEY_BACKSPACE),
78 KEYVAL(1, 0, KEY_TAB),
79 KEYVAL(1, 1, KEY_9),
80 KEYVAL(1, 2, KEY_8),
81 KEYVAL(1, 3, KEY_7),
82 KEYVAL(2, 0, KEY_DOWN),
83 KEYVAL(2, 1, KEY_6),
84 KEYVAL(2, 2, KEY_5),
85 KEYVAL(2, 3, KEY_4),
86 KEYVAL(3, 0, KEY_UP),
87 KEYVAL(3, 1, KEY_3),
88 KEYVAL(3, 2, KEY_2),
89 KEYVAL(3, 3, KEY_1),
90};
91
92static struct bfin_kpad_platform_data bf54x_kpad_data = {
93 .rows = 4,
94 .cols = 4,
95 .keymap = bf548_keymap,
96 .keymapsize = ARRAY_SIZE(bf548_keymap),
97 .repeat = 0,
98 .debounce_time = 5000, /* ns (5ms) */
99 .coldrive_time = 1000, /* ns (1ms) */
100 .keyup_test_interval = 50, /* ms (50ms) */
101};
102
103static struct resource bf54x_kpad_resources[] = {
104 {
105 .start = IRQ_KEY,
106 .end = IRQ_KEY,
107 .flags = IORESOURCE_IRQ,
108 },
109};
110
111static struct platform_device bf54x_kpad_device = {
112 .name = "bf54x-keys",
113 .id = -1,
114 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
115 .resource = bf54x_kpad_resources,
116 .dev = {
117 .platform_data = &bf54x_kpad_data,
118 },
119};
120#endif
121
122#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
123static struct platform_device rtc_device = {
124 .name = "rtc-bfin",
125 .id = -1,
126};
127#endif
128
129#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Michael Hennerichdb682542008-04-24 03:18:59 +0800130#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000131static struct resource bfin_uart0_resources[] = {
Michael Hennerichdb682542008-04-24 03:18:59 +0800132 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000133 .start = UART0_DLL,
134 .end = UART0_RBR+2,
Michael Hennerichdb682542008-04-24 03:18:59 +0800135 .flags = IORESOURCE_MEM,
136 },
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000137 {
138 .start = IRQ_UART0_RX,
139 .end = IRQ_UART0_RX+1,
140 .flags = IORESOURCE_IRQ,
141 },
142 {
143 .start = IRQ_UART0_ERROR,
144 .end = IRQ_UART0_ERROR,
145 .flags = IORESOURCE_IRQ,
146 },
147 {
148 .start = CH_UART0_TX,
149 .end = CH_UART0_TX,
150 .flags = IORESOURCE_DMA,
151 },
152 {
153 .start = CH_UART0_RX,
154 .end = CH_UART0_RX,
155 .flags = IORESOURCE_DMA,
156 },
157};
158
159unsigned short bfin_uart0_peripherals[] = {
160 P_UART0_TX, P_UART0_RX, 0
161};
162
163static struct platform_device bfin_uart0_device = {
164 .name = "bfin-uart",
165 .id = 0,
166 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
167 .resource = bfin_uart0_resources,
168 .dev = {
169 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
170 },
171};
Michael Hennerichdb682542008-04-24 03:18:59 +0800172#endif
173#ifdef CONFIG_SERIAL_BFIN_UART1
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000174static struct resource bfin_uart1_resources[] = {
Michael Hennerichdb682542008-04-24 03:18:59 +0800175 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000176 .start = UART1_DLL,
177 .end = UART1_RBR+2,
Michael Hennerichdb682542008-04-24 03:18:59 +0800178 .flags = IORESOURCE_MEM,
179 },
Michael Hennerichdb682542008-04-24 03:18:59 +0800180 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000181 .start = IRQ_UART1_RX,
182 .end = IRQ_UART1_RX+1,
183 .flags = IORESOURCE_IRQ,
Michael Hennerichdb682542008-04-24 03:18:59 +0800184 },
Michael Hennerichdb682542008-04-24 03:18:59 +0800185 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000186 .start = IRQ_UART1_ERROR,
187 .end = IRQ_UART1_ERROR,
188 .flags = IORESOURCE_IRQ,
189 },
190 {
191 .start = CH_UART1_TX,
192 .end = CH_UART1_TX,
193 .flags = IORESOURCE_DMA,
194 },
195 {
196 .start = CH_UART1_RX,
197 .end = CH_UART1_RX,
198 .flags = IORESOURCE_DMA,
199 },
200#ifdef CONFIG_BFIN_UART1_CTSRTS
201 { /* CTS pin -- 0 means not supported */
202 .start = GPIO_PE10,
203 .end = GPIO_PE10,
204 .flags = IORESOURCE_IO,
205 },
206 { /* RTS pin -- 0 means not supported */
207 .start = GPIO_PE9,
208 .end = GPIO_PE9,
209 .flags = IORESOURCE_IO,
Michael Hennerichdb682542008-04-24 03:18:59 +0800210 },
211#endif
212};
213
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000214unsigned short bfin_uart1_peripherals[] = {
215 P_UART1_TX, P_UART1_RX,
216#ifdef CONFIG_BFIN_UART1_CTSRTS
217 P_UART1_RTS, P_UART1_CTS,
218#endif
219 0
220};
221
222static struct platform_device bfin_uart1_device = {
Michael Hennerichdb682542008-04-24 03:18:59 +0800223 .name = "bfin-uart",
224 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000225 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
226 .resource = bfin_uart1_resources,
227 .dev = {
228 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
229 },
Michael Hennerichdb682542008-04-24 03:18:59 +0800230};
231#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000232#ifdef CONFIG_SERIAL_BFIN_UART2
233static struct resource bfin_uart2_resources[] = {
234 {
235 .start = UART2_DLL,
236 .end = UART2_RBR+2,
237 .flags = IORESOURCE_MEM,
238 },
239 {
240 .start = IRQ_UART2_RX,
241 .end = IRQ_UART2_RX+1,
242 .flags = IORESOURCE_IRQ,
243 },
244 {
245 .start = IRQ_UART2_ERROR,
246 .end = IRQ_UART2_ERROR,
247 .flags = IORESOURCE_IRQ,
248 },
249 {
250 .start = CH_UART2_TX,
251 .end = CH_UART2_TX,
252 .flags = IORESOURCE_DMA,
253 },
254 {
255 .start = CH_UART2_RX,
256 .end = CH_UART2_RX,
257 .flags = IORESOURCE_DMA,
258 },
259};
260
261unsigned short bfin_uart2_peripherals[] = {
262 P_UART2_TX, P_UART2_RX, 0
263};
264
265static struct platform_device bfin_uart2_device = {
266 .name = "bfin-uart",
267 .id = 2,
268 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
269 .resource = bfin_uart2_resources,
270 .dev = {
271 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
272 },
273};
274#endif
275#ifdef CONFIG_SERIAL_BFIN_UART3
276static struct resource bfin_uart3_resources[] = {
277 {
278 .start = UART3_DLL,
279 .end = UART3_RBR+2,
280 .flags = IORESOURCE_MEM,
281 },
282 {
283 .start = IRQ_UART3_RX,
284 .end = IRQ_UART3_RX+1,
285 .flags = IORESOURCE_IRQ,
286 },
287 {
288 .start = IRQ_UART3_ERROR,
289 .end = IRQ_UART3_ERROR,
290 .flags = IORESOURCE_IRQ,
291 },
292 {
293 .start = CH_UART3_TX,
294 .end = CH_UART3_TX,
295 .flags = IORESOURCE_DMA,
296 },
297 {
298 .start = CH_UART3_RX,
299 .end = CH_UART3_RX,
300 .flags = IORESOURCE_DMA,
301 },
302#ifdef CONFIG_BFIN_UART3_CTSRTS
303 { /* CTS pin -- 0 means not supported */
304 .start = GPIO_PB3,
305 .end = GPIO_PB3,
306 .flags = IORESOURCE_IO,
307 },
308 { /* RTS pin -- 0 means not supported */
309 .start = GPIO_PB2,
310 .end = GPIO_PB2,
311 .flags = IORESOURCE_IO,
312 },
313#endif
314};
315
316unsigned short bfin_uart3_peripherals[] = {
317 P_UART3_TX, P_UART3_RX,
318#ifdef CONFIG_BFIN_UART3_CTSRTS
319 P_UART3_RTS, P_UART3_CTS,
320#endif
321 0
322};
323
324static struct platform_device bfin_uart3_device = {
325 .name = "bfin-uart",
326 .id = 3,
327 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
328 .resource = bfin_uart3_resources,
329 .dev = {
330 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
331 },
332};
333#endif
334#endif
Michael Hennerichdb682542008-04-24 03:18:59 +0800335
Graf Yang5be36d22008-04-25 03:09:15 +0800336#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800337#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800338static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800339 {
340 .start = 0xFFC00400,
341 .end = 0xFFC004FF,
342 .flags = IORESOURCE_MEM,
343 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800344 {
345 .start = IRQ_UART0_RX,
346 .end = IRQ_UART0_RX+1,
347 .flags = IORESOURCE_IRQ,
348 },
349 {
350 .start = CH_UART0_RX,
351 .end = CH_UART0_RX+1,
352 .flags = IORESOURCE_DMA,
353 },
354};
355static struct platform_device bfin_sir0_device = {
356 .name = "bfin_sir",
357 .id = 0,
358 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
359 .resource = bfin_sir0_resources,
360};
Graf Yang5be36d22008-04-25 03:09:15 +0800361#endif
362#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800363static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800364 {
365 .start = 0xFFC02000,
366 .end = 0xFFC020FF,
367 .flags = IORESOURCE_MEM,
368 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800369 {
370 .start = IRQ_UART1_RX,
371 .end = IRQ_UART1_RX+1,
372 .flags = IORESOURCE_IRQ,
373 },
374 {
375 .start = CH_UART1_RX,
376 .end = CH_UART1_RX+1,
377 .flags = IORESOURCE_DMA,
378 },
379};
380static struct platform_device bfin_sir1_device = {
381 .name = "bfin_sir",
382 .id = 1,
383 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
384 .resource = bfin_sir1_resources,
385};
Graf Yang5be36d22008-04-25 03:09:15 +0800386#endif
387#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800388static struct resource bfin_sir2_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800389 {
390 .start = 0xFFC02100,
391 .end = 0xFFC021FF,
392 .flags = IORESOURCE_MEM,
393 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800394 {
395 .start = IRQ_UART2_RX,
396 .end = IRQ_UART2_RX+1,
397 .flags = IORESOURCE_IRQ,
398 },
399 {
400 .start = CH_UART2_RX,
401 .end = CH_UART2_RX+1,
402 .flags = IORESOURCE_DMA,
403 },
404};
405static struct platform_device bfin_sir2_device = {
406 .name = "bfin_sir",
407 .id = 2,
408 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
409 .resource = bfin_sir2_resources,
410};
Graf Yang5be36d22008-04-25 03:09:15 +0800411#endif
412#ifdef CONFIG_BFIN_SIR3
Graf Yang42bd8bc2009-01-07 23:14:39 +0800413static struct resource bfin_sir3_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800414 {
415 .start = 0xFFC03100,
416 .end = 0xFFC031FF,
417 .flags = IORESOURCE_MEM,
418 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800419 {
420 .start = IRQ_UART3_RX,
421 .end = IRQ_UART3_RX+1,
422 .flags = IORESOURCE_IRQ,
423 },
424 {
425 .start = CH_UART3_RX,
426 .end = CH_UART3_RX+1,
427 .flags = IORESOURCE_DMA,
428 },
Graf Yang5be36d22008-04-25 03:09:15 +0800429};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800430static struct platform_device bfin_sir3_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800431 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800432 .id = 3,
433 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
434 .resource = bfin_sir3_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800435};
436#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800437#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800438
Michael Hennerichdb682542008-04-24 03:18:59 +0800439#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
Harald Krapfenbauer9c214532009-09-10 15:30:03 +0000440#include <linux/smsc911x.h>
441
Michael Hennerichdb682542008-04-24 03:18:59 +0800442static struct resource smsc911x_resources[] = {
443 {
444 .name = "smsc911x-memory",
445 .start = 0x24000000,
446 .end = 0x24000000 + 0xFF,
447 .flags = IORESOURCE_MEM,
448 },
449 {
450 .start = IRQ_PE6,
451 .end = IRQ_PE6,
452 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
453 },
454};
Harald Krapfenbauer9c214532009-09-10 15:30:03 +0000455
456static struct smsc911x_platform_config smsc911x_config = {
457 .flags = SMSC911X_USE_16BIT,
458 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
459 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
460 .phy_interface = PHY_INTERFACE_MODE_MII,
461};
462
Michael Hennerichdb682542008-04-24 03:18:59 +0800463static struct platform_device smsc911x_device = {
464 .name = "smsc911x",
465 .id = 0,
466 .num_resources = ARRAY_SIZE(smsc911x_resources),
467 .resource = smsc911x_resources,
Harald Krapfenbauer9c214532009-09-10 15:30:03 +0000468 .dev = {
469 .platform_data = &smsc911x_config,
470 },
Michael Hennerichdb682542008-04-24 03:18:59 +0800471};
472#endif
473
474#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
475static struct resource musb_resources[] = {
476 [0] = {
477 .start = 0xFFC03C00,
478 .end = 0xFFC040FF,
479 .flags = IORESOURCE_MEM,
480 },
481 [1] = { /* general IRQ */
482 .start = IRQ_USB_INT0,
483 .end = IRQ_USB_INT0,
484 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
485 },
486 [2] = { /* DMA IRQ */
487 .start = IRQ_USB_DMA,
488 .end = IRQ_USB_DMA,
489 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
490 },
491};
492
Bryan Wu50041ac2008-10-08 13:39:40 +0800493static struct musb_hdrc_config musb_config = {
494 .multipoint = 0,
495 .dyn_fifo = 0,
496 .soft_con = 1,
497 .dma = 1,
Bryan Wufea05da2009-01-07 23:14:39 +0800498 .num_eps = 8,
499 .dma_channels = 8,
Bryan Wu50041ac2008-10-08 13:39:40 +0800500 .gpio_vrsel = GPIO_PH6,
501};
502
Michael Hennerichdb682542008-04-24 03:18:59 +0800503static struct musb_hdrc_platform_data musb_plat = {
504#if defined(CONFIG_USB_MUSB_OTG)
505 .mode = MUSB_OTG,
506#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
507 .mode = MUSB_HOST,
508#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
509 .mode = MUSB_PERIPHERAL,
510#endif
Bryan Wu50041ac2008-10-08 13:39:40 +0800511 .config = &musb_config,
Michael Hennerichdb682542008-04-24 03:18:59 +0800512};
513
514static u64 musb_dmamask = ~(u32)0;
515
516static struct platform_device musb_device = {
517 .name = "musb_hdrc",
518 .id = 0,
519 .dev = {
520 .dma_mask = &musb_dmamask,
521 .coherent_dma_mask = 0xffffffff,
522 .platform_data = &musb_plat,
523 },
524 .num_resources = ARRAY_SIZE(musb_resources),
525 .resource = musb_resources,
526};
527#endif
528
Sonic Zhangdf5de262009-09-23 05:01:56 +0000529#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
530#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
531static struct resource bfin_sport0_uart_resources[] = {
532 {
533 .start = SPORT0_TCR1,
534 .end = SPORT0_MRCS3+4,
535 .flags = IORESOURCE_MEM,
536 },
537 {
538 .start = IRQ_SPORT0_RX,
539 .end = IRQ_SPORT0_RX+1,
540 .flags = IORESOURCE_IRQ,
541 },
542 {
543 .start = IRQ_SPORT0_ERROR,
544 .end = IRQ_SPORT0_ERROR,
545 .flags = IORESOURCE_IRQ,
546 },
547};
548
549unsigned short bfin_sport0_peripherals[] = {
550 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
551 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
552};
553
554static struct platform_device bfin_sport0_uart_device = {
555 .name = "bfin-sport-uart",
556 .id = 0,
557 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
558 .resource = bfin_sport0_uart_resources,
559 .dev = {
560 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
561 },
562};
563#endif
564#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
565static struct resource bfin_sport1_uart_resources[] = {
566 {
567 .start = SPORT1_TCR1,
568 .end = SPORT1_MRCS3+4,
569 .flags = IORESOURCE_MEM,
570 },
571 {
572 .start = IRQ_SPORT1_RX,
573 .end = IRQ_SPORT1_RX+1,
574 .flags = IORESOURCE_IRQ,
575 },
576 {
577 .start = IRQ_SPORT1_ERROR,
578 .end = IRQ_SPORT1_ERROR,
579 .flags = IORESOURCE_IRQ,
580 },
581};
582
583unsigned short bfin_sport1_peripherals[] = {
584 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
585 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
586};
587
588static struct platform_device bfin_sport1_uart_device = {
589 .name = "bfin-sport-uart",
590 .id = 1,
591 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
592 .resource = bfin_sport1_uart_resources,
593 .dev = {
594 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
595 },
596};
597#endif
598#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
599static struct resource bfin_sport2_uart_resources[] = {
600 {
601 .start = SPORT2_TCR1,
602 .end = SPORT2_MRCS3+4,
603 .flags = IORESOURCE_MEM,
604 },
605 {
606 .start = IRQ_SPORT2_RX,
607 .end = IRQ_SPORT2_RX+1,
608 .flags = IORESOURCE_IRQ,
609 },
610 {
611 .start = IRQ_SPORT2_ERROR,
612 .end = IRQ_SPORT2_ERROR,
613 .flags = IORESOURCE_IRQ,
614 },
615};
616
617unsigned short bfin_sport2_peripherals[] = {
618 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
619 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
620};
621
622static struct platform_device bfin_sport2_uart_device = {
623 .name = "bfin-sport-uart",
624 .id = 2,
625 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
626 .resource = bfin_sport2_uart_resources,
627 .dev = {
628 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
629 },
630};
631#endif
632#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
633static struct resource bfin_sport3_uart_resources[] = {
634 {
635 .start = SPORT3_TCR1,
636 .end = SPORT3_MRCS3+4,
637 .flags = IORESOURCE_MEM,
638 },
639 {
640 .start = IRQ_SPORT3_RX,
641 .end = IRQ_SPORT3_RX+1,
642 .flags = IORESOURCE_IRQ,
643 },
644 {
645 .start = IRQ_SPORT3_ERROR,
646 .end = IRQ_SPORT3_ERROR,
647 .flags = IORESOURCE_IRQ,
648 },
649};
650
651unsigned short bfin_sport3_peripherals[] = {
652 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
653 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
654};
655
656static struct platform_device bfin_sport3_uart_device = {
657 .name = "bfin-sport-uart",
658 .id = 3,
659 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
660 .resource = bfin_sport3_uart_resources,
661 .dev = {
662 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
663 },
664};
665#endif
666#endif
667
Michael Hennerichdb682542008-04-24 03:18:59 +0800668#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
669static struct resource bfin_atapi_resources[] = {
670 {
671 .start = 0xFFC03800,
672 .end = 0xFFC0386F,
673 .flags = IORESOURCE_MEM,
674 },
675 {
676 .start = IRQ_ATAPI_ERR,
677 .end = IRQ_ATAPI_ERR,
678 .flags = IORESOURCE_IRQ,
679 },
680};
681
682static struct platform_device bfin_atapi_device = {
683 .name = "pata-bf54x",
684 .id = -1,
685 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
686 .resource = bfin_atapi_resources,
687};
688#endif
689
690#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
691static struct mtd_partition partition_info[] = {
692 {
Robin Getzaa582972008-08-05 17:47:29 +0800693 .name = "linux kernel(nand)",
Michael Hennerichdb682542008-04-24 03:18:59 +0800694 .offset = 0,
Mike Frysingerf4585a02008-10-13 14:45:21 +0800695 .size = 4 * 1024 * 1024,
Michael Hennerichdb682542008-04-24 03:18:59 +0800696 },
697 {
Robin Getzaa582972008-08-05 17:47:29 +0800698 .name = "file system(nand)",
Mike Frysingerf4585a02008-10-13 14:45:21 +0800699 .offset = 4 * 1024 * 1024,
700 .size = (256 - 4) * 1024 * 1024,
Michael Hennerichdb682542008-04-24 03:18:59 +0800701 },
702};
703
704static struct bf5xx_nand_platform bf5xx_nand_platform = {
705 .page_size = NFC_PG_SIZE_256,
706 .data_width = NFC_NWIDTH_8,
707 .partitions = partition_info,
708 .nr_partitions = ARRAY_SIZE(partition_info),
709 .rd_dly = 3,
710 .wr_dly = 3,
711};
712
713static struct resource bf5xx_nand_resources[] = {
714 {
715 .start = 0xFFC03B00,
716 .end = 0xFFC03B4F,
717 .flags = IORESOURCE_MEM,
718 },
719 {
720 .start = CH_NFC,
721 .end = CH_NFC,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726static struct platform_device bf5xx_nand_device = {
727 .name = "bf5xx-nand",
728 .id = 0,
729 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
730 .resource = bf5xx_nand_resources,
731 .dev = {
732 .platform_data = &bf5xx_nand_platform,
733 },
734};
735#endif
736
737#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
Mike Frysinger8d8921a2009-01-07 23:14:39 +0800738static struct bfin_sd_host bfin_sdh_data = {
739 .dma_chan = CH_SDH,
740 .irq_int0 = IRQ_SDH_MASK0,
741 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
742};
743
Michael Hennerichdb682542008-04-24 03:18:59 +0800744static struct platform_device bf54x_sdh_device = {
745 .name = "bfin-sdh",
746 .id = 0,
Mike Frysinger8d8921a2009-01-07 23:14:39 +0800747 .dev = {
748 .platform_data = &bfin_sdh_data,
749 },
Michael Hennerichdb682542008-04-24 03:18:59 +0800750};
751#endif
752
Mike Frysinger2de73e72008-11-18 17:48:22 +0800753#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
754static struct mtd_partition para_partitions[] = {
755 {
756 .name = "bootloader(nor)",
757 .size = 0x40000,
758 .offset = 0,
759 }, {
760 .name = "linux kernel(nor)",
Harald Krapfenbauer9c214532009-09-10 15:30:03 +0000761 .size = 0x100000,
Mike Frysinger2de73e72008-11-18 17:48:22 +0800762 .offset = MTDPART_OFS_APPEND,
763 }, {
764 .name = "file system(nor)",
765 .size = MTDPART_SIZ_FULL,
766 .offset = MTDPART_OFS_APPEND,
767 }
768};
769
770static struct physmap_flash_data para_flash_data = {
771 .width = 2,
772 .parts = para_partitions,
773 .nr_parts = ARRAY_SIZE(para_partitions),
774};
775
776static struct resource para_flash_resource = {
777 .start = 0x20000000,
778 .end = 0x207fffff,
779 .flags = IORESOURCE_MEM,
780};
781
782static struct platform_device para_flash_device = {
783 .name = "physmap-flash",
784 .id = 0,
785 .dev = {
786 .platform_data = &para_flash_data,
787 },
788 .num_resources = 1,
789 .resource = &para_flash_resource,
790};
791#endif
792
Michael Hennerichdb682542008-04-24 03:18:59 +0800793#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
794/* all SPI peripherals info goes here */
795#if defined(CONFIG_MTD_M25P80) \
796 || defined(CONFIG_MTD_M25P80_MODULE)
797/* SPI flash chip (m25p16) */
798static struct mtd_partition bfin_spi_flash_partitions[] = {
799 {
Robin Getzaa582972008-08-05 17:47:29 +0800800 .name = "bootloader(spi)",
Michael Hennerichdb682542008-04-24 03:18:59 +0800801 .size = 0x00040000,
802 .offset = 0,
803 .mask_flags = MTD_CAP_ROM
804 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800805 .name = "linux kernel(spi)",
Michael Hennerichdb682542008-04-24 03:18:59 +0800806 .size = 0x1c0000,
807 .offset = 0x40000
808 }
809};
810
811static struct flash_platform_data bfin_spi_flash_data = {
812 .name = "m25p80",
813 .parts = bfin_spi_flash_partitions,
814 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
815 .type = "m25p16",
816};
817
818static struct bfin5xx_spi_chip spi_flash_chip_info = {
819 .enable_dma = 0, /* use dma transfer with this chip*/
820 .bits_per_word = 8,
Michael Hennerichdb682542008-04-24 03:18:59 +0800821};
822#endif
823
824#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
825static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Michael Hennerichdb682542008-04-24 03:18:59 +0800826 .enable_dma = 0,
827 .bits_per_word = 16,
828};
829
830static const struct ad7877_platform_data bfin_ad7877_ts_info = {
831 .model = 7877,
832 .vref_delay_usecs = 50, /* internal, no capacitor */
833 .x_plate_ohms = 419,
834 .y_plate_ohms = 486,
835 .pressure_max = 1000,
836 .pressure_min = 0,
837 .stopacq_polarity = 1,
838 .first_conversion_delay = 3,
839 .acquisition_time = 1,
840 .averaging = 1,
841 .pen_down_acc_interval = 1,
842};
843#endif
844
845#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
846static struct bfin5xx_spi_chip spidev_chip_info = {
847 .enable_dma = 0,
848 .bits_per_word = 8,
849};
850#endif
851
852static struct spi_board_info bf54x_spi_board_info[] __initdata = {
853#if defined(CONFIG_MTD_M25P80) \
854 || defined(CONFIG_MTD_M25P80_MODULE)
855 {
856 /* the modalias must be the same as spi device driver name */
857 .modalias = "m25p80", /* Name of spi_driver for this device */
858 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
859 .bus_num = 0, /* Framework bus number */
860 .chip_select = 1, /* SPI_SSEL1*/
861 .platform_data = &bfin_spi_flash_data,
862 .controller_data = &spi_flash_chip_info,
863 .mode = SPI_MODE_3,
864 },
865#endif
866#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
867{
868 .modalias = "ad7877",
869 .platform_data = &bfin_ad7877_ts_info,
870 .irq = IRQ_PJ11,
871 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
872 .bus_num = 0,
873 .chip_select = 2,
874 .controller_data = &spi_ad7877_chip_info,
875},
876#endif
877#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
878 {
879 .modalias = "spidev",
880 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
881 .bus_num = 0,
882 .chip_select = 1,
883 .controller_data = &spidev_chip_info,
884 },
885#endif
886};
887
888/* SPI (0) */
889static struct resource bfin_spi0_resource[] = {
890 [0] = {
891 .start = SPI0_REGBASE,
892 .end = SPI0_REGBASE + 0xFF,
893 .flags = IORESOURCE_MEM,
894 },
895 [1] = {
896 .start = CH_SPI0,
897 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000898 .flags = IORESOURCE_DMA,
899 },
900 [2] = {
901 .start = IRQ_SPI0,
902 .end = IRQ_SPI0,
Michael Hennerichdb682542008-04-24 03:18:59 +0800903 .flags = IORESOURCE_IRQ,
904 }
905};
906
907/* SPI (1) */
908static struct resource bfin_spi1_resource[] = {
909 [0] = {
910 .start = SPI1_REGBASE,
911 .end = SPI1_REGBASE + 0xFF,
912 .flags = IORESOURCE_MEM,
913 },
914 [1] = {
915 .start = CH_SPI1,
916 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000917 .flags = IORESOURCE_DMA,
918 },
919 [2] = {
920 .start = IRQ_SPI1,
921 .end = IRQ_SPI1,
Michael Hennerichdb682542008-04-24 03:18:59 +0800922 .flags = IORESOURCE_IRQ,
923 }
924};
925
926/* SPI controller data */
927static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
Yi Li4e4d4962009-08-30 20:45:50 +0000928 .num_chipselect = 3,
Michael Hennerichdb682542008-04-24 03:18:59 +0800929 .enable_dma = 1, /* master has the ability to do dma transfer */
930 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
931};
932
933static struct platform_device bf54x_spi_master0 = {
934 .name = "bfin-spi",
935 .id = 0, /* Bus number */
936 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
937 .resource = bfin_spi0_resource,
938 .dev = {
939 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
940 },
941};
942
943static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
Yi Li4e4d4962009-08-30 20:45:50 +0000944 .num_chipselect = 3,
Michael Hennerichdb682542008-04-24 03:18:59 +0800945 .enable_dma = 1, /* master has the ability to do dma transfer */
946 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
947};
948
949static struct platform_device bf54x_spi_master1 = {
950 .name = "bfin-spi",
951 .id = 1, /* Bus number */
952 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
953 .resource = bfin_spi1_resource,
954 .dev = {
955 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
956 },
957};
958#endif /* spi master and devices */
959
960#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
961static struct resource bfin_twi0_resource[] = {
962 [0] = {
963 .start = TWI0_REGBASE,
964 .end = TWI0_REGBASE + 0xFF,
965 .flags = IORESOURCE_MEM,
966 },
967 [1] = {
968 .start = IRQ_TWI0,
969 .end = IRQ_TWI0,
970 .flags = IORESOURCE_IRQ,
971 },
972};
973
974static struct platform_device i2c_bfin_twi0_device = {
975 .name = "i2c-bfin-twi",
976 .id = 0,
977 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
978 .resource = bfin_twi0_resource,
979};
980
981#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
982static struct resource bfin_twi1_resource[] = {
983 [0] = {
984 .start = TWI1_REGBASE,
985 .end = TWI1_REGBASE + 0xFF,
986 .flags = IORESOURCE_MEM,
987 },
988 [1] = {
989 .start = IRQ_TWI1,
990 .end = IRQ_TWI1,
991 .flags = IORESOURCE_IRQ,
992 },
993};
994
995static struct platform_device i2c_bfin_twi1_device = {
996 .name = "i2c-bfin-twi",
997 .id = 1,
998 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
999 .resource = bfin_twi1_resource,
1000};
1001#endif
1002#endif
1003
1004#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1005#include <linux/gpio_keys.h>
1006
1007static struct gpio_keys_button bfin_gpio_keys_table[] = {
1008 {BTN_0, GPIO_PH7, 1, "gpio-keys: BTN0"},
1009};
1010
1011static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1012 .buttons = bfin_gpio_keys_table,
1013 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1014};
1015
1016static struct platform_device bfin_device_gpiokeys = {
1017 .name = "gpio-keys",
1018 .dev = {
1019 .platform_data = &bfin_gpio_keys_data,
1020 },
1021};
1022#endif
1023
Michael Hennerich14b03202008-05-07 11:41:26 +08001024static const unsigned int cclk_vlev_datasheet[] =
1025{
1026/*
1027 * Internal VLEV BF54XSBBC1533
1028 ****temporarily using these values until data sheet is updated
1029 */
1030 VRPAIR(VLEV_085, 150000000),
1031 VRPAIR(VLEV_090, 250000000),
1032 VRPAIR(VLEV_110, 276000000),
1033 VRPAIR(VLEV_115, 301000000),
1034 VRPAIR(VLEV_120, 525000000),
1035 VRPAIR(VLEV_125, 550000000),
1036 VRPAIR(VLEV_130, 600000000),
1037};
1038
1039static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1040 .tuple_tab = cclk_vlev_datasheet,
1041 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1042 .vr_settling_time = 25 /* us */,
1043};
1044
1045static struct platform_device bfin_dpmc = {
1046 .name = "bfin dpmc",
1047 .dev = {
1048 .platform_data = &bfin_dmpc_vreg_data,
1049 },
1050};
1051
Michael Hennerichdb682542008-04-24 03:18:59 +08001052static struct platform_device *cm_bf548_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08001053
1054 &bfin_dpmc,
1055
Michael Hennerichdb682542008-04-24 03:18:59 +08001056#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1057 &rtc_device,
1058#endif
1059
1060#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001061#ifdef CONFIG_SERIAL_BFIN_UART0
1062 &bfin_uart0_device,
1063#endif
1064#ifdef CONFIG_SERIAL_BFIN_UART1
1065 &bfin_uart1_device,
1066#endif
1067#ifdef CONFIG_SERIAL_BFIN_UART2
1068 &bfin_uart2_device,
1069#endif
1070#ifdef CONFIG_SERIAL_BFIN_UART3
1071 &bfin_uart3_device,
1072#endif
Michael Hennerichdb682542008-04-24 03:18:59 +08001073#endif
1074
Graf Yang5be36d22008-04-25 03:09:15 +08001075#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08001076#ifdef CONFIG_BFIN_SIR0
1077 &bfin_sir0_device,
1078#endif
1079#ifdef CONFIG_BFIN_SIR1
1080 &bfin_sir1_device,
1081#endif
1082#ifdef CONFIG_BFIN_SIR2
1083 &bfin_sir2_device,
1084#endif
1085#ifdef CONFIG_BFIN_SIR3
1086 &bfin_sir3_device,
1087#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001088#endif
1089
Michael Hennerichdb682542008-04-24 03:18:59 +08001090#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1091 &bf54x_lq043_device,
1092#endif
1093
1094#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1095 &smsc911x_device,
1096#endif
1097
1098#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1099 &musb_device,
1100#endif
1101
Sonic Zhangdf5de262009-09-23 05:01:56 +00001102#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1103#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1104 &bfin_sport0_uart_device,
1105#endif
1106#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1107 &bfin_sport1_uart_device,
1108#endif
1109#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1110 &bfin_sport2_uart_device,
1111#endif
1112#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1113 &bfin_sport3_uart_device,
1114#endif
1115#endif
1116
Michael Hennerichdb682542008-04-24 03:18:59 +08001117#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1118 &bfin_atapi_device,
1119#endif
1120
1121#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1122 &bf5xx_nand_device,
1123#endif
1124
1125#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1126 &bf54x_sdh_device,
1127#endif
1128
1129#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1130 &bf54x_spi_master0,
1131 &bf54x_spi_master1,
1132#endif
1133
1134#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1135 &bf54x_kpad_device,
1136#endif
1137
1138#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Mike Frysinger10a88a22008-11-18 17:48:22 +08001139 &i2c_bfin_twi0_device,
Michael Hennerichdb682542008-04-24 03:18:59 +08001140#if !defined(CONFIG_BF542)
1141 &i2c_bfin_twi1_device,
1142#endif
1143#endif
1144
1145#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1146 &bfin_device_gpiokeys,
1147#endif
Mike Frysinger2de73e72008-11-18 17:48:22 +08001148
1149#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1150 &para_flash_device,
1151#endif
Michael Hennerichdb682542008-04-24 03:18:59 +08001152};
1153
1154static int __init cm_bf548_init(void)
1155{
Michael Hennerichf086f232008-05-20 16:42:39 +08001156 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Michael Hennerichdb682542008-04-24 03:18:59 +08001157 platform_add_devices(cm_bf548_devices, ARRAY_SIZE(cm_bf548_devices));
1158
1159#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1160 spi_register_board_info(bf54x_spi_board_info,
1161 ARRAY_SIZE(bf54x_spi_board_info));
1162#endif
1163
1164 return 0;
1165}
1166
1167arch_initcall(cm_bf548_init);
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00001168
1169static struct platform_device *cm_bf548_early_devices[] __initdata = {
1170#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1171#ifdef CONFIG_SERIAL_BFIN_UART0
1172 &bfin_uart0_device,
1173#endif
1174#ifdef CONFIG_SERIAL_BFIN_UART1
1175 &bfin_uart1_device,
1176#endif
1177#ifdef CONFIG_SERIAL_BFIN_UART2
1178 &bfin_uart2_device,
1179#endif
1180#ifdef CONFIG_SERIAL_BFIN_UART3
1181 &bfin_uart3_device,
1182#endif
1183#endif
1184
1185#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1186#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1187 &bfin_sport0_uart_device,
1188#endif
1189#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1190 &bfin_sport1_uart_device,
1191#endif
1192#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1193 &bfin_sport2_uart_device,
1194#endif
1195#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1196 &bfin_sport3_uart_device,
1197#endif
1198#endif
1199};
1200
1201void __init native_machine_early_platform_add_devices(void)
1202{
1203 printk(KERN_INFO "register early platform devices\n");
1204 early_platform_add_devices(cm_bf548_early_devices,
1205 ARRAY_SIZE(cm_bf548_early_devices));
1206}