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Ben Dooks68d9ab32006-06-24 21:21:27 +01001/* linux/arch/arm/mach-s3c2410/s3c2412.c
2 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://armlinux.simtec.co.uk/.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
13 * 16-May-2003 BJD Created initial version
14 * 16-Aug-2003 BJD Fixed header files and copyright, added URL
15 * 05-Sep-2003 BJD Moved to kernel v2.6
16 * 18-Jan-2004 BJD Added serial port configuration
17 * 21-Aug-2004 BJD Added new struct s3c2410_board handler
18 * 28-Sep-2004 BJD Updates for new serial port bits
19 * 04-Nov-2004 BJD Updated UART configuration process
20 * 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
21 * 13-Aug-2005 DA Removed UART from initial I/O mappings
22*/
23
24#include <linux/kernel.h>
25#include <linux/types.h>
26#include <linux/interrupt.h>
27#include <linux/list.h>
28#include <linux/timer.h>
29#include <linux/init.h>
30#include <linux/sysdev.h>
31#include <linux/platform_device.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/irq.h>
36
37#include <asm/hardware.h>
Ben Dooksc84cbb22006-09-14 13:29:15 +010038#include <asm/proc-fns.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010039#include <asm/io.h>
40#include <asm/irq.h>
41
Ben Dooksc84cbb22006-09-14 13:29:15 +010042#include <asm/arch/idle.h>
43
Ben Dooks68d9ab32006-06-24 21:21:27 +010044#include <asm/arch/regs-clock.h>
45#include <asm/arch/regs-serial.h>
Ben Dooksc84cbb22006-09-14 13:29:15 +010046#include <asm/arch/regs-power.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010047#include <asm/arch/regs-gpio.h>
48#include <asm/arch/regs-gpioj.h>
49#include <asm/arch/regs-dsc.h>
50
51#include "s3c2412.h"
52#include "cpu.h"
53#include "devs.h"
54#include "clock.h"
55#include "pm.h"
56
57#ifndef CONFIG_CPU_S3C2412_ONLY
58void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
59#endif
60
61/* Initial IO mappings */
62
63static struct map_desc s3c2412_iodesc[] __initdata = {
64 IODESC_ENT(CLKPWR),
65 IODESC_ENT(LCD),
66 IODESC_ENT(TIMER),
67 IODESC_ENT(ADC),
68 IODESC_ENT(WATCHDOG),
69};
70
71/* uart registration process */
72
73void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
74{
75 s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
76
77 /* rename devices that are s3c2412/s3c2413 specific */
78 s3c_device_sdi.name = "s3c2412-sdi";
79 s3c_device_nand.name = "s3c2412-nand";
80}
81
Ben Dooksc84cbb22006-09-14 13:29:15 +010082/* s3c2412_idle
83 *
84 * use the standard idle call by ensuring the idle mode
85 * in power config, then issuing the idle co-processor
86 * instruction
87*/
88
89static void s3c2412_idle(void)
90{
91 unsigned long tmp;
92
93 /* ensure our idle mode is to go to idle */
94
95 tmp = __raw_readl(S3C2412_PWRCFG);
96 tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
97 tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
98 __raw_writel(tmp, S3C2412_PWRCFG);
99
100 cpu_do_idle();
101}
102
Ben Dooks68d9ab32006-06-24 21:21:27 +0100103/* s3c2412_map_io
104 *
105 * register the standard cpu IO areas, and any passed in from the
106 * machine specific initialisation.
107*/
108
109void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
110{
111 /* move base of IO */
112
113 s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
114
Ben Dooksc84cbb22006-09-14 13:29:15 +0100115 /* set our idle function */
116
117 s3c24xx_idle = s3c2412_idle;
118
Ben Dooks68d9ab32006-06-24 21:21:27 +0100119 /* register our io-tables */
120
121 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
122 iotable_init(mach_desc, mach_size);
123}
124
125void __init s3c2412_init_clocks(int xtal)
126{
127 unsigned long tmp;
128 unsigned long fclk;
129 unsigned long hclk;
130 unsigned long pclk;
131
132 /* now we've got our machine bits initialised, work out what
133 * clocks we've got */
134
135 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
136
137 tmp = __raw_readl(S3C2410_CLKDIVN);
138
139 /* work out clock scalings */
140
141 hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
142 hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
143 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
144
145 /* print brieft summary of clocks, etc */
146
147 printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
148 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
149
150 /* initialise the clocks here, to allow other things like the
151 * console to use them
152 */
153
154 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
155 s3c2412_baseclk_add();
156}
157
158/* need to register class before we actually register the device, and
159 * we also need to ensure that it has been initialised before any of the
160 * drivers even try to use it (even if not on an s3c2412 based system)
161 * as a driver which may support both 2410 and 2440 may try and use it.
162*/
163
164#ifdef CONFIG_PM
165static struct sleep_save s3c2412_sleep[] = {
166 SAVE_ITEM(S3C2412_DSC0),
167 SAVE_ITEM(S3C2412_DSC1),
168 SAVE_ITEM(S3C2413_GPJDAT),
169 SAVE_ITEM(S3C2413_GPJCON),
170 SAVE_ITEM(S3C2413_GPJUP),
171
172 /* save the sleep configuration anyway, just in case these
173 * get damaged during wakeup */
174
175 SAVE_ITEM(S3C2412_GPBSLPCON),
176 SAVE_ITEM(S3C2412_GPCSLPCON),
177 SAVE_ITEM(S3C2412_GPDSLPCON),
178 SAVE_ITEM(S3C2412_GPESLPCON),
179 SAVE_ITEM(S3C2412_GPFSLPCON),
180 SAVE_ITEM(S3C2412_GPGSLPCON),
181 SAVE_ITEM(S3C2412_GPHSLPCON),
182 SAVE_ITEM(S3C2413_GPJSLPCON),
183};
184
185static int s3c2412_suspend(struct sys_device *dev, pm_message_t state)
186{
187 s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
188 return 0;
189}
190
191static int s3c2412_resume(struct sys_device *dev)
192{
193 s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
194 return 0;
195}
196
197#else
198#define s3c2412_suspend NULL
199#define s3c2412_resume NULL
200#endif
201
202struct sysdev_class s3c2412_sysclass = {
203 set_kset_name("s3c2412-core"),
204 .suspend = s3c2412_suspend,
205 .resume = s3c2412_resume
206};
207
208static int __init s3c2412_core_init(void)
209{
210 return sysdev_class_register(&s3c2412_sysclass);
211}
212
213core_initcall(s3c2412_core_init);
214
215static struct sys_device s3c2412_sysdev = {
216 .cls = &s3c2412_sysclass,
217};
218
219int __init s3c2412_init(void)
220{
221 printk("S3C2412: Initialising architecture\n");
222
223 return sysdev_register(&s3c2412_sysdev);
224}