Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-arm/arch-ixp4xx/nas100d.h |
| 3 | * |
| 4 | * NAS100D platform specific definitions |
| 5 | * |
| 6 | * Copyright (c) 2005 Tower Technologies |
| 7 | * |
| 8 | * Author: Alessandro Zummo <a.zummo@towertech.it> |
| 9 | * |
| 10 | * based on ixdp425.h: |
| 11 | * Copyright 2004 (c) MontaVista, Software, Inc. |
| 12 | * |
| 13 | * This file is licensed under the terms of the GNU General Public |
| 14 | * License version 2. This program is licensed "as is" without any |
| 15 | * warranty of any kind, whether express or implied. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __ASM_ARCH_HARDWARE_H__ |
| 19 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
| 20 | #endif |
| 21 | |
Alessandro Zummo | af898b8 | 2006-02-22 21:12:06 +0000 | [diff] [blame] | 22 | #define NAS100D_SDA_PIN 5 |
| 23 | #define NAS100D_SCL_PIN 6 |
Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 24 | |
| 25 | /* |
| 26 | * NAS100D PCI IRQs |
| 27 | */ |
| 28 | #define NAS100D_PCI_MAX_DEV 3 |
| 29 | #define NAS100D_PCI_IRQ_LINES 3 |
| 30 | |
| 31 | |
| 32 | /* PCI controller GPIO to IRQ pin mappings */ |
| 33 | #define NAS100D_PCI_INTA_PIN 11 |
| 34 | #define NAS100D_PCI_INTB_PIN 10 |
| 35 | #define NAS100D_PCI_INTC_PIN 9 |
| 36 | #define NAS100D_PCI_INTD_PIN 8 |
| 37 | #define NAS100D_PCI_INTE_PIN 7 |
| 38 | |
| 39 | /* GPIO */ |
| 40 | |
| 41 | #define NAS100D_GPIO0 0 |
| 42 | #define NAS100D_GPIO1 1 |
| 43 | #define NAS100D_GPIO2 2 |
| 44 | #define NAS100D_GPIO3 3 |
| 45 | #define NAS100D_GPIO4 4 |
| 46 | #define NAS100D_GPIO5 5 |
| 47 | #define NAS100D_GPIO6 6 |
| 48 | #define NAS100D_GPIO7 7 |
| 49 | #define NAS100D_GPIO8 8 |
| 50 | #define NAS100D_GPIO9 9 |
| 51 | #define NAS100D_GPIO10 10 |
| 52 | #define NAS100D_GPIO11 11 |
| 53 | #define NAS100D_GPIO12 12 |
| 54 | #define NAS100D_GPIO13 13 |
| 55 | #define NAS100D_GPIO14 14 |
| 56 | #define NAS100D_GPIO15 15 |
| 57 | |
| 58 | |
| 59 | /* Buttons */ |
| 60 | |
| 61 | #define NAS100D_PB_GPIO NAS100D_GPIO14 |
| 62 | #define NAS100D_RB_GPIO NAS100D_GPIO4 |
| 63 | #define NAS100D_PO_GPIO NAS100D_GPIO12 /* power off */ |
| 64 | |
| 65 | #define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14 |
| 66 | #define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4 |
| 67 | |
| 68 | /* |
| 69 | #define NAS100D_PB_BM (1L << NAS100D_PB_GPIO) |
| 70 | #define NAS100D_PO_BM (1L << NAS100D_PO_GPIO) |
| 71 | #define NAS100D_RB_BM (1L << NAS100D_RB_GPIO) |
| 72 | */ |