blob: 34597144d9c1ecbe019ffe0df24b6d2897993fee [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
Paul Fulghuma7482a22005-09-10 00:26:07 -07004 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30#if defined(__i386__)
31# define BREAKPOINT() asm(" int $3");
32#else
33# define BREAKPOINT() { }
34#endif
35
36#define MAX_DEVICE_COUNT 4
37
38#include <linux/config.h>
39#include <linux/module.h>
40#include <linux/errno.h>
41#include <linux/signal.h>
42#include <linux/sched.h>
43#include <linux/timer.h>
44#include <linux/time.h>
45#include <linux/interrupt.h>
46#include <linux/pci.h>
47#include <linux/tty.h>
48#include <linux/tty_flip.h>
49#include <linux/serial.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/ioport.h>
55#include <linux/mm.h>
56#include <linux/slab.h>
57#include <linux/netdevice.h>
58#include <linux/vmalloc.h>
59#include <linux/init.h>
60#include <asm/serial.h>
61#include <linux/delay.h>
62#include <linux/ioctl.h>
63
64#include <asm/system.h>
65#include <asm/io.h>
66#include <asm/irq.h>
67#include <asm/dma.h>
68#include <linux/bitops.h>
69#include <asm/types.h>
70#include <linux/termios.h>
71#include <linux/workqueue.h>
72#include <linux/hdlc.h>
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074#include <pcmcia/cs_types.h>
75#include <pcmcia/cs.h>
76#include <pcmcia/cistpl.h>
77#include <pcmcia/cisreg.h>
78#include <pcmcia/ds.h>
79
80#ifdef CONFIG_HDLC_MODULE
81#define CONFIG_HDLC 1
82#endif
83
84#define GET_USER(error,value,addr) error = get_user(value,addr)
85#define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86#define PUT_USER(error,value,addr) error = put_user(value,addr)
87#define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89#include <asm/uaccess.h>
90
91#include "linux/synclink.h"
92
93static MGSL_PARAMS default_params = {
94 MGSL_MODE_HDLC, /* unsigned long mode */
95 0, /* unsigned char loopback; */
96 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
97 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
98 0, /* unsigned long clock_speed; */
99 0xff, /* unsigned char addr_filter; */
100 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
101 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
102 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
103 9600, /* unsigned long data_rate; */
104 8, /* unsigned char data_bits; */
105 1, /* unsigned char stop_bits; */
106 ASYNC_PARITY_NONE /* unsigned char parity; */
107};
108
109typedef struct
110{
111 int count;
112 unsigned char status;
113 char data[1];
114} RXBUF;
115
116/* The queue of BH actions to be performed */
117
118#define BH_RECEIVE 1
119#define BH_TRANSMIT 2
120#define BH_STATUS 4
121
122#define IO_PIN_SHUTDOWN_LIMIT 100
123
124#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
125
126struct _input_signal_events {
127 int ri_up;
128 int ri_down;
129 int dsr_up;
130 int dsr_down;
131 int dcd_up;
132 int dcd_down;
133 int cts_up;
134 int cts_down;
135};
136
137
138/*
139 * Device instance data structure
140 */
141
142typedef struct _mgslpc_info {
143 void *if_ptr; /* General purpose pointer (used by SPPP) */
144 int magic;
145 int flags;
146 int count; /* count of opens */
147 int line;
148 unsigned short close_delay;
149 unsigned short closing_wait; /* time to wait before closing */
150
151 struct mgsl_icount icount;
152
153 struct tty_struct *tty;
154 int timeout;
155 int x_char; /* xon/xoff character */
156 int blocked_open; /* # of blocked opens */
157 unsigned char read_status_mask;
158 unsigned char ignore_status_mask;
159
160 unsigned char *tx_buf;
161 int tx_put;
162 int tx_get;
163 int tx_count;
164
165 /* circular list of fixed length rx buffers */
166
167 unsigned char *rx_buf; /* memory allocated for all rx buffers */
168 int rx_buf_total_size; /* size of memory allocated for rx buffers */
169 int rx_put; /* index of next empty rx buffer */
170 int rx_get; /* index of next full rx buffer */
171 int rx_buf_size; /* size in bytes of single rx buffer */
172 int rx_buf_count; /* total number of rx buffers */
173 int rx_frame_count; /* number of full rx buffers */
174
175 wait_queue_head_t open_wait;
176 wait_queue_head_t close_wait;
177
178 wait_queue_head_t status_event_wait_q;
179 wait_queue_head_t event_wait_q;
180 struct timer_list tx_timer; /* HDLC transmit timeout timer */
181 struct _mgslpc_info *next_device; /* device list link */
182
183 unsigned short imra_value;
184 unsigned short imrb_value;
185 unsigned char pim_value;
186
187 spinlock_t lock;
188 struct work_struct task; /* task structure for scheduling bh */
189
190 u32 max_frame_size;
191
192 u32 pending_bh;
193
194 int bh_running;
195 int bh_requested;
196
197 int dcd_chkcount; /* check counts to prevent */
198 int cts_chkcount; /* too many IRQs if a signal */
199 int dsr_chkcount; /* is floating */
200 int ri_chkcount;
201
202 int rx_enabled;
203 int rx_overflow;
204
205 int tx_enabled;
206 int tx_active;
207 int tx_aborting;
208 u32 idle_mode;
209
210 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
211
212 char device_name[25]; /* device instance name */
213
214 unsigned int io_base; /* base I/O address of adapter */
215 unsigned int irq_level;
216
217 MGSL_PARAMS params; /* communications parameters */
218
219 unsigned char serial_signals; /* current serial signal states */
220
221 char irq_occurred; /* for diagnostics use */
222 char testing_irq;
223 unsigned int init_error; /* startup error (DIAGS) */
224
225 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
226 BOOLEAN drop_rts_on_tx_done;
227
228 struct _input_signal_events input_signal_events;
229
230 /* PCMCIA support */
231 dev_link_t link;
232 dev_node_t node;
233 int stop;
234
235 /* SPPP/Cisco HDLC device parts */
236 int netcount;
237 int dosyncppp;
238 spinlock_t netlock;
239
240#ifdef CONFIG_HDLC
241 struct net_device *netdev;
242#endif
243
244} MGSLPC_INFO;
245
246#define MGSLPC_MAGIC 0x5402
247
248/*
249 * The size of the serial xmit buffer is 1 page, or 4096 bytes
250 */
251#define TXBUFSIZE 4096
252
253
254#define CHA 0x00 /* channel A offset */
255#define CHB 0x40 /* channel B offset */
256
257/*
258 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
259 */
260#undef PVR
261
262#define RXFIFO 0
263#define TXFIFO 0
264#define STAR 0x20
265#define CMDR 0x20
266#define RSTA 0x21
267#define PRE 0x21
268#define MODE 0x22
269#define TIMR 0x23
270#define XAD1 0x24
271#define XAD2 0x25
272#define RAH1 0x26
273#define RAH2 0x27
274#define DAFO 0x27
275#define RAL1 0x28
276#define RFC 0x28
277#define RHCR 0x29
278#define RAL2 0x29
279#define RBCL 0x2a
280#define XBCL 0x2a
281#define RBCH 0x2b
282#define XBCH 0x2b
283#define CCR0 0x2c
284#define CCR1 0x2d
285#define CCR2 0x2e
286#define CCR3 0x2f
287#define VSTR 0x34
288#define BGR 0x34
289#define RLCR 0x35
290#define AML 0x36
291#define AMH 0x37
292#define GIS 0x38
293#define IVA 0x38
294#define IPC 0x39
295#define ISR 0x3a
296#define IMR 0x3a
297#define PVR 0x3c
298#define PIS 0x3d
299#define PIM 0x3d
300#define PCR 0x3e
301#define CCR4 0x3f
302
303// IMR/ISR
304
305#define IRQ_BREAK_ON BIT15 // rx break detected
306#define IRQ_DATAOVERRUN BIT14 // receive data overflow
307#define IRQ_ALLSENT BIT13 // all sent
308#define IRQ_UNDERRUN BIT12 // transmit data underrun
309#define IRQ_TIMER BIT11 // timer interrupt
310#define IRQ_CTS BIT10 // CTS status change
311#define IRQ_TXREPEAT BIT9 // tx message repeat
312#define IRQ_TXFIFO BIT8 // transmit pool ready
313#define IRQ_RXEOM BIT7 // receive message end
314#define IRQ_EXITHUNT BIT6 // receive frame start
315#define IRQ_RXTIME BIT6 // rx char timeout
316#define IRQ_DCD BIT2 // carrier detect status change
317#define IRQ_OVERRUN BIT1 // receive frame overflow
318#define IRQ_RXFIFO BIT0 // receive pool full
319
320// STAR
321
322#define XFW BIT6 // transmit FIFO write enable
323#define CEC BIT2 // command executing
324#define CTS BIT1 // CTS state
325
326#define PVR_DTR BIT0
327#define PVR_DSR BIT1
328#define PVR_RI BIT2
329#define PVR_AUTOCTS BIT3
330#define PVR_RS232 0x20 /* 0010b */
331#define PVR_V35 0xe0 /* 1110b */
332#define PVR_RS422 0x40 /* 0100b */
333
334/* Register access functions */
335
336#define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
337#define read_reg(info, reg) inb((info)->io_base + (reg))
338
339#define read_reg16(info, reg) inw((info)->io_base + (reg))
340#define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
341
342#define set_reg_bits(info, reg, mask) \
343 write_reg(info, (reg), \
344 (unsigned char) (read_reg(info, (reg)) | (mask)))
345#define clear_reg_bits(info, reg, mask) \
346 write_reg(info, (reg), \
347 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
348/*
349 * interrupt enable/disable routines
350 */
351static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
352{
353 if (channel == CHA) {
354 info->imra_value |= mask;
355 write_reg16(info, CHA + IMR, info->imra_value);
356 } else {
357 info->imrb_value |= mask;
358 write_reg16(info, CHB + IMR, info->imrb_value);
359 }
360}
361static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
362{
363 if (channel == CHA) {
364 info->imra_value &= ~mask;
365 write_reg16(info, CHA + IMR, info->imra_value);
366 } else {
367 info->imrb_value &= ~mask;
368 write_reg16(info, CHB + IMR, info->imrb_value);
369 }
370}
371
372#define port_irq_disable(info, mask) \
373 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
374
375#define port_irq_enable(info, mask) \
376 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
377
378static void rx_start(MGSLPC_INFO *info);
379static void rx_stop(MGSLPC_INFO *info);
380
381static void tx_start(MGSLPC_INFO *info);
382static void tx_stop(MGSLPC_INFO *info);
383static void tx_set_idle(MGSLPC_INFO *info);
384
385static void get_signals(MGSLPC_INFO *info);
386static void set_signals(MGSLPC_INFO *info);
387
388static void reset_device(MGSLPC_INFO *info);
389
390static void hdlc_mode(MGSLPC_INFO *info);
391static void async_mode(MGSLPC_INFO *info);
392
393static void tx_timeout(unsigned long context);
394
395static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
396
397#ifdef CONFIG_HDLC
398#define dev_to_port(D) (dev_to_hdlc(D)->priv)
399static void hdlcdev_tx_done(MGSLPC_INFO *info);
400static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
401static int hdlcdev_init(MGSLPC_INFO *info);
402static void hdlcdev_exit(MGSLPC_INFO *info);
403#endif
404
405static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
406
407static BOOLEAN register_test(MGSLPC_INFO *info);
408static BOOLEAN irq_test(MGSLPC_INFO *info);
409static int adapter_test(MGSLPC_INFO *info);
410
411static int claim_resources(MGSLPC_INFO *info);
412static void release_resources(MGSLPC_INFO *info);
413static void mgslpc_add_device(MGSLPC_INFO *info);
414static void mgslpc_remove_device(MGSLPC_INFO *info);
415
416static int rx_get_frame(MGSLPC_INFO *info);
417static void rx_reset_buffers(MGSLPC_INFO *info);
418static int rx_alloc_buffers(MGSLPC_INFO *info);
419static void rx_free_buffers(MGSLPC_INFO *info);
420
421static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
422
423/*
424 * Bottom half interrupt handlers
425 */
426static void bh_handler(void* Context);
427static void bh_transmit(MGSLPC_INFO *info);
428static void bh_status(MGSLPC_INFO *info);
429
430/*
431 * ioctl handlers
432 */
433static int tiocmget(struct tty_struct *tty, struct file *file);
434static int tiocmset(struct tty_struct *tty, struct file *file,
435 unsigned int set, unsigned int clear);
436static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
437static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
438static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
439static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
440static int set_txidle(MGSLPC_INFO *info, int idle_mode);
441static int set_txenable(MGSLPC_INFO *info, int enable);
442static int tx_abort(MGSLPC_INFO *info);
443static int set_rxenable(MGSLPC_INFO *info, int enable);
444static int wait_events(MGSLPC_INFO *info, int __user *mask);
445
446static MGSLPC_INFO *mgslpc_device_list = NULL;
447static int mgslpc_device_count = 0;
448
449/*
450 * Set this param to non-zero to load eax with the
451 * .text section address and breakpoint on module load.
452 * This is useful for use with gdb and add-symbol-file command.
453 */
454static int break_on_load=0;
455
456/*
457 * Driver major number, defaults to zero to get auto
458 * assigned major number. May be forced as module parameter.
459 */
460static int ttymajor=0;
461
462static int debug_level = 0;
463static int maxframe[MAX_DEVICE_COUNT] = {0,};
464static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
465
466module_param(break_on_load, bool, 0);
467module_param(ttymajor, int, 0);
468module_param(debug_level, int, 0);
469module_param_array(maxframe, int, NULL, 0);
470module_param_array(dosyncppp, int, NULL, 0);
471
472MODULE_LICENSE("GPL");
473
474static char *driver_name = "SyncLink PC Card driver";
Paul Fulghuma7482a22005-09-10 00:26:07 -0700475static char *driver_version = "$Revision: 4.34 $";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476
477static struct tty_driver *serial_driver;
478
479/* number of characters left in xmit buffer before we ask for more */
480#define WAKEUP_CHARS 256
481
482static void mgslpc_change_params(MGSLPC_INFO *info);
483static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
484
485/* PCMCIA prototypes */
486
487static void mgslpc_config(dev_link_t *link);
488static void mgslpc_release(u_long arg);
489static int mgslpc_event(event_t event, int priority,
490 event_callback_args_t *args);
491static dev_link_t *mgslpc_attach(void);
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100492static void mgslpc_detach(struct pcmcia_device *p_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493
494static dev_info_t dev_info = "synclink_cs";
495static dev_link_t *dev_list = NULL;
496
497/*
498 * 1st function defined in .text section. Calling this function in
499 * init_module() followed by a breakpoint allows a remote debugger
500 * (gdb) to get the .text address for the add-symbol-file command.
501 * This allows remote debugging of dynamically loadable modules.
502 */
503static void* mgslpc_get_text_ptr(void)
504{
505 return mgslpc_get_text_ptr;
506}
507
508/**
509 * line discipline callback wrappers
510 *
511 * The wrappers maintain line discipline references
512 * while calling into the line discipline.
513 *
514 * ldisc_flush_buffer - flush line discipline receive buffers
515 * ldisc_receive_buf - pass receive data to line discipline
516 */
517
518static void ldisc_flush_buffer(struct tty_struct *tty)
519{
520 struct tty_ldisc *ld = tty_ldisc_ref(tty);
521 if (ld) {
522 if (ld->flush_buffer)
523 ld->flush_buffer(tty);
524 tty_ldisc_deref(ld);
525 }
526}
527
528static void ldisc_receive_buf(struct tty_struct *tty,
529 const __u8 *data, char *flags, int count)
530{
531 struct tty_ldisc *ld;
532 if (!tty)
533 return;
534 ld = tty_ldisc_ref(tty);
535 if (ld) {
536 if (ld->receive_buf)
537 ld->receive_buf(tty, data, flags, count);
538 tty_ldisc_deref(ld);
539 }
540}
541
542static dev_link_t *mgslpc_attach(void)
543{
544 MGSLPC_INFO *info;
545 dev_link_t *link;
546 client_reg_t client_reg;
547 int ret;
548
549 if (debug_level >= DEBUG_LEVEL_INFO)
550 printk("mgslpc_attach\n");
551
552 info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
553 if (!info) {
554 printk("Error can't allocate device instance data\n");
555 return NULL;
556 }
557
558 memset(info, 0, sizeof(MGSLPC_INFO));
559 info->magic = MGSLPC_MAGIC;
560 INIT_WORK(&info->task, bh_handler, info);
561 info->max_frame_size = 4096;
562 info->close_delay = 5*HZ/10;
563 info->closing_wait = 30*HZ;
564 init_waitqueue_head(&info->open_wait);
565 init_waitqueue_head(&info->close_wait);
566 init_waitqueue_head(&info->status_event_wait_q);
567 init_waitqueue_head(&info->event_wait_q);
568 spin_lock_init(&info->lock);
569 spin_lock_init(&info->netlock);
570 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
571 info->idle_mode = HDLC_TXIDLE_FLAGS;
572 info->imra_value = 0xffff;
573 info->imrb_value = 0xffff;
574 info->pim_value = 0xff;
575
576 link = &info->link;
577 link->priv = info;
578
579 /* Initialize the dev_link_t structure */
580
581 /* Interrupt setup */
582 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
Dominik Brodowski0c7ab672005-06-27 16:28:56 -0700583 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584 link->irq.Handler = NULL;
585
586 link->conf.Attributes = 0;
587 link->conf.Vcc = 50;
588 link->conf.IntType = INT_MEMORY_AND_IO;
589
590 /* Register with Card Services */
591 link->next = dev_list;
592 dev_list = link;
593
594 client_reg.dev_info = &dev_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 client_reg.Version = 0x0210;
596 client_reg.event_callback_args.client_data = link;
597
598 ret = pcmcia_register_client(&link->handle, &client_reg);
599 if (ret != CS_SUCCESS) {
600 cs_error(link->handle, RegisterClient, ret);
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100601 mgslpc_detach(link->handle);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 return NULL;
603 }
604
605 mgslpc_add_device(info);
606
607 return link;
608}
609
610/* Card has been inserted.
611 */
612
613#define CS_CHECK(fn, ret) \
614do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
615
616static void mgslpc_config(dev_link_t *link)
617{
618 client_handle_t handle = link->handle;
619 MGSLPC_INFO *info = link->priv;
620 tuple_t tuple;
621 cisparse_t parse;
622 int last_fn, last_ret;
623 u_char buf[64];
624 config_info_t conf;
625 cistpl_cftable_entry_t dflt = { 0 };
626 cistpl_cftable_entry_t *cfg;
627
628 if (debug_level >= DEBUG_LEVEL_INFO)
629 printk("mgslpc_config(0x%p)\n", link);
630
631 /* read CONFIG tuple to find its configuration registers */
632 tuple.DesiredTuple = CISTPL_CONFIG;
633 tuple.Attributes = 0;
634 tuple.TupleData = buf;
635 tuple.TupleDataMax = sizeof(buf);
636 tuple.TupleOffset = 0;
637 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
638 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
639 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
640 link->conf.ConfigBase = parse.config.base;
641 link->conf.Present = parse.config.rmask[0];
642
643 /* Configure card */
644 link->state |= DEV_CONFIG;
645
646 /* Look up the current Vcc */
647 CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
648 link->conf.Vcc = conf.Vcc;
649
650 /* get CIS configuration entry */
651
652 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
653 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
654
655 cfg = &(parse.cftable_entry);
656 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
657 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
658
659 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
660 if (cfg->index == 0)
661 goto cs_failed;
662
663 link->conf.ConfigIndex = cfg->index;
664 link->conf.Attributes |= CONF_ENABLE_IRQ;
665
666 /* IO window settings */
667 link->io.NumPorts1 = 0;
668 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
669 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
670 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
671 if (!(io->flags & CISTPL_IO_8BIT))
672 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
673 if (!(io->flags & CISTPL_IO_16BIT))
674 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
675 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
676 link->io.BasePort1 = io->win[0].base;
677 link->io.NumPorts1 = io->win[0].len;
678 CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
679 }
680
681 link->conf.Attributes = CONF_ENABLE_IRQ;
682 link->conf.Vcc = 50;
683 link->conf.IntType = INT_MEMORY_AND_IO;
684 link->conf.ConfigIndex = 8;
685 link->conf.Present = PRESENT_OPTION;
686
687 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
688 link->irq.Handler = mgslpc_isr;
689 link->irq.Instance = info;
690 CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
691
692 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
693
694 info->io_base = link->io.BasePort1;
695 info->irq_level = link->irq.AssignedIRQ;
696
697 /* add to linked list of devices */
698 sprintf(info->node.dev_name, "mgslpc0");
699 info->node.major = info->node.minor = 0;
700 link->dev = &info->node;
701
702 printk(KERN_INFO "%s: index 0x%02x:",
703 info->node.dev_name, link->conf.ConfigIndex);
704 if (link->conf.Attributes & CONF_ENABLE_IRQ)
705 printk(", irq %d", link->irq.AssignedIRQ);
706 if (link->io.NumPorts1)
707 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
708 link->io.BasePort1+link->io.NumPorts1-1);
709 printk("\n");
710
711 link->state &= ~DEV_CONFIG_PENDING;
712 return;
713
714cs_failed:
715 cs_error(link->handle, last_fn, last_ret);
716 mgslpc_release((u_long)link);
717}
718
719/* Card has been removed.
720 * Unregister device and release PCMCIA configuration.
721 * If device is open, postpone until it is closed.
722 */
723static void mgslpc_release(u_long arg)
724{
725 dev_link_t *link = (dev_link_t *)arg;
726
727 if (debug_level >= DEBUG_LEVEL_INFO)
728 printk("mgslpc_release(0x%p)\n", link);
729
730 /* Unlink the device chain */
731 link->dev = NULL;
732 link->state &= ~DEV_CONFIG;
733
734 pcmcia_release_configuration(link->handle);
735 if (link->io.NumPorts1)
736 pcmcia_release_io(link->handle, &link->io);
737 if (link->irq.AssignedIRQ)
738 pcmcia_release_irq(link->handle, &link->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739}
740
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100741static void mgslpc_detach(struct pcmcia_device *p_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700742{
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100743 dev_link_t *link = dev_to_instance(p_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744 dev_link_t **linkp;
745
746 if (debug_level >= DEBUG_LEVEL_INFO)
747 printk("mgslpc_detach(0x%p)\n", link);
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100748
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 /* find device */
750 for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
751 if (*linkp == link) break;
752 if (*linkp == NULL)
753 return;
754
755 if (link->state & DEV_CONFIG) {
Dominik Brodowskicc3b4862005-11-14 21:23:14 +0100756 ((MGSLPC_INFO *)link->priv)->stop = 1;
757 mgslpc_release((u_long)link);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758 }
759
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760 /* Unlink device structure, and free it */
761 *linkp = link->next;
762 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
763}
764
Dominik Brodowski98e4c282005-11-14 21:21:18 +0100765static int mgslpc_suspend(struct pcmcia_device *dev)
766{
767 dev_link_t *link = dev_to_instance(dev);
768 MGSLPC_INFO *info = link->priv;
769
770 link->state |= DEV_SUSPEND;
771 info->stop = 1;
772 if (link->state & DEV_CONFIG)
773 pcmcia_release_configuration(link->handle);
774
775 return 0;
776}
777
778static int mgslpc_resume(struct pcmcia_device *dev)
779{
780 dev_link_t *link = dev_to_instance(dev);
781 MGSLPC_INFO *info = link->priv;
782
783 link->state &= ~DEV_SUSPEND;
784 if (link->state & DEV_CONFIG)
785 pcmcia_request_configuration(link->handle, &link->conf);
786 info->stop = 0;
787
788 return 0;
789}
790
791
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792static int mgslpc_event(event_t event, int priority,
793 event_callback_args_t *args)
794{
795 dev_link_t *link = args->client_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796
797 if (debug_level >= DEBUG_LEVEL_INFO)
798 printk("mgslpc_event(0x%06x)\n", event);
799
800 switch (event) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801 case CS_EVENT_CARD_INSERTION:
802 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
803 mgslpc_config(link);
804 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700805 }
806 return 0;
807}
808
809static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
810 char *name, const char *routine)
811{
812#ifdef MGSLPC_PARANOIA_CHECK
813 static const char *badmagic =
814 "Warning: bad magic number for mgsl struct (%s) in %s\n";
815 static const char *badinfo =
816 "Warning: null mgslpc_info for (%s) in %s\n";
817
818 if (!info) {
819 printk(badinfo, name, routine);
820 return 1;
821 }
822 if (info->magic != MGSLPC_MAGIC) {
823 printk(badmagic, name, routine);
824 return 1;
825 }
826#else
827 if (!info)
828 return 1;
829#endif
830 return 0;
831}
832
833
834#define CMD_RXFIFO BIT7 // release current rx FIFO
835#define CMD_RXRESET BIT6 // receiver reset
836#define CMD_RXFIFO_READ BIT5
837#define CMD_START_TIMER BIT4
838#define CMD_TXFIFO BIT3 // release current tx FIFO
839#define CMD_TXEOM BIT1 // transmit end message
840#define CMD_TXRESET BIT0 // transmit reset
841
842static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
843{
844 int i = 0;
845 /* wait for command completion */
846 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
847 udelay(1);
848 if (i++ == 1000)
849 return FALSE;
850 }
851 return TRUE;
852}
853
854static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
855{
856 wait_command_complete(info, channel);
857 write_reg(info, (unsigned char) (channel + CMDR), cmd);
858}
859
860static void tx_pause(struct tty_struct *tty)
861{
862 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
863 unsigned long flags;
864
865 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
866 return;
867 if (debug_level >= DEBUG_LEVEL_INFO)
868 printk("tx_pause(%s)\n",info->device_name);
869
870 spin_lock_irqsave(&info->lock,flags);
871 if (info->tx_enabled)
872 tx_stop(info);
873 spin_unlock_irqrestore(&info->lock,flags);
874}
875
876static void tx_release(struct tty_struct *tty)
877{
878 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
879 unsigned long flags;
880
881 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
882 return;
883 if (debug_level >= DEBUG_LEVEL_INFO)
884 printk("tx_release(%s)\n",info->device_name);
885
886 spin_lock_irqsave(&info->lock,flags);
887 if (!info->tx_enabled)
888 tx_start(info);
889 spin_unlock_irqrestore(&info->lock,flags);
890}
891
892/* Return next bottom half action to perform.
893 * or 0 if nothing to do.
894 */
895static int bh_action(MGSLPC_INFO *info)
896{
897 unsigned long flags;
898 int rc = 0;
899
900 spin_lock_irqsave(&info->lock,flags);
901
902 if (info->pending_bh & BH_RECEIVE) {
903 info->pending_bh &= ~BH_RECEIVE;
904 rc = BH_RECEIVE;
905 } else if (info->pending_bh & BH_TRANSMIT) {
906 info->pending_bh &= ~BH_TRANSMIT;
907 rc = BH_TRANSMIT;
908 } else if (info->pending_bh & BH_STATUS) {
909 info->pending_bh &= ~BH_STATUS;
910 rc = BH_STATUS;
911 }
912
913 if (!rc) {
914 /* Mark BH routine as complete */
915 info->bh_running = 0;
916 info->bh_requested = 0;
917 }
918
919 spin_unlock_irqrestore(&info->lock,flags);
920
921 return rc;
922}
923
924void bh_handler(void* Context)
925{
926 MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
927 int action;
928
929 if (!info)
930 return;
931
932 if (debug_level >= DEBUG_LEVEL_BH)
933 printk( "%s(%d):bh_handler(%s) entry\n",
934 __FILE__,__LINE__,info->device_name);
935
936 info->bh_running = 1;
937
938 while((action = bh_action(info)) != 0) {
939
940 /* Process work item */
941 if ( debug_level >= DEBUG_LEVEL_BH )
942 printk( "%s(%d):bh_handler() work item action=%d\n",
943 __FILE__,__LINE__,action);
944
945 switch (action) {
946
947 case BH_RECEIVE:
948 while(rx_get_frame(info));
949 break;
950 case BH_TRANSMIT:
951 bh_transmit(info);
952 break;
953 case BH_STATUS:
954 bh_status(info);
955 break;
956 default:
957 /* unknown work item ID */
958 printk("Unknown work item ID=%08X!\n", action);
959 break;
960 }
961 }
962
963 if (debug_level >= DEBUG_LEVEL_BH)
964 printk( "%s(%d):bh_handler(%s) exit\n",
965 __FILE__,__LINE__,info->device_name);
966}
967
968void bh_transmit(MGSLPC_INFO *info)
969{
970 struct tty_struct *tty = info->tty;
971 if (debug_level >= DEBUG_LEVEL_BH)
972 printk("bh_transmit() entry on %s\n", info->device_name);
973
974 if (tty) {
975 tty_wakeup(tty);
976 wake_up_interruptible(&tty->write_wait);
977 }
978}
979
980void bh_status(MGSLPC_INFO *info)
981{
982 info->ri_chkcount = 0;
983 info->dsr_chkcount = 0;
984 info->dcd_chkcount = 0;
985 info->cts_chkcount = 0;
986}
987
988/* eom: non-zero = end of frame */
989static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
990{
991 unsigned char data[2];
992 unsigned char fifo_count, read_count, i;
993 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
994
995 if (debug_level >= DEBUG_LEVEL_ISR)
996 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
997
998 if (!info->rx_enabled)
999 return;
1000
1001 if (info->rx_frame_count >= info->rx_buf_count) {
1002 /* no more free buffers */
1003 issue_command(info, CHA, CMD_RXRESET);
1004 info->pending_bh |= BH_RECEIVE;
1005 info->rx_overflow = 1;
1006 info->icount.buf_overrun++;
1007 return;
1008 }
1009
1010 if (eom) {
1011 /* end of frame, get FIFO count from RBCL register */
1012 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
1013 fifo_count = 32;
1014 } else
1015 fifo_count = 32;
1016
1017 do {
1018 if (fifo_count == 1) {
1019 read_count = 1;
1020 data[0] = read_reg(info, CHA + RXFIFO);
1021 } else {
1022 read_count = 2;
1023 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
1024 }
1025 fifo_count -= read_count;
1026 if (!fifo_count && eom)
1027 buf->status = data[--read_count];
1028
1029 for (i = 0; i < read_count; i++) {
1030 if (buf->count >= info->max_frame_size) {
1031 /* frame too large, reset receiver and reset current buffer */
1032 issue_command(info, CHA, CMD_RXRESET);
1033 buf->count = 0;
1034 return;
1035 }
1036 *(buf->data + buf->count) = data[i];
1037 buf->count++;
1038 }
1039 } while (fifo_count);
1040
1041 if (eom) {
1042 info->pending_bh |= BH_RECEIVE;
1043 info->rx_frame_count++;
1044 info->rx_put++;
1045 if (info->rx_put >= info->rx_buf_count)
1046 info->rx_put = 0;
1047 }
1048 issue_command(info, CHA, CMD_RXFIFO);
1049}
1050
1051static void rx_ready_async(MGSLPC_INFO *info, int tcd)
1052{
1053 unsigned char data, status;
1054 int fifo_count;
1055 struct tty_struct *tty = info->tty;
1056 struct mgsl_icount *icount = &info->icount;
1057
1058 if (tcd) {
1059 /* early termination, get FIFO count from RBCL register */
1060 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
1061
1062 /* Zero fifo count could mean 0 or 32 bytes available.
1063 * If BIT5 of STAR is set then at least 1 byte is available.
1064 */
1065 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
1066 fifo_count = 32;
1067 } else
1068 fifo_count = 32;
1069
1070 /* Flush received async data to receive data buffer. */
1071 while (fifo_count) {
1072 data = read_reg(info, CHA + RXFIFO);
1073 status = read_reg(info, CHA + RXFIFO);
1074 fifo_count -= 2;
1075
1076 if (tty->flip.count >= TTY_FLIPBUF_SIZE)
1077 break;
1078
1079 *tty->flip.char_buf_ptr = data;
1080 icount->rx++;
1081
1082 *tty->flip.flag_buf_ptr = 0;
1083
1084 // if no frameing/crc error then save data
1085 // BIT7:parity error
1086 // BIT6:framing error
1087
1088 if (status & (BIT7 + BIT6)) {
1089 if (status & BIT7)
1090 icount->parity++;
1091 else
1092 icount->frame++;
1093
1094 /* discard char if tty control flags say so */
1095 if (status & info->ignore_status_mask)
1096 continue;
1097
1098 status &= info->read_status_mask;
1099
1100 if (status & BIT7)
1101 *tty->flip.flag_buf_ptr = TTY_PARITY;
1102 else if (status & BIT6)
1103 *tty->flip.flag_buf_ptr = TTY_FRAME;
1104 }
1105
1106 tty->flip.flag_buf_ptr++;
1107 tty->flip.char_buf_ptr++;
1108 tty->flip.count++;
1109 }
1110 issue_command(info, CHA, CMD_RXFIFO);
1111
1112 if (debug_level >= DEBUG_LEVEL_ISR) {
1113 printk("%s(%d):rx_ready_async count=%d\n",
1114 __FILE__,__LINE__,tty->flip.count);
1115 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1116 __FILE__,__LINE__,icount->rx,icount->brk,
1117 icount->parity,icount->frame,icount->overrun);
1118 }
1119
1120 if (tty->flip.count)
1121 tty_flip_buffer_push(tty);
1122}
1123
1124
1125static void tx_done(MGSLPC_INFO *info)
1126{
1127 if (!info->tx_active)
1128 return;
1129
1130 info->tx_active = 0;
1131 info->tx_aborting = 0;
1132
1133 if (info->params.mode == MGSL_MODE_ASYNC)
1134 return;
1135
1136 info->tx_count = info->tx_put = info->tx_get = 0;
1137 del_timer(&info->tx_timer);
1138
1139 if (info->drop_rts_on_tx_done) {
1140 get_signals(info);
1141 if (info->serial_signals & SerialSignal_RTS) {
1142 info->serial_signals &= ~SerialSignal_RTS;
1143 set_signals(info);
1144 }
1145 info->drop_rts_on_tx_done = 0;
1146 }
1147
1148#ifdef CONFIG_HDLC
1149 if (info->netcount)
1150 hdlcdev_tx_done(info);
1151 else
1152#endif
1153 {
1154 if (info->tty->stopped || info->tty->hw_stopped) {
1155 tx_stop(info);
1156 return;
1157 }
1158 info->pending_bh |= BH_TRANSMIT;
1159 }
1160}
1161
1162static void tx_ready(MGSLPC_INFO *info)
1163{
1164 unsigned char fifo_count = 32;
1165 int c;
1166
1167 if (debug_level >= DEBUG_LEVEL_ISR)
1168 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1169
1170 if (info->params.mode == MGSL_MODE_HDLC) {
1171 if (!info->tx_active)
1172 return;
1173 } else {
1174 if (info->tty->stopped || info->tty->hw_stopped) {
1175 tx_stop(info);
1176 return;
1177 }
1178 if (!info->tx_count)
1179 info->tx_active = 0;
1180 }
1181
1182 if (!info->tx_count)
1183 return;
1184
1185 while (info->tx_count && fifo_count) {
1186 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1187
1188 if (c == 1) {
1189 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1190 } else {
1191 write_reg16(info, CHA + TXFIFO,
1192 *((unsigned short*)(info->tx_buf + info->tx_get)));
1193 }
1194 info->tx_count -= c;
1195 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1196 fifo_count -= c;
1197 }
1198
1199 if (info->params.mode == MGSL_MODE_ASYNC) {
1200 if (info->tx_count < WAKEUP_CHARS)
1201 info->pending_bh |= BH_TRANSMIT;
1202 issue_command(info, CHA, CMD_TXFIFO);
1203 } else {
1204 if (info->tx_count)
1205 issue_command(info, CHA, CMD_TXFIFO);
1206 else
1207 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1208 }
1209}
1210
1211static void cts_change(MGSLPC_INFO *info)
1212{
1213 get_signals(info);
1214 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1215 irq_disable(info, CHB, IRQ_CTS);
1216 info->icount.cts++;
1217 if (info->serial_signals & SerialSignal_CTS)
1218 info->input_signal_events.cts_up++;
1219 else
1220 info->input_signal_events.cts_down++;
1221 wake_up_interruptible(&info->status_event_wait_q);
1222 wake_up_interruptible(&info->event_wait_q);
1223
1224 if (info->flags & ASYNC_CTS_FLOW) {
1225 if (info->tty->hw_stopped) {
1226 if (info->serial_signals & SerialSignal_CTS) {
1227 if (debug_level >= DEBUG_LEVEL_ISR)
1228 printk("CTS tx start...");
1229 if (info->tty)
1230 info->tty->hw_stopped = 0;
1231 tx_start(info);
1232 info->pending_bh |= BH_TRANSMIT;
1233 return;
1234 }
1235 } else {
1236 if (!(info->serial_signals & SerialSignal_CTS)) {
1237 if (debug_level >= DEBUG_LEVEL_ISR)
1238 printk("CTS tx stop...");
1239 if (info->tty)
1240 info->tty->hw_stopped = 1;
1241 tx_stop(info);
1242 }
1243 }
1244 }
1245 info->pending_bh |= BH_STATUS;
1246}
1247
1248static void dcd_change(MGSLPC_INFO *info)
1249{
1250 get_signals(info);
1251 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1252 irq_disable(info, CHB, IRQ_DCD);
1253 info->icount.dcd++;
1254 if (info->serial_signals & SerialSignal_DCD) {
1255 info->input_signal_events.dcd_up++;
1256 }
1257 else
1258 info->input_signal_events.dcd_down++;
1259#ifdef CONFIG_HDLC
1260 if (info->netcount)
1261 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
1262#endif
1263 wake_up_interruptible(&info->status_event_wait_q);
1264 wake_up_interruptible(&info->event_wait_q);
1265
1266 if (info->flags & ASYNC_CHECK_CD) {
1267 if (debug_level >= DEBUG_LEVEL_ISR)
1268 printk("%s CD now %s...", info->device_name,
1269 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1270 if (info->serial_signals & SerialSignal_DCD)
1271 wake_up_interruptible(&info->open_wait);
1272 else {
1273 if (debug_level >= DEBUG_LEVEL_ISR)
1274 printk("doing serial hangup...");
1275 if (info->tty)
1276 tty_hangup(info->tty);
1277 }
1278 }
1279 info->pending_bh |= BH_STATUS;
1280}
1281
1282static void dsr_change(MGSLPC_INFO *info)
1283{
1284 get_signals(info);
1285 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1286 port_irq_disable(info, PVR_DSR);
1287 info->icount.dsr++;
1288 if (info->serial_signals & SerialSignal_DSR)
1289 info->input_signal_events.dsr_up++;
1290 else
1291 info->input_signal_events.dsr_down++;
1292 wake_up_interruptible(&info->status_event_wait_q);
1293 wake_up_interruptible(&info->event_wait_q);
1294 info->pending_bh |= BH_STATUS;
1295}
1296
1297static void ri_change(MGSLPC_INFO *info)
1298{
1299 get_signals(info);
1300 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1301 port_irq_disable(info, PVR_RI);
1302 info->icount.rng++;
1303 if (info->serial_signals & SerialSignal_RI)
1304 info->input_signal_events.ri_up++;
1305 else
1306 info->input_signal_events.ri_down++;
1307 wake_up_interruptible(&info->status_event_wait_q);
1308 wake_up_interruptible(&info->event_wait_q);
1309 info->pending_bh |= BH_STATUS;
1310}
1311
1312/* Interrupt service routine entry point.
1313 *
1314 * Arguments:
1315 *
1316 * irq interrupt number that caused interrupt
1317 * dev_id device ID supplied during interrupt registration
1318 * regs interrupted processor context
1319 */
1320static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
1321{
1322 MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
1323 unsigned short isr;
1324 unsigned char gis, pis;
1325 int count=0;
1326
1327 if (debug_level >= DEBUG_LEVEL_ISR)
1328 printk("mgslpc_isr(%d) entry.\n", irq);
1329 if (!info)
1330 return IRQ_NONE;
1331
1332 if (!(info->link.state & DEV_CONFIG))
1333 return IRQ_HANDLED;
1334
1335 spin_lock(&info->lock);
1336
1337 while ((gis = read_reg(info, CHA + GIS))) {
1338 if (debug_level >= DEBUG_LEVEL_ISR)
1339 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1340
1341 if ((gis & 0x70) || count > 1000) {
1342 printk("synclink_cs:hardware failed or ejected\n");
1343 break;
1344 }
1345 count++;
1346
1347 if (gis & (BIT1 + BIT0)) {
1348 isr = read_reg16(info, CHB + ISR);
1349 if (isr & IRQ_DCD)
1350 dcd_change(info);
1351 if (isr & IRQ_CTS)
1352 cts_change(info);
1353 }
1354 if (gis & (BIT3 + BIT2))
1355 {
1356 isr = read_reg16(info, CHA + ISR);
1357 if (isr & IRQ_TIMER) {
1358 info->irq_occurred = 1;
1359 irq_disable(info, CHA, IRQ_TIMER);
1360 }
1361
1362 /* receive IRQs */
1363 if (isr & IRQ_EXITHUNT) {
1364 info->icount.exithunt++;
1365 wake_up_interruptible(&info->event_wait_q);
1366 }
1367 if (isr & IRQ_BREAK_ON) {
1368 info->icount.brk++;
1369 if (info->flags & ASYNC_SAK)
1370 do_SAK(info->tty);
1371 }
1372 if (isr & IRQ_RXTIME) {
1373 issue_command(info, CHA, CMD_RXFIFO_READ);
1374 }
1375 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1376 if (info->params.mode == MGSL_MODE_HDLC)
1377 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1378 else
1379 rx_ready_async(info, isr & IRQ_RXEOM);
1380 }
1381
1382 /* transmit IRQs */
1383 if (isr & IRQ_UNDERRUN) {
1384 if (info->tx_aborting)
1385 info->icount.txabort++;
1386 else
1387 info->icount.txunder++;
1388 tx_done(info);
1389 }
1390 else if (isr & IRQ_ALLSENT) {
1391 info->icount.txok++;
1392 tx_done(info);
1393 }
1394 else if (isr & IRQ_TXFIFO)
1395 tx_ready(info);
1396 }
1397 if (gis & BIT7) {
1398 pis = read_reg(info, CHA + PIS);
1399 if (pis & BIT1)
1400 dsr_change(info);
1401 if (pis & BIT2)
1402 ri_change(info);
1403 }
1404 }
1405
1406 /* Request bottom half processing if there's something
1407 * for it to do and the bh is not already running
1408 */
1409
1410 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1411 if ( debug_level >= DEBUG_LEVEL_ISR )
1412 printk("%s(%d):%s queueing bh task.\n",
1413 __FILE__,__LINE__,info->device_name);
1414 schedule_work(&info->task);
1415 info->bh_requested = 1;
1416 }
1417
1418 spin_unlock(&info->lock);
1419
1420 if (debug_level >= DEBUG_LEVEL_ISR)
1421 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1422 __FILE__,__LINE__,irq);
1423
1424 return IRQ_HANDLED;
1425}
1426
1427/* Initialize and start device.
1428 */
1429static int startup(MGSLPC_INFO * info)
1430{
1431 int retval = 0;
1432
1433 if (debug_level >= DEBUG_LEVEL_INFO)
1434 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1435
1436 if (info->flags & ASYNC_INITIALIZED)
1437 return 0;
1438
1439 if (!info->tx_buf) {
1440 /* allocate a page of memory for a transmit buffer */
1441 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1442 if (!info->tx_buf) {
1443 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1444 __FILE__,__LINE__,info->device_name);
1445 return -ENOMEM;
1446 }
1447 }
1448
1449 info->pending_bh = 0;
1450
Paul Fulghuma7482a22005-09-10 00:26:07 -07001451 memset(&info->icount, 0, sizeof(info->icount));
1452
Linus Torvalds1da177e2005-04-16 15:20:36 -07001453 init_timer(&info->tx_timer);
1454 info->tx_timer.data = (unsigned long)info;
1455 info->tx_timer.function = tx_timeout;
1456
1457 /* Allocate and claim adapter resources */
1458 retval = claim_resources(info);
1459
1460 /* perform existance check and diagnostics */
1461 if ( !retval )
1462 retval = adapter_test(info);
1463
1464 if ( retval ) {
1465 if (capable(CAP_SYS_ADMIN) && info->tty)
1466 set_bit(TTY_IO_ERROR, &info->tty->flags);
1467 release_resources(info);
1468 return retval;
1469 }
1470
1471 /* program hardware for current parameters */
1472 mgslpc_change_params(info);
1473
1474 if (info->tty)
1475 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1476
1477 info->flags |= ASYNC_INITIALIZED;
1478
1479 return 0;
1480}
1481
1482/* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1483 */
1484static void shutdown(MGSLPC_INFO * info)
1485{
1486 unsigned long flags;
1487
1488 if (!(info->flags & ASYNC_INITIALIZED))
1489 return;
1490
1491 if (debug_level >= DEBUG_LEVEL_INFO)
1492 printk("%s(%d):mgslpc_shutdown(%s)\n",
1493 __FILE__,__LINE__, info->device_name );
1494
1495 /* clear status wait queue because status changes */
1496 /* can't happen after shutting down the hardware */
1497 wake_up_interruptible(&info->status_event_wait_q);
1498 wake_up_interruptible(&info->event_wait_q);
1499
1500 del_timer(&info->tx_timer);
1501
1502 if (info->tx_buf) {
1503 free_page((unsigned long) info->tx_buf);
1504 info->tx_buf = NULL;
1505 }
1506
1507 spin_lock_irqsave(&info->lock,flags);
1508
1509 rx_stop(info);
1510 tx_stop(info);
1511
1512 /* TODO:disable interrupts instead of reset to preserve signal states */
1513 reset_device(info);
1514
1515 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1516 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1517 set_signals(info);
1518 }
1519
1520 spin_unlock_irqrestore(&info->lock,flags);
1521
1522 release_resources(info);
1523
1524 if (info->tty)
1525 set_bit(TTY_IO_ERROR, &info->tty->flags);
1526
1527 info->flags &= ~ASYNC_INITIALIZED;
1528}
1529
1530static void mgslpc_program_hw(MGSLPC_INFO *info)
1531{
1532 unsigned long flags;
1533
1534 spin_lock_irqsave(&info->lock,flags);
1535
1536 rx_stop(info);
1537 tx_stop(info);
1538 info->tx_count = info->tx_put = info->tx_get = 0;
1539
1540 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1541 hdlc_mode(info);
1542 else
1543 async_mode(info);
1544
1545 set_signals(info);
1546
1547 info->dcd_chkcount = 0;
1548 info->cts_chkcount = 0;
1549 info->ri_chkcount = 0;
1550 info->dsr_chkcount = 0;
1551
1552 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1553 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1554 get_signals(info);
1555
1556 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1557 rx_start(info);
1558
1559 spin_unlock_irqrestore(&info->lock,flags);
1560}
1561
1562/* Reconfigure adapter based on new parameters
1563 */
1564static void mgslpc_change_params(MGSLPC_INFO *info)
1565{
1566 unsigned cflag;
1567 int bits_per_char;
1568
1569 if (!info->tty || !info->tty->termios)
1570 return;
1571
1572 if (debug_level >= DEBUG_LEVEL_INFO)
1573 printk("%s(%d):mgslpc_change_params(%s)\n",
1574 __FILE__,__LINE__, info->device_name );
1575
1576 cflag = info->tty->termios->c_cflag;
1577
1578 /* if B0 rate (hangup) specified then negate DTR and RTS */
1579 /* otherwise assert DTR and RTS */
1580 if (cflag & CBAUD)
1581 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1582 else
1583 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1584
1585 /* byte size and parity */
1586
1587 switch (cflag & CSIZE) {
1588 case CS5: info->params.data_bits = 5; break;
1589 case CS6: info->params.data_bits = 6; break;
1590 case CS7: info->params.data_bits = 7; break;
1591 case CS8: info->params.data_bits = 8; break;
1592 default: info->params.data_bits = 7; break;
1593 }
1594
1595 if (cflag & CSTOPB)
1596 info->params.stop_bits = 2;
1597 else
1598 info->params.stop_bits = 1;
1599
1600 info->params.parity = ASYNC_PARITY_NONE;
1601 if (cflag & PARENB) {
1602 if (cflag & PARODD)
1603 info->params.parity = ASYNC_PARITY_ODD;
1604 else
1605 info->params.parity = ASYNC_PARITY_EVEN;
1606#ifdef CMSPAR
1607 if (cflag & CMSPAR)
1608 info->params.parity = ASYNC_PARITY_SPACE;
1609#endif
1610 }
1611
1612 /* calculate number of jiffies to transmit a full
1613 * FIFO (32 bytes) at specified data rate
1614 */
1615 bits_per_char = info->params.data_bits +
1616 info->params.stop_bits + 1;
1617
1618 /* if port data rate is set to 460800 or less then
1619 * allow tty settings to override, otherwise keep the
1620 * current data rate.
1621 */
1622 if (info->params.data_rate <= 460800) {
1623 info->params.data_rate = tty_get_baud_rate(info->tty);
1624 }
1625
1626 if ( info->params.data_rate ) {
1627 info->timeout = (32*HZ*bits_per_char) /
1628 info->params.data_rate;
1629 }
1630 info->timeout += HZ/50; /* Add .02 seconds of slop */
1631
1632 if (cflag & CRTSCTS)
1633 info->flags |= ASYNC_CTS_FLOW;
1634 else
1635 info->flags &= ~ASYNC_CTS_FLOW;
1636
1637 if (cflag & CLOCAL)
1638 info->flags &= ~ASYNC_CHECK_CD;
1639 else
1640 info->flags |= ASYNC_CHECK_CD;
1641
1642 /* process tty input control flags */
1643
1644 info->read_status_mask = 0;
1645 if (I_INPCK(info->tty))
1646 info->read_status_mask |= BIT7 | BIT6;
1647 if (I_IGNPAR(info->tty))
1648 info->ignore_status_mask |= BIT7 | BIT6;
1649
1650 mgslpc_program_hw(info);
1651}
1652
1653/* Add a character to the transmit buffer
1654 */
1655static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1656{
1657 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1658 unsigned long flags;
1659
1660 if (debug_level >= DEBUG_LEVEL_INFO) {
1661 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1662 __FILE__,__LINE__,ch,info->device_name);
1663 }
1664
1665 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1666 return;
1667
1668 if (!tty || !info->tx_buf)
1669 return;
1670
1671 spin_lock_irqsave(&info->lock,flags);
1672
1673 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1674 if (info->tx_count < TXBUFSIZE - 1) {
1675 info->tx_buf[info->tx_put++] = ch;
1676 info->tx_put &= TXBUFSIZE-1;
1677 info->tx_count++;
1678 }
1679 }
1680
1681 spin_unlock_irqrestore(&info->lock,flags);
1682}
1683
1684/* Enable transmitter so remaining characters in the
1685 * transmit buffer are sent.
1686 */
1687static void mgslpc_flush_chars(struct tty_struct *tty)
1688{
1689 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1690 unsigned long flags;
1691
1692 if (debug_level >= DEBUG_LEVEL_INFO)
1693 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1694 __FILE__,__LINE__,info->device_name,info->tx_count);
1695
1696 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1697 return;
1698
1699 if (info->tx_count <= 0 || tty->stopped ||
1700 tty->hw_stopped || !info->tx_buf)
1701 return;
1702
1703 if (debug_level >= DEBUG_LEVEL_INFO)
1704 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1705 __FILE__,__LINE__,info->device_name);
1706
1707 spin_lock_irqsave(&info->lock,flags);
1708 if (!info->tx_active)
1709 tx_start(info);
1710 spin_unlock_irqrestore(&info->lock,flags);
1711}
1712
1713/* Send a block of data
1714 *
1715 * Arguments:
1716 *
1717 * tty pointer to tty information structure
1718 * buf pointer to buffer containing send data
1719 * count size of send data in bytes
1720 *
1721 * Returns: number of characters written
1722 */
1723static int mgslpc_write(struct tty_struct * tty,
1724 const unsigned char *buf, int count)
1725{
1726 int c, ret = 0;
1727 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1728 unsigned long flags;
1729
1730 if (debug_level >= DEBUG_LEVEL_INFO)
1731 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1732 __FILE__,__LINE__,info->device_name,count);
1733
1734 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1735 !tty || !info->tx_buf)
1736 goto cleanup;
1737
1738 if (info->params.mode == MGSL_MODE_HDLC) {
1739 if (count > TXBUFSIZE) {
1740 ret = -EIO;
1741 goto cleanup;
1742 }
1743 if (info->tx_active)
1744 goto cleanup;
1745 else if (info->tx_count)
1746 goto start;
1747 }
1748
1749 for (;;) {
1750 c = min(count,
1751 min(TXBUFSIZE - info->tx_count - 1,
1752 TXBUFSIZE - info->tx_put));
1753 if (c <= 0)
1754 break;
1755
1756 memcpy(info->tx_buf + info->tx_put, buf, c);
1757
1758 spin_lock_irqsave(&info->lock,flags);
1759 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1760 info->tx_count += c;
1761 spin_unlock_irqrestore(&info->lock,flags);
1762
1763 buf += c;
1764 count -= c;
1765 ret += c;
1766 }
1767start:
1768 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1769 spin_lock_irqsave(&info->lock,flags);
1770 if (!info->tx_active)
1771 tx_start(info);
1772 spin_unlock_irqrestore(&info->lock,flags);
1773 }
1774cleanup:
1775 if (debug_level >= DEBUG_LEVEL_INFO)
1776 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1777 __FILE__,__LINE__,info->device_name,ret);
1778 return ret;
1779}
1780
1781/* Return the count of free bytes in transmit buffer
1782 */
1783static int mgslpc_write_room(struct tty_struct *tty)
1784{
1785 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1786 int ret;
1787
1788 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1789 return 0;
1790
1791 if (info->params.mode == MGSL_MODE_HDLC) {
1792 /* HDLC (frame oriented) mode */
1793 if (info->tx_active)
1794 return 0;
1795 else
1796 return HDLC_MAX_FRAME_SIZE;
1797 } else {
1798 ret = TXBUFSIZE - info->tx_count - 1;
1799 if (ret < 0)
1800 ret = 0;
1801 }
1802
1803 if (debug_level >= DEBUG_LEVEL_INFO)
1804 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1805 __FILE__,__LINE__, info->device_name, ret);
1806 return ret;
1807}
1808
1809/* Return the count of bytes in transmit buffer
1810 */
1811static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1812{
1813 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1814 int rc;
1815
1816 if (debug_level >= DEBUG_LEVEL_INFO)
1817 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1818 __FILE__,__LINE__, info->device_name );
1819
1820 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1821 return 0;
1822
1823 if (info->params.mode == MGSL_MODE_HDLC)
1824 rc = info->tx_active ? info->max_frame_size : 0;
1825 else
1826 rc = info->tx_count;
1827
1828 if (debug_level >= DEBUG_LEVEL_INFO)
1829 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1830 __FILE__,__LINE__, info->device_name, rc);
1831
1832 return rc;
1833}
1834
1835/* Discard all data in the send buffer
1836 */
1837static void mgslpc_flush_buffer(struct tty_struct *tty)
1838{
1839 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1840 unsigned long flags;
1841
1842 if (debug_level >= DEBUG_LEVEL_INFO)
1843 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1844 __FILE__,__LINE__, info->device_name );
1845
1846 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1847 return;
1848
1849 spin_lock_irqsave(&info->lock,flags);
1850 info->tx_count = info->tx_put = info->tx_get = 0;
1851 del_timer(&info->tx_timer);
1852 spin_unlock_irqrestore(&info->lock,flags);
1853
1854 wake_up_interruptible(&tty->write_wait);
1855 tty_wakeup(tty);
1856}
1857
1858/* Send a high-priority XON/XOFF character
1859 */
1860static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1861{
1862 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1863 unsigned long flags;
1864
1865 if (debug_level >= DEBUG_LEVEL_INFO)
1866 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1867 __FILE__,__LINE__, info->device_name, ch );
1868
1869 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1870 return;
1871
1872 info->x_char = ch;
1873 if (ch) {
1874 spin_lock_irqsave(&info->lock,flags);
1875 if (!info->tx_enabled)
1876 tx_start(info);
1877 spin_unlock_irqrestore(&info->lock,flags);
1878 }
1879}
1880
1881/* Signal remote device to throttle send data (our receive data)
1882 */
1883static void mgslpc_throttle(struct tty_struct * tty)
1884{
1885 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1886 unsigned long flags;
1887
1888 if (debug_level >= DEBUG_LEVEL_INFO)
1889 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1890 __FILE__,__LINE__, info->device_name );
1891
1892 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1893 return;
1894
1895 if (I_IXOFF(tty))
1896 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1897
1898 if (tty->termios->c_cflag & CRTSCTS) {
1899 spin_lock_irqsave(&info->lock,flags);
1900 info->serial_signals &= ~SerialSignal_RTS;
1901 set_signals(info);
1902 spin_unlock_irqrestore(&info->lock,flags);
1903 }
1904}
1905
1906/* Signal remote device to stop throttling send data (our receive data)
1907 */
1908static void mgslpc_unthrottle(struct tty_struct * tty)
1909{
1910 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1911 unsigned long flags;
1912
1913 if (debug_level >= DEBUG_LEVEL_INFO)
1914 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1915 __FILE__,__LINE__, info->device_name );
1916
1917 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1918 return;
1919
1920 if (I_IXOFF(tty)) {
1921 if (info->x_char)
1922 info->x_char = 0;
1923 else
1924 mgslpc_send_xchar(tty, START_CHAR(tty));
1925 }
1926
1927 if (tty->termios->c_cflag & CRTSCTS) {
1928 spin_lock_irqsave(&info->lock,flags);
1929 info->serial_signals |= SerialSignal_RTS;
1930 set_signals(info);
1931 spin_unlock_irqrestore(&info->lock,flags);
1932 }
1933}
1934
1935/* get the current serial statistics
1936 */
1937static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1938{
1939 int err;
1940 if (debug_level >= DEBUG_LEVEL_INFO)
1941 printk("get_params(%s)\n", info->device_name);
Paul Fulghuma7482a22005-09-10 00:26:07 -07001942 if (!user_icount) {
1943 memset(&info->icount, 0, sizeof(info->icount));
1944 } else {
1945 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1946 if (err)
1947 return -EFAULT;
1948 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001949 return 0;
1950}
1951
1952/* get the current serial parameters
1953 */
1954static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1955{
1956 int err;
1957 if (debug_level >= DEBUG_LEVEL_INFO)
1958 printk("get_params(%s)\n", info->device_name);
1959 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1960 if (err)
1961 return -EFAULT;
1962 return 0;
1963}
1964
1965/* set the serial parameters
1966 *
1967 * Arguments:
1968 *
1969 * info pointer to device instance data
1970 * new_params user buffer containing new serial params
1971 *
1972 * Returns: 0 if success, otherwise error code
1973 */
1974static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1975{
1976 unsigned long flags;
1977 MGSL_PARAMS tmp_params;
1978 int err;
1979
1980 if (debug_level >= DEBUG_LEVEL_INFO)
1981 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1982 info->device_name );
1983 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1984 if (err) {
1985 if ( debug_level >= DEBUG_LEVEL_INFO )
1986 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1987 __FILE__,__LINE__,info->device_name);
1988 return -EFAULT;
1989 }
1990
1991 spin_lock_irqsave(&info->lock,flags);
1992 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1993 spin_unlock_irqrestore(&info->lock,flags);
1994
1995 mgslpc_change_params(info);
1996
1997 return 0;
1998}
1999
2000static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
2001{
2002 int err;
2003 if (debug_level >= DEBUG_LEVEL_INFO)
2004 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
2005 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2006 if (err)
2007 return -EFAULT;
2008 return 0;
2009}
2010
2011static int set_txidle(MGSLPC_INFO * info, int idle_mode)
2012{
2013 unsigned long flags;
2014 if (debug_level >= DEBUG_LEVEL_INFO)
2015 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
2016 spin_lock_irqsave(&info->lock,flags);
2017 info->idle_mode = idle_mode;
2018 tx_set_idle(info);
2019 spin_unlock_irqrestore(&info->lock,flags);
2020 return 0;
2021}
2022
2023static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
2024{
2025 int err;
2026 if (debug_level >= DEBUG_LEVEL_INFO)
2027 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
2028 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
2029 if (err)
2030 return -EFAULT;
2031 return 0;
2032}
2033
2034static int set_interface(MGSLPC_INFO * info, int if_mode)
2035{
2036 unsigned long flags;
2037 unsigned char val;
2038 if (debug_level >= DEBUG_LEVEL_INFO)
2039 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
2040 spin_lock_irqsave(&info->lock,flags);
2041 info->if_mode = if_mode;
2042
2043 val = read_reg(info, PVR) & 0x0f;
2044 switch (info->if_mode)
2045 {
2046 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
2047 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
2048 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
2049 }
2050 write_reg(info, PVR, val);
2051
2052 spin_unlock_irqrestore(&info->lock,flags);
2053 return 0;
2054}
2055
2056static int set_txenable(MGSLPC_INFO * info, int enable)
2057{
2058 unsigned long flags;
2059
2060 if (debug_level >= DEBUG_LEVEL_INFO)
2061 printk("set_txenable(%s,%d)\n", info->device_name, enable);
2062
2063 spin_lock_irqsave(&info->lock,flags);
2064 if (enable) {
2065 if (!info->tx_enabled)
2066 tx_start(info);
2067 } else {
2068 if (info->tx_enabled)
2069 tx_stop(info);
2070 }
2071 spin_unlock_irqrestore(&info->lock,flags);
2072 return 0;
2073}
2074
2075static int tx_abort(MGSLPC_INFO * info)
2076{
2077 unsigned long flags;
2078
2079 if (debug_level >= DEBUG_LEVEL_INFO)
2080 printk("tx_abort(%s)\n", info->device_name);
2081
2082 spin_lock_irqsave(&info->lock,flags);
2083 if (info->tx_active && info->tx_count &&
2084 info->params.mode == MGSL_MODE_HDLC) {
2085 /* clear data count so FIFO is not filled on next IRQ.
2086 * This results in underrun and abort transmission.
2087 */
2088 info->tx_count = info->tx_put = info->tx_get = 0;
2089 info->tx_aborting = TRUE;
2090 }
2091 spin_unlock_irqrestore(&info->lock,flags);
2092 return 0;
2093}
2094
2095static int set_rxenable(MGSLPC_INFO * info, int enable)
2096{
2097 unsigned long flags;
2098
2099 if (debug_level >= DEBUG_LEVEL_INFO)
2100 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2101
2102 spin_lock_irqsave(&info->lock,flags);
2103 if (enable) {
2104 if (!info->rx_enabled)
2105 rx_start(info);
2106 } else {
2107 if (info->rx_enabled)
2108 rx_stop(info);
2109 }
2110 spin_unlock_irqrestore(&info->lock,flags);
2111 return 0;
2112}
2113
2114/* wait for specified event to occur
2115 *
2116 * Arguments: info pointer to device instance data
2117 * mask pointer to bitmask of events to wait for
2118 * Return Value: 0 if successful and bit mask updated with
2119 * of events triggerred,
2120 * otherwise error code
2121 */
2122static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2123{
2124 unsigned long flags;
2125 int s;
2126 int rc=0;
2127 struct mgsl_icount cprev, cnow;
2128 int events;
2129 int mask;
2130 struct _input_signal_events oldsigs, newsigs;
2131 DECLARE_WAITQUEUE(wait, current);
2132
2133 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2134 if (rc)
2135 return -EFAULT;
2136
2137 if (debug_level >= DEBUG_LEVEL_INFO)
2138 printk("wait_events(%s,%d)\n", info->device_name, mask);
2139
2140 spin_lock_irqsave(&info->lock,flags);
2141
2142 /* return immediately if state matches requested events */
2143 get_signals(info);
2144 s = info->serial_signals;
2145 events = mask &
2146 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2147 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2148 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2149 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2150 if (events) {
2151 spin_unlock_irqrestore(&info->lock,flags);
2152 goto exit;
2153 }
2154
2155 /* save current irq counts */
2156 cprev = info->icount;
2157 oldsigs = info->input_signal_events;
2158
2159 if ((info->params.mode == MGSL_MODE_HDLC) &&
2160 (mask & MgslEvent_ExitHuntMode))
2161 irq_enable(info, CHA, IRQ_EXITHUNT);
2162
2163 set_current_state(TASK_INTERRUPTIBLE);
2164 add_wait_queue(&info->event_wait_q, &wait);
2165
2166 spin_unlock_irqrestore(&info->lock,flags);
2167
2168
2169 for(;;) {
2170 schedule();
2171 if (signal_pending(current)) {
2172 rc = -ERESTARTSYS;
2173 break;
2174 }
2175
2176 /* get current irq counts */
2177 spin_lock_irqsave(&info->lock,flags);
2178 cnow = info->icount;
2179 newsigs = info->input_signal_events;
2180 set_current_state(TASK_INTERRUPTIBLE);
2181 spin_unlock_irqrestore(&info->lock,flags);
2182
2183 /* if no change, wait aborted for some reason */
2184 if (newsigs.dsr_up == oldsigs.dsr_up &&
2185 newsigs.dsr_down == oldsigs.dsr_down &&
2186 newsigs.dcd_up == oldsigs.dcd_up &&
2187 newsigs.dcd_down == oldsigs.dcd_down &&
2188 newsigs.cts_up == oldsigs.cts_up &&
2189 newsigs.cts_down == oldsigs.cts_down &&
2190 newsigs.ri_up == oldsigs.ri_up &&
2191 newsigs.ri_down == oldsigs.ri_down &&
2192 cnow.exithunt == cprev.exithunt &&
2193 cnow.rxidle == cprev.rxidle) {
2194 rc = -EIO;
2195 break;
2196 }
2197
2198 events = mask &
2199 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2200 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2201 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2202 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2203 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2204 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2205 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2206 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2207 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2208 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2209 if (events)
2210 break;
2211
2212 cprev = cnow;
2213 oldsigs = newsigs;
2214 }
2215
2216 remove_wait_queue(&info->event_wait_q, &wait);
2217 set_current_state(TASK_RUNNING);
2218
2219 if (mask & MgslEvent_ExitHuntMode) {
2220 spin_lock_irqsave(&info->lock,flags);
2221 if (!waitqueue_active(&info->event_wait_q))
2222 irq_disable(info, CHA, IRQ_EXITHUNT);
2223 spin_unlock_irqrestore(&info->lock,flags);
2224 }
2225exit:
2226 if (rc == 0)
2227 PUT_USER(rc, events, mask_ptr);
2228 return rc;
2229}
2230
2231static int modem_input_wait(MGSLPC_INFO *info,int arg)
2232{
2233 unsigned long flags;
2234 int rc;
2235 struct mgsl_icount cprev, cnow;
2236 DECLARE_WAITQUEUE(wait, current);
2237
2238 /* save current irq counts */
2239 spin_lock_irqsave(&info->lock,flags);
2240 cprev = info->icount;
2241 add_wait_queue(&info->status_event_wait_q, &wait);
2242 set_current_state(TASK_INTERRUPTIBLE);
2243 spin_unlock_irqrestore(&info->lock,flags);
2244
2245 for(;;) {
2246 schedule();
2247 if (signal_pending(current)) {
2248 rc = -ERESTARTSYS;
2249 break;
2250 }
2251
2252 /* get new irq counts */
2253 spin_lock_irqsave(&info->lock,flags);
2254 cnow = info->icount;
2255 set_current_state(TASK_INTERRUPTIBLE);
2256 spin_unlock_irqrestore(&info->lock,flags);
2257
2258 /* if no change, wait aborted for some reason */
2259 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2260 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2261 rc = -EIO;
2262 break;
2263 }
2264
2265 /* check for change in caller specified modem input */
2266 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2267 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2268 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2269 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2270 rc = 0;
2271 break;
2272 }
2273
2274 cprev = cnow;
2275 }
2276 remove_wait_queue(&info->status_event_wait_q, &wait);
2277 set_current_state(TASK_RUNNING);
2278 return rc;
2279}
2280
2281/* return the state of the serial control and status signals
2282 */
2283static int tiocmget(struct tty_struct *tty, struct file *file)
2284{
2285 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2286 unsigned int result;
2287 unsigned long flags;
2288
2289 spin_lock_irqsave(&info->lock,flags);
2290 get_signals(info);
2291 spin_unlock_irqrestore(&info->lock,flags);
2292
2293 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2294 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2295 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2296 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2297 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2298 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2299
2300 if (debug_level >= DEBUG_LEVEL_INFO)
2301 printk("%s(%d):%s tiocmget() value=%08X\n",
2302 __FILE__,__LINE__, info->device_name, result );
2303 return result;
2304}
2305
2306/* set modem control signals (DTR/RTS)
2307 */
2308static int tiocmset(struct tty_struct *tty, struct file *file,
2309 unsigned int set, unsigned int clear)
2310{
2311 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2312 unsigned long flags;
2313
2314 if (debug_level >= DEBUG_LEVEL_INFO)
2315 printk("%s(%d):%s tiocmset(%x,%x)\n",
2316 __FILE__,__LINE__,info->device_name, set, clear);
2317
2318 if (set & TIOCM_RTS)
2319 info->serial_signals |= SerialSignal_RTS;
2320 if (set & TIOCM_DTR)
2321 info->serial_signals |= SerialSignal_DTR;
2322 if (clear & TIOCM_RTS)
2323 info->serial_signals &= ~SerialSignal_RTS;
2324 if (clear & TIOCM_DTR)
2325 info->serial_signals &= ~SerialSignal_DTR;
2326
2327 spin_lock_irqsave(&info->lock,flags);
2328 set_signals(info);
2329 spin_unlock_irqrestore(&info->lock,flags);
2330
2331 return 0;
2332}
2333
2334/* Set or clear transmit break condition
2335 *
2336 * Arguments: tty pointer to tty instance data
2337 * break_state -1=set break condition, 0=clear
2338 */
2339static void mgslpc_break(struct tty_struct *tty, int break_state)
2340{
2341 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2342 unsigned long flags;
2343
2344 if (debug_level >= DEBUG_LEVEL_INFO)
2345 printk("%s(%d):mgslpc_break(%s,%d)\n",
2346 __FILE__,__LINE__, info->device_name, break_state);
2347
2348 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2349 return;
2350
2351 spin_lock_irqsave(&info->lock,flags);
2352 if (break_state == -1)
2353 set_reg_bits(info, CHA+DAFO, BIT6);
2354 else
2355 clear_reg_bits(info, CHA+DAFO, BIT6);
2356 spin_unlock_irqrestore(&info->lock,flags);
2357}
2358
2359/* Service an IOCTL request
2360 *
2361 * Arguments:
2362 *
2363 * tty pointer to tty instance data
2364 * file pointer to associated file object for device
2365 * cmd IOCTL command code
2366 * arg command argument/context
2367 *
2368 * Return Value: 0 if success, otherwise error code
2369 */
2370static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2371 unsigned int cmd, unsigned long arg)
2372{
2373 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2374
2375 if (debug_level >= DEBUG_LEVEL_INFO)
2376 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2377 info->device_name, cmd );
2378
2379 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2380 return -ENODEV;
2381
2382 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2383 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2384 if (tty->flags & (1 << TTY_IO_ERROR))
2385 return -EIO;
2386 }
2387
2388 return ioctl_common(info, cmd, arg);
2389}
2390
2391int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2392{
2393 int error;
2394 struct mgsl_icount cnow; /* kernel counter temps */
2395 struct serial_icounter_struct __user *p_cuser; /* user space */
2396 void __user *argp = (void __user *)arg;
2397 unsigned long flags;
2398
2399 switch (cmd) {
2400 case MGSL_IOCGPARAMS:
2401 return get_params(info, argp);
2402 case MGSL_IOCSPARAMS:
2403 return set_params(info, argp);
2404 case MGSL_IOCGTXIDLE:
2405 return get_txidle(info, argp);
2406 case MGSL_IOCSTXIDLE:
2407 return set_txidle(info, (int)arg);
2408 case MGSL_IOCGIF:
2409 return get_interface(info, argp);
2410 case MGSL_IOCSIF:
2411 return set_interface(info,(int)arg);
2412 case MGSL_IOCTXENABLE:
2413 return set_txenable(info,(int)arg);
2414 case MGSL_IOCRXENABLE:
2415 return set_rxenable(info,(int)arg);
2416 case MGSL_IOCTXABORT:
2417 return tx_abort(info);
2418 case MGSL_IOCGSTATS:
2419 return get_stats(info, argp);
2420 case MGSL_IOCWAITEVENT:
2421 return wait_events(info, argp);
2422 case TIOCMIWAIT:
2423 return modem_input_wait(info,(int)arg);
2424 case TIOCGICOUNT:
2425 spin_lock_irqsave(&info->lock,flags);
2426 cnow = info->icount;
2427 spin_unlock_irqrestore(&info->lock,flags);
2428 p_cuser = argp;
2429 PUT_USER(error,cnow.cts, &p_cuser->cts);
2430 if (error) return error;
2431 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2432 if (error) return error;
2433 PUT_USER(error,cnow.rng, &p_cuser->rng);
2434 if (error) return error;
2435 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2436 if (error) return error;
2437 PUT_USER(error,cnow.rx, &p_cuser->rx);
2438 if (error) return error;
2439 PUT_USER(error,cnow.tx, &p_cuser->tx);
2440 if (error) return error;
2441 PUT_USER(error,cnow.frame, &p_cuser->frame);
2442 if (error) return error;
2443 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2444 if (error) return error;
2445 PUT_USER(error,cnow.parity, &p_cuser->parity);
2446 if (error) return error;
2447 PUT_USER(error,cnow.brk, &p_cuser->brk);
2448 if (error) return error;
2449 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2450 if (error) return error;
2451 return 0;
2452 default:
2453 return -ENOIOCTLCMD;
2454 }
2455 return 0;
2456}
2457
2458/* Set new termios settings
2459 *
2460 * Arguments:
2461 *
2462 * tty pointer to tty structure
2463 * termios pointer to buffer to hold returned old termios
2464 */
2465static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
2466{
2467 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2468 unsigned long flags;
2469
2470 if (debug_level >= DEBUG_LEVEL_INFO)
2471 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2472 tty->driver->name );
2473
2474 /* just return if nothing has changed */
2475 if ((tty->termios->c_cflag == old_termios->c_cflag)
2476 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2477 == RELEVANT_IFLAG(old_termios->c_iflag)))
2478 return;
2479
2480 mgslpc_change_params(info);
2481
2482 /* Handle transition to B0 status */
2483 if (old_termios->c_cflag & CBAUD &&
2484 !(tty->termios->c_cflag & CBAUD)) {
2485 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2486 spin_lock_irqsave(&info->lock,flags);
2487 set_signals(info);
2488 spin_unlock_irqrestore(&info->lock,flags);
2489 }
2490
2491 /* Handle transition away from B0 status */
2492 if (!(old_termios->c_cflag & CBAUD) &&
2493 tty->termios->c_cflag & CBAUD) {
2494 info->serial_signals |= SerialSignal_DTR;
2495 if (!(tty->termios->c_cflag & CRTSCTS) ||
2496 !test_bit(TTY_THROTTLED, &tty->flags)) {
2497 info->serial_signals |= SerialSignal_RTS;
2498 }
2499 spin_lock_irqsave(&info->lock,flags);
2500 set_signals(info);
2501 spin_unlock_irqrestore(&info->lock,flags);
2502 }
2503
2504 /* Handle turning off CRTSCTS */
2505 if (old_termios->c_cflag & CRTSCTS &&
2506 !(tty->termios->c_cflag & CRTSCTS)) {
2507 tty->hw_stopped = 0;
2508 tx_release(tty);
2509 }
2510}
2511
2512static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2513{
2514 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2515
2516 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2517 return;
2518
2519 if (debug_level >= DEBUG_LEVEL_INFO)
2520 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2521 __FILE__,__LINE__, info->device_name, info->count);
2522
2523 if (!info->count)
2524 return;
2525
2526 if (tty_hung_up_p(filp))
2527 goto cleanup;
2528
2529 if ((tty->count == 1) && (info->count != 1)) {
2530 /*
2531 * tty->count is 1 and the tty structure will be freed.
2532 * info->count should be one in this case.
2533 * if it's not, correct it so that the port is shutdown.
2534 */
2535 printk("mgslpc_close: bad refcount; tty->count is 1, "
2536 "info->count is %d\n", info->count);
2537 info->count = 1;
2538 }
2539
2540 info->count--;
2541
2542 /* if at least one open remaining, leave hardware active */
2543 if (info->count)
2544 goto cleanup;
2545
2546 info->flags |= ASYNC_CLOSING;
2547
2548 /* set tty->closing to notify line discipline to
2549 * only process XON/XOFF characters. Only the N_TTY
2550 * discipline appears to use this (ppp does not).
2551 */
2552 tty->closing = 1;
2553
2554 /* wait for transmit data to clear all layers */
2555
2556 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2557 if (debug_level >= DEBUG_LEVEL_INFO)
2558 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2559 __FILE__,__LINE__, info->device_name );
2560 tty_wait_until_sent(tty, info->closing_wait);
2561 }
2562
2563 if (info->flags & ASYNC_INITIALIZED)
2564 mgslpc_wait_until_sent(tty, info->timeout);
2565
2566 if (tty->driver->flush_buffer)
2567 tty->driver->flush_buffer(tty);
2568
2569 ldisc_flush_buffer(tty);
2570
2571 shutdown(info);
2572
2573 tty->closing = 0;
2574 info->tty = NULL;
2575
2576 if (info->blocked_open) {
2577 if (info->close_delay) {
2578 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2579 }
2580 wake_up_interruptible(&info->open_wait);
2581 }
2582
2583 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2584
2585 wake_up_interruptible(&info->close_wait);
2586
2587cleanup:
2588 if (debug_level >= DEBUG_LEVEL_INFO)
2589 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2590 tty->driver->name, info->count);
2591}
2592
2593/* Wait until the transmitter is empty.
2594 */
2595static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2596{
2597 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2598 unsigned long orig_jiffies, char_time;
2599
2600 if (!info )
2601 return;
2602
2603 if (debug_level >= DEBUG_LEVEL_INFO)
2604 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2605 __FILE__,__LINE__, info->device_name );
2606
2607 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2608 return;
2609
2610 if (!(info->flags & ASYNC_INITIALIZED))
2611 goto exit;
2612
2613 orig_jiffies = jiffies;
2614
2615 /* Set check interval to 1/5 of estimated time to
2616 * send a character, and make it at least 1. The check
2617 * interval should also be less than the timeout.
2618 * Note: use tight timings here to satisfy the NIST-PCTS.
2619 */
2620
2621 if ( info->params.data_rate ) {
2622 char_time = info->timeout/(32 * 5);
2623 if (!char_time)
2624 char_time++;
2625 } else
2626 char_time = 1;
2627
2628 if (timeout)
2629 char_time = min_t(unsigned long, char_time, timeout);
2630
2631 if (info->params.mode == MGSL_MODE_HDLC) {
2632 while (info->tx_active) {
2633 msleep_interruptible(jiffies_to_msecs(char_time));
2634 if (signal_pending(current))
2635 break;
2636 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2637 break;
2638 }
2639 } else {
2640 while ((info->tx_count || info->tx_active) &&
2641 info->tx_enabled) {
2642 msleep_interruptible(jiffies_to_msecs(char_time));
2643 if (signal_pending(current))
2644 break;
2645 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2646 break;
2647 }
2648 }
2649
2650exit:
2651 if (debug_level >= DEBUG_LEVEL_INFO)
2652 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2653 __FILE__,__LINE__, info->device_name );
2654}
2655
2656/* Called by tty_hangup() when a hangup is signaled.
2657 * This is the same as closing all open files for the port.
2658 */
2659static void mgslpc_hangup(struct tty_struct *tty)
2660{
2661 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2662
2663 if (debug_level >= DEBUG_LEVEL_INFO)
2664 printk("%s(%d):mgslpc_hangup(%s)\n",
2665 __FILE__,__LINE__, info->device_name );
2666
2667 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2668 return;
2669
2670 mgslpc_flush_buffer(tty);
2671 shutdown(info);
2672
2673 info->count = 0;
2674 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2675 info->tty = NULL;
2676
2677 wake_up_interruptible(&info->open_wait);
2678}
2679
2680/* Block the current process until the specified port
2681 * is ready to be opened.
2682 */
2683static int block_til_ready(struct tty_struct *tty, struct file *filp,
2684 MGSLPC_INFO *info)
2685{
2686 DECLARE_WAITQUEUE(wait, current);
2687 int retval;
2688 int do_clocal = 0, extra_count = 0;
2689 unsigned long flags;
2690
2691 if (debug_level >= DEBUG_LEVEL_INFO)
2692 printk("%s(%d):block_til_ready on %s\n",
2693 __FILE__,__LINE__, tty->driver->name );
2694
2695 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2696 /* nonblock mode is set or port is not enabled */
2697 /* just verify that callout device is not active */
2698 info->flags |= ASYNC_NORMAL_ACTIVE;
2699 return 0;
2700 }
2701
2702 if (tty->termios->c_cflag & CLOCAL)
2703 do_clocal = 1;
2704
2705 /* Wait for carrier detect and the line to become
2706 * free (i.e., not in use by the callout). While we are in
2707 * this loop, info->count is dropped by one, so that
2708 * mgslpc_close() knows when to free things. We restore it upon
2709 * exit, either normal or abnormal.
2710 */
2711
2712 retval = 0;
2713 add_wait_queue(&info->open_wait, &wait);
2714
2715 if (debug_level >= DEBUG_LEVEL_INFO)
2716 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2717 __FILE__,__LINE__, tty->driver->name, info->count );
2718
2719 spin_lock_irqsave(&info->lock, flags);
2720 if (!tty_hung_up_p(filp)) {
2721 extra_count = 1;
2722 info->count--;
2723 }
2724 spin_unlock_irqrestore(&info->lock, flags);
2725 info->blocked_open++;
2726
2727 while (1) {
2728 if ((tty->termios->c_cflag & CBAUD)) {
2729 spin_lock_irqsave(&info->lock,flags);
2730 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2731 set_signals(info);
2732 spin_unlock_irqrestore(&info->lock,flags);
2733 }
2734
2735 set_current_state(TASK_INTERRUPTIBLE);
2736
2737 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2738 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2739 -EAGAIN : -ERESTARTSYS;
2740 break;
2741 }
2742
2743 spin_lock_irqsave(&info->lock,flags);
2744 get_signals(info);
2745 spin_unlock_irqrestore(&info->lock,flags);
2746
2747 if (!(info->flags & ASYNC_CLOSING) &&
2748 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2749 break;
2750 }
2751
2752 if (signal_pending(current)) {
2753 retval = -ERESTARTSYS;
2754 break;
2755 }
2756
2757 if (debug_level >= DEBUG_LEVEL_INFO)
2758 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2759 __FILE__,__LINE__, tty->driver->name, info->count );
2760
2761 schedule();
2762 }
2763
2764 set_current_state(TASK_RUNNING);
2765 remove_wait_queue(&info->open_wait, &wait);
2766
2767 if (extra_count)
2768 info->count++;
2769 info->blocked_open--;
2770
2771 if (debug_level >= DEBUG_LEVEL_INFO)
2772 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2773 __FILE__,__LINE__, tty->driver->name, info->count );
2774
2775 if (!retval)
2776 info->flags |= ASYNC_NORMAL_ACTIVE;
2777
2778 return retval;
2779}
2780
2781static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2782{
2783 MGSLPC_INFO *info;
2784 int retval, line;
2785 unsigned long flags;
2786
2787 /* verify range of specified line number */
2788 line = tty->index;
2789 if ((line < 0) || (line >= mgslpc_device_count)) {
2790 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2791 __FILE__,__LINE__,line);
2792 return -ENODEV;
2793 }
2794
2795 /* find the info structure for the specified line */
2796 info = mgslpc_device_list;
2797 while(info && info->line != line)
2798 info = info->next_device;
2799 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2800 return -ENODEV;
2801
2802 tty->driver_data = info;
2803 info->tty = tty;
2804
2805 if (debug_level >= DEBUG_LEVEL_INFO)
2806 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2807 __FILE__,__LINE__,tty->driver->name, info->count);
2808
2809 /* If port is closing, signal caller to try again */
2810 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2811 if (info->flags & ASYNC_CLOSING)
2812 interruptible_sleep_on(&info->close_wait);
2813 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2814 -EAGAIN : -ERESTARTSYS);
2815 goto cleanup;
2816 }
2817
2818 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2819
2820 spin_lock_irqsave(&info->netlock, flags);
2821 if (info->netcount) {
2822 retval = -EBUSY;
2823 spin_unlock_irqrestore(&info->netlock, flags);
2824 goto cleanup;
2825 }
2826 info->count++;
2827 spin_unlock_irqrestore(&info->netlock, flags);
2828
2829 if (info->count == 1) {
2830 /* 1st open on this device, init hardware */
2831 retval = startup(info);
2832 if (retval < 0)
2833 goto cleanup;
2834 }
2835
2836 retval = block_til_ready(tty, filp, info);
2837 if (retval) {
2838 if (debug_level >= DEBUG_LEVEL_INFO)
2839 printk("%s(%d):block_til_ready(%s) returned %d\n",
2840 __FILE__,__LINE__, info->device_name, retval);
2841 goto cleanup;
2842 }
2843
2844 if (debug_level >= DEBUG_LEVEL_INFO)
2845 printk("%s(%d):mgslpc_open(%s) success\n",
2846 __FILE__,__LINE__, info->device_name);
2847 retval = 0;
2848
2849cleanup:
2850 if (retval) {
2851 if (tty->count == 1)
2852 info->tty = NULL; /* tty layer will release tty struct */
2853 if(info->count)
2854 info->count--;
2855 }
2856
2857 return retval;
2858}
2859
2860/*
2861 * /proc fs routines....
2862 */
2863
2864static inline int line_info(char *buf, MGSLPC_INFO *info)
2865{
2866 char stat_buf[30];
2867 int ret;
2868 unsigned long flags;
2869
2870 ret = sprintf(buf, "%s:io:%04X irq:%d",
2871 info->device_name, info->io_base, info->irq_level);
2872
2873 /* output current serial signal states */
2874 spin_lock_irqsave(&info->lock,flags);
2875 get_signals(info);
2876 spin_unlock_irqrestore(&info->lock,flags);
2877
2878 stat_buf[0] = 0;
2879 stat_buf[1] = 0;
2880 if (info->serial_signals & SerialSignal_RTS)
2881 strcat(stat_buf, "|RTS");
2882 if (info->serial_signals & SerialSignal_CTS)
2883 strcat(stat_buf, "|CTS");
2884 if (info->serial_signals & SerialSignal_DTR)
2885 strcat(stat_buf, "|DTR");
2886 if (info->serial_signals & SerialSignal_DSR)
2887 strcat(stat_buf, "|DSR");
2888 if (info->serial_signals & SerialSignal_DCD)
2889 strcat(stat_buf, "|CD");
2890 if (info->serial_signals & SerialSignal_RI)
2891 strcat(stat_buf, "|RI");
2892
2893 if (info->params.mode == MGSL_MODE_HDLC) {
2894 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2895 info->icount.txok, info->icount.rxok);
2896 if (info->icount.txunder)
2897 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2898 if (info->icount.txabort)
2899 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2900 if (info->icount.rxshort)
2901 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2902 if (info->icount.rxlong)
2903 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2904 if (info->icount.rxover)
2905 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2906 if (info->icount.rxcrc)
2907 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2908 } else {
2909 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2910 info->icount.tx, info->icount.rx);
2911 if (info->icount.frame)
2912 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2913 if (info->icount.parity)
2914 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2915 if (info->icount.brk)
2916 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2917 if (info->icount.overrun)
2918 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2919 }
2920
2921 /* Append serial signal status to end */
2922 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2923
2924 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2925 info->tx_active,info->bh_requested,info->bh_running,
2926 info->pending_bh);
2927
2928 return ret;
2929}
2930
2931/* Called to print information about devices
2932 */
2933static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2934 int *eof, void *data)
2935{
2936 int len = 0, l;
2937 off_t begin = 0;
2938 MGSLPC_INFO *info;
2939
2940 len += sprintf(page, "synclink driver:%s\n", driver_version);
2941
2942 info = mgslpc_device_list;
2943 while( info ) {
2944 l = line_info(page + len, info);
2945 len += l;
2946 if (len+begin > off+count)
2947 goto done;
2948 if (len+begin < off) {
2949 begin += len;
2950 len = 0;
2951 }
2952 info = info->next_device;
2953 }
2954
2955 *eof = 1;
2956done:
2957 if (off >= len+begin)
2958 return 0;
2959 *start = page + (off-begin);
2960 return ((count < begin+len-off) ? count : begin+len-off);
2961}
2962
2963int rx_alloc_buffers(MGSLPC_INFO *info)
2964{
2965 /* each buffer has header and data */
2966 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2967
2968 /* calculate total allocation size for 8 buffers */
2969 info->rx_buf_total_size = info->rx_buf_size * 8;
2970
2971 /* limit total allocated memory */
2972 if (info->rx_buf_total_size > 0x10000)
2973 info->rx_buf_total_size = 0x10000;
2974
2975 /* calculate number of buffers */
2976 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2977
2978 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2979 if (info->rx_buf == NULL)
2980 return -ENOMEM;
2981
2982 rx_reset_buffers(info);
2983 return 0;
2984}
2985
2986void rx_free_buffers(MGSLPC_INFO *info)
2987{
Jesper Juhl735d5662005-11-07 01:01:29 -08002988 kfree(info->rx_buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002989 info->rx_buf = NULL;
2990}
2991
2992int claim_resources(MGSLPC_INFO *info)
2993{
2994 if (rx_alloc_buffers(info) < 0 ) {
2995 printk( "Cant allocate rx buffer %s\n", info->device_name);
2996 release_resources(info);
2997 return -ENODEV;
2998 }
2999 return 0;
3000}
3001
3002void release_resources(MGSLPC_INFO *info)
3003{
3004 if (debug_level >= DEBUG_LEVEL_INFO)
3005 printk("release_resources(%s)\n", info->device_name);
3006 rx_free_buffers(info);
3007}
3008
3009/* Add the specified device instance data structure to the
3010 * global linked list of devices and increment the device count.
3011 *
3012 * Arguments: info pointer to device instance data
3013 */
3014void mgslpc_add_device(MGSLPC_INFO *info)
3015{
3016 info->next_device = NULL;
3017 info->line = mgslpc_device_count;
3018 sprintf(info->device_name,"ttySLP%d",info->line);
3019
3020 if (info->line < MAX_DEVICE_COUNT) {
3021 if (maxframe[info->line])
3022 info->max_frame_size = maxframe[info->line];
3023 info->dosyncppp = dosyncppp[info->line];
3024 }
3025
3026 mgslpc_device_count++;
3027
3028 if (!mgslpc_device_list)
3029 mgslpc_device_list = info;
3030 else {
3031 MGSLPC_INFO *current_dev = mgslpc_device_list;
3032 while( current_dev->next_device )
3033 current_dev = current_dev->next_device;
3034 current_dev->next_device = info;
3035 }
3036
3037 if (info->max_frame_size < 4096)
3038 info->max_frame_size = 4096;
3039 else if (info->max_frame_size > 65535)
3040 info->max_frame_size = 65535;
3041
3042 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
3043 info->device_name, info->io_base, info->irq_level);
3044
3045#ifdef CONFIG_HDLC
3046 hdlcdev_init(info);
3047#endif
3048}
3049
3050void mgslpc_remove_device(MGSLPC_INFO *remove_info)
3051{
3052 MGSLPC_INFO *info = mgslpc_device_list;
3053 MGSLPC_INFO *last = NULL;
3054
3055 while(info) {
3056 if (info == remove_info) {
3057 if (last)
3058 last->next_device = info->next_device;
3059 else
3060 mgslpc_device_list = info->next_device;
3061#ifdef CONFIG_HDLC
3062 hdlcdev_exit(info);
3063#endif
3064 release_resources(info);
3065 kfree(info);
3066 mgslpc_device_count--;
3067 return;
3068 }
3069 last = info;
3070 info = info->next_device;
3071 }
3072}
3073
Dominik Brodowski4af48c82005-06-27 16:28:42 -07003074static struct pcmcia_device_id mgslpc_ids[] = {
3075 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
3076 PCMCIA_DEVICE_NULL
3077};
3078MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
3079
Linus Torvalds1da177e2005-04-16 15:20:36 -07003080static struct pcmcia_driver mgslpc_driver = {
3081 .owner = THIS_MODULE,
3082 .drv = {
3083 .name = "synclink_cs",
3084 },
3085 .attach = mgslpc_attach,
Dominik Brodowski1e212f32005-07-07 17:59:00 -07003086 .event = mgslpc_event,
Dominik Brodowskicc3b4862005-11-14 21:23:14 +01003087 .remove = mgslpc_detach,
Dominik Brodowski4af48c82005-06-27 16:28:42 -07003088 .id_table = mgslpc_ids,
Dominik Brodowski98e4c282005-11-14 21:21:18 +01003089 .suspend = mgslpc_suspend,
3090 .resume = mgslpc_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003091};
3092
3093static struct tty_operations mgslpc_ops = {
3094 .open = mgslpc_open,
3095 .close = mgslpc_close,
3096 .write = mgslpc_write,
3097 .put_char = mgslpc_put_char,
3098 .flush_chars = mgslpc_flush_chars,
3099 .write_room = mgslpc_write_room,
3100 .chars_in_buffer = mgslpc_chars_in_buffer,
3101 .flush_buffer = mgslpc_flush_buffer,
3102 .ioctl = mgslpc_ioctl,
3103 .throttle = mgslpc_throttle,
3104 .unthrottle = mgslpc_unthrottle,
3105 .send_xchar = mgslpc_send_xchar,
3106 .break_ctl = mgslpc_break,
3107 .wait_until_sent = mgslpc_wait_until_sent,
3108 .read_proc = mgslpc_read_proc,
3109 .set_termios = mgslpc_set_termios,
3110 .stop = tx_pause,
3111 .start = tx_release,
3112 .hangup = mgslpc_hangup,
3113 .tiocmget = tiocmget,
3114 .tiocmset = tiocmset,
3115};
3116
3117static void synclink_cs_cleanup(void)
3118{
3119 int rc;
3120
3121 printk("Unloading %s: version %s\n", driver_name, driver_version);
3122
3123 while(mgslpc_device_list)
3124 mgslpc_remove_device(mgslpc_device_list);
3125
3126 if (serial_driver) {
3127 if ((rc = tty_unregister_driver(serial_driver)))
3128 printk("%s(%d) failed to unregister tty driver err=%d\n",
3129 __FILE__,__LINE__,rc);
3130 put_tty_driver(serial_driver);
3131 }
3132
3133 pcmcia_unregister_driver(&mgslpc_driver);
3134 BUG_ON(dev_list != NULL);
3135}
3136
3137static int __init synclink_cs_init(void)
3138{
3139 int rc;
3140
3141 if (break_on_load) {
3142 mgslpc_get_text_ptr();
3143 BREAKPOINT();
3144 }
3145
3146 printk("%s %s\n", driver_name, driver_version);
3147
3148 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3149 return rc;
3150
3151 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3152 if (!serial_driver) {
3153 rc = -ENOMEM;
3154 goto error;
3155 }
3156
3157 /* Initialize the tty_driver structure */
3158
3159 serial_driver->owner = THIS_MODULE;
3160 serial_driver->driver_name = "synclink_cs";
3161 serial_driver->name = "ttySLP";
3162 serial_driver->major = ttymajor;
3163 serial_driver->minor_start = 64;
3164 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3165 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3166 serial_driver->init_termios = tty_std_termios;
3167 serial_driver->init_termios.c_cflag =
3168 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3169 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3170 tty_set_operations(serial_driver, &mgslpc_ops);
3171
3172 if ((rc = tty_register_driver(serial_driver)) < 0) {
3173 printk("%s(%d):Couldn't register serial driver\n",
3174 __FILE__,__LINE__);
3175 put_tty_driver(serial_driver);
3176 serial_driver = NULL;
3177 goto error;
3178 }
3179
3180 printk("%s %s, tty major#%d\n",
3181 driver_name, driver_version,
3182 serial_driver->major);
3183
3184 return 0;
3185
3186error:
3187 synclink_cs_cleanup();
3188 return rc;
3189}
3190
3191static void __exit synclink_cs_exit(void)
3192{
3193 synclink_cs_cleanup();
3194}
3195
3196module_init(synclink_cs_init);
3197module_exit(synclink_cs_exit);
3198
3199static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3200{
3201 unsigned int M, N;
3202 unsigned char val;
3203
3204 /* note:standard BRG mode is broken in V3.2 chip
3205 * so enhanced mode is always used
3206 */
3207
3208 if (rate) {
3209 N = 3686400 / rate;
3210 if (!N)
3211 N = 1;
3212 N >>= 1;
3213 for (M = 1; N > 64 && M < 16; M++)
3214 N >>= 1;
3215 N--;
3216
3217 /* BGR[5..0] = N
3218 * BGR[9..6] = M
3219 * BGR[7..0] contained in BGR register
3220 * BGR[9..8] contained in CCR2[7..6]
3221 * divisor = (N+1)*2^M
3222 *
3223 * Note: M *must* not be zero (causes asymetric duty cycle)
3224 */
3225 write_reg(info, (unsigned char) (channel + BGR),
3226 (unsigned char) ((M << 6) + N));
3227 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3228 val |= ((M << 4) & 0xc0);
3229 write_reg(info, (unsigned char) (channel + CCR2), val);
3230 }
3231}
3232
3233/* Enabled the AUX clock output at the specified frequency.
3234 */
3235static void enable_auxclk(MGSLPC_INFO *info)
3236{
3237 unsigned char val;
3238
3239 /* MODE
3240 *
3241 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3242 * 05 ADM Address Mode, 0 = no addr recognition
3243 * 04 TMD Timer Mode, 0 = external
3244 * 03 RAC Receiver Active, 0 = inactive
3245 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3246 * 01 TRS Timer Resolution, 1=512
3247 * 00 TLP Test Loop, 0 = no loop
3248 *
3249 * 1000 0010
3250 */
3251 val = 0x82;
3252
3253 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3254 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3255 val |= BIT2;
3256 write_reg(info, CHB + MODE, val);
3257
3258 /* CCR0
3259 *
3260 * 07 PU Power Up, 1=active, 0=power down
3261 * 06 MCE Master Clock Enable, 1=enabled
3262 * 05 Reserved, 0
3263 * 04..02 SC[2..0] Encoding
3264 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3265 *
3266 * 11000000
3267 */
3268 write_reg(info, CHB + CCR0, 0xc0);
3269
3270 /* CCR1
3271 *
3272 * 07 SFLG Shared Flag, 0 = disable shared flags
3273 * 06 GALP Go Active On Loop, 0 = not used
3274 * 05 GLP Go On Loop, 0 = not used
3275 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3276 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3277 * 02..00 CM[2..0] Clock Mode
3278 *
3279 * 0001 0111
3280 */
3281 write_reg(info, CHB + CCR1, 0x17);
3282
3283 /* CCR2 (Channel B)
3284 *
3285 * 07..06 BGR[9..8] Baud rate bits 9..8
3286 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3287 * 04 SSEL Clock source select, 1=submode b
3288 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3289 * 02 RWX Read/Write Exchange 0=disabled
3290 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3291 * 00 DIV, data inversion 0=disabled, 1=enabled
3292 *
3293 * 0011 1000
3294 */
3295 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3296 write_reg(info, CHB + CCR2, 0x38);
3297 else
3298 write_reg(info, CHB + CCR2, 0x30);
3299
3300 /* CCR4
3301 *
3302 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3303 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3304 * 05 TST1 Test Pin, 0=normal operation
3305 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3306 * 03..02 Reserved, must be 0
3307 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3308 *
3309 * 0101 0000
3310 */
3311 write_reg(info, CHB + CCR4, 0x50);
3312
3313 /* if auxclk not enabled, set internal BRG so
3314 * CTS transitions can be detected (requires TxC)
3315 */
3316 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3317 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3318 else
3319 mgslpc_set_rate(info, CHB, 921600);
3320}
3321
3322static void loopback_enable(MGSLPC_INFO *info)
3323{
3324 unsigned char val;
3325
3326 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3327 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3328 write_reg(info, CHA + CCR1, val);
3329
3330 /* CCR2:04 SSEL Clock source select, 1=submode b */
3331 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3332 write_reg(info, CHA + CCR2, val);
3333
3334 /* set LinkSpeed if available, otherwise default to 2Mbps */
3335 if (info->params.clock_speed)
3336 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3337 else
3338 mgslpc_set_rate(info, CHA, 1843200);
3339
3340 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3341 val = read_reg(info, CHA + MODE) | BIT0;
3342 write_reg(info, CHA + MODE, val);
3343}
3344
3345void hdlc_mode(MGSLPC_INFO *info)
3346{
3347 unsigned char val;
3348 unsigned char clkmode, clksubmode;
3349
3350 /* disable all interrupts */
3351 irq_disable(info, CHA, 0xffff);
3352 irq_disable(info, CHB, 0xffff);
3353 port_irq_disable(info, 0xff);
3354
3355 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3356 clkmode = clksubmode = 0;
3357 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3358 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3359 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3360 clkmode = 7;
3361 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3362 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3363 /* clock mode 7b, rcv = BRG, xmt = BRG */
3364 clkmode = 7;
3365 clksubmode = 1;
3366 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3367 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3368 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3369 clkmode = 6;
3370 clksubmode = 1;
3371 } else {
3372 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3373 clkmode = 6;
3374 }
3375 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3376 /* clock mode 0b, rcv = RxC, xmt = BRG */
3377 clksubmode = 1;
3378 }
3379
3380 /* MODE
3381 *
3382 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3383 * 05 ADM Address Mode, 0 = no addr recognition
3384 * 04 TMD Timer Mode, 0 = external
3385 * 03 RAC Receiver Active, 0 = inactive
3386 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3387 * 01 TRS Timer Resolution, 1=512
3388 * 00 TLP Test Loop, 0 = no loop
3389 *
3390 * 1000 0010
3391 */
3392 val = 0x82;
3393 if (info->params.loopback)
3394 val |= BIT0;
3395
3396 /* preserve RTS state */
3397 if (info->serial_signals & SerialSignal_RTS)
3398 val |= BIT2;
3399 write_reg(info, CHA + MODE, val);
3400
3401 /* CCR0
3402 *
3403 * 07 PU Power Up, 1=active, 0=power down
3404 * 06 MCE Master Clock Enable, 1=enabled
3405 * 05 Reserved, 0
3406 * 04..02 SC[2..0] Encoding
3407 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3408 *
3409 * 11000000
3410 */
3411 val = 0xc0;
3412 switch (info->params.encoding)
3413 {
3414 case HDLC_ENCODING_NRZI:
3415 val |= BIT3;
3416 break;
3417 case HDLC_ENCODING_BIPHASE_SPACE:
3418 val |= BIT4;
3419 break; // FM0
3420 case HDLC_ENCODING_BIPHASE_MARK:
3421 val |= BIT4 + BIT2;
3422 break; // FM1
3423 case HDLC_ENCODING_BIPHASE_LEVEL:
3424 val |= BIT4 + BIT3;
3425 break; // Manchester
3426 }
3427 write_reg(info, CHA + CCR0, val);
3428
3429 /* CCR1
3430 *
3431 * 07 SFLG Shared Flag, 0 = disable shared flags
3432 * 06 GALP Go Active On Loop, 0 = not used
3433 * 05 GLP Go On Loop, 0 = not used
3434 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3435 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3436 * 02..00 CM[2..0] Clock Mode
3437 *
3438 * 0001 0000
3439 */
3440 val = 0x10 + clkmode;
3441 write_reg(info, CHA + CCR1, val);
3442
3443 /* CCR2
3444 *
3445 * 07..06 BGR[9..8] Baud rate bits 9..8
3446 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3447 * 04 SSEL Clock source select, 1=submode b
3448 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3449 * 02 RWX Read/Write Exchange 0=disabled
3450 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3451 * 00 DIV, data inversion 0=disabled, 1=enabled
3452 *
3453 * 0000 0000
3454 */
3455 val = 0x00;
3456 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3457 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3458 val |= BIT5;
3459 if (clksubmode)
3460 val |= BIT4;
3461 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3462 val |= BIT1;
3463 if (info->params.encoding == HDLC_ENCODING_NRZB)
3464 val |= BIT0;
3465 write_reg(info, CHA + CCR2, val);
3466
3467 /* CCR3
3468 *
3469 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3470 * 05 EPT Enable preamble transmission, 1=enabled
3471 * 04 RADD Receive address pushed to FIFO, 0=disabled
3472 * 03 CRL CRC Reset Level, 0=FFFF
3473 * 02 RCRC Rx CRC 0=On 1=Off
3474 * 01 TCRC Tx CRC 0=On 1=Off
3475 * 00 PSD DPLL Phase Shift Disable
3476 *
3477 * 0000 0000
3478 */
3479 val = 0x00;
3480 if (info->params.crc_type == HDLC_CRC_NONE)
3481 val |= BIT2 + BIT1;
3482 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3483 val |= BIT5;
3484 switch (info->params.preamble_length)
3485 {
3486 case HDLC_PREAMBLE_LENGTH_16BITS:
3487 val |= BIT6;
3488 break;
3489 case HDLC_PREAMBLE_LENGTH_32BITS:
3490 val |= BIT6;
3491 break;
3492 case HDLC_PREAMBLE_LENGTH_64BITS:
3493 val |= BIT7 + BIT6;
3494 break;
3495 }
3496 write_reg(info, CHA + CCR3, val);
3497
3498 /* PRE - Preamble pattern */
3499 val = 0;
3500 switch (info->params.preamble)
3501 {
3502 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3503 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3504 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3505 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3506 }
3507 write_reg(info, CHA + PRE, val);
3508
3509 /* CCR4
3510 *
3511 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3512 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3513 * 05 TST1 Test Pin, 0=normal operation
3514 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3515 * 03..02 Reserved, must be 0
3516 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3517 *
3518 * 0101 0000
3519 */
3520 val = 0x50;
3521 write_reg(info, CHA + CCR4, val);
3522 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3523 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3524 else
3525 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3526
3527 /* RLCR Receive length check register
3528 *
3529 * 7 1=enable receive length check
3530 * 6..0 Max frame length = (RL + 1) * 32
3531 */
3532 write_reg(info, CHA + RLCR, 0);
3533
3534 /* XBCH Transmit Byte Count High
3535 *
3536 * 07 DMA mode, 0 = interrupt driven
3537 * 06 NRM, 0=ABM (ignored)
3538 * 05 CAS Carrier Auto Start
3539 * 04 XC Transmit Continuously (ignored)
3540 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3541 *
3542 * 0000 0000
3543 */
3544 val = 0x00;
3545 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3546 val |= BIT5;
3547 write_reg(info, CHA + XBCH, val);
3548 enable_auxclk(info);
3549 if (info->params.loopback || info->testing_irq)
3550 loopback_enable(info);
3551 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3552 {
3553 irq_enable(info, CHB, IRQ_CTS);
3554 /* PVR[3] 1=AUTO CTS active */
3555 set_reg_bits(info, CHA + PVR, BIT3);
3556 } else
3557 clear_reg_bits(info, CHA + PVR, BIT3);
3558
3559 irq_enable(info, CHA,
3560 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3561 IRQ_UNDERRUN + IRQ_TXFIFO);
3562 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3563 wait_command_complete(info, CHA);
3564 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3565
3566 /* Master clock mode enabled above to allow reset commands
3567 * to complete even if no data clocks are present.
3568 *
3569 * Disable master clock mode for normal communications because
3570 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3571 * IRQ when in master clock mode.
3572 *
3573 * Leave master clock mode enabled for IRQ test because the
3574 * timer IRQ used by the test can only happen in master clock mode.
3575 */
3576 if (!info->testing_irq)
3577 clear_reg_bits(info, CHA + CCR0, BIT6);
3578
3579 tx_set_idle(info);
3580
3581 tx_stop(info);
3582 rx_stop(info);
3583}
3584
3585void rx_stop(MGSLPC_INFO *info)
3586{
3587 if (debug_level >= DEBUG_LEVEL_ISR)
3588 printk("%s(%d):rx_stop(%s)\n",
3589 __FILE__,__LINE__, info->device_name );
3590
3591 /* MODE:03 RAC Receiver Active, 0=inactive */
3592 clear_reg_bits(info, CHA + MODE, BIT3);
3593
3594 info->rx_enabled = 0;
3595 info->rx_overflow = 0;
3596}
3597
3598void rx_start(MGSLPC_INFO *info)
3599{
3600 if (debug_level >= DEBUG_LEVEL_ISR)
3601 printk("%s(%d):rx_start(%s)\n",
3602 __FILE__,__LINE__, info->device_name );
3603
3604 rx_reset_buffers(info);
3605 info->rx_enabled = 0;
3606 info->rx_overflow = 0;
3607
3608 /* MODE:03 RAC Receiver Active, 1=active */
3609 set_reg_bits(info, CHA + MODE, BIT3);
3610
3611 info->rx_enabled = 1;
3612}
3613
3614void tx_start(MGSLPC_INFO *info)
3615{
3616 if (debug_level >= DEBUG_LEVEL_ISR)
3617 printk("%s(%d):tx_start(%s)\n",
3618 __FILE__,__LINE__, info->device_name );
3619
3620 if (info->tx_count) {
3621 /* If auto RTS enabled and RTS is inactive, then assert */
3622 /* RTS and set a flag indicating that the driver should */
3623 /* negate RTS when the transmission completes. */
3624 info->drop_rts_on_tx_done = 0;
3625
3626 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3627 get_signals(info);
3628 if (!(info->serial_signals & SerialSignal_RTS)) {
3629 info->serial_signals |= SerialSignal_RTS;
3630 set_signals(info);
3631 info->drop_rts_on_tx_done = 1;
3632 }
3633 }
3634
3635 if (info->params.mode == MGSL_MODE_ASYNC) {
3636 if (!info->tx_active) {
3637 info->tx_active = 1;
3638 tx_ready(info);
3639 }
3640 } else {
3641 info->tx_active = 1;
3642 tx_ready(info);
3643 info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
3644 add_timer(&info->tx_timer);
3645 }
3646 }
3647
3648 if (!info->tx_enabled)
3649 info->tx_enabled = 1;
3650}
3651
3652void tx_stop(MGSLPC_INFO *info)
3653{
3654 if (debug_level >= DEBUG_LEVEL_ISR)
3655 printk("%s(%d):tx_stop(%s)\n",
3656 __FILE__,__LINE__, info->device_name );
3657
3658 del_timer(&info->tx_timer);
3659
3660 info->tx_enabled = 0;
3661 info->tx_active = 0;
3662}
3663
3664/* Reset the adapter to a known state and prepare it for further use.
3665 */
3666void reset_device(MGSLPC_INFO *info)
3667{
3668 /* power up both channels (set BIT7) */
3669 write_reg(info, CHA + CCR0, 0x80);
3670 write_reg(info, CHB + CCR0, 0x80);
3671 write_reg(info, CHA + MODE, 0);
3672 write_reg(info, CHB + MODE, 0);
3673
3674 /* disable all interrupts */
3675 irq_disable(info, CHA, 0xffff);
3676 irq_disable(info, CHB, 0xffff);
3677 port_irq_disable(info, 0xff);
3678
3679 /* PCR Port Configuration Register
3680 *
3681 * 07..04 DEC[3..0] Serial I/F select outputs
3682 * 03 output, 1=AUTO CTS control enabled
3683 * 02 RI Ring Indicator input 0=active
3684 * 01 DSR input 0=active
3685 * 00 DTR output 0=active
3686 *
3687 * 0000 0110
3688 */
3689 write_reg(info, PCR, 0x06);
3690
3691 /* PVR Port Value Register
3692 *
3693 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3694 * 03 AUTO CTS output 1=enabled
3695 * 02 RI Ring Indicator input
3696 * 01 DSR input
3697 * 00 DTR output (1=inactive)
3698 *
3699 * 0000 0001
3700 */
3701// write_reg(info, PVR, PVR_DTR);
3702
3703 /* IPC Interrupt Port Configuration
3704 *
3705 * 07 VIS 1=Masked interrupts visible
3706 * 06..05 Reserved, 0
3707 * 04..03 SLA Slave address, 00 ignored
3708 * 02 CASM Cascading Mode, 1=daisy chain
3709 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3710 *
3711 * 0000 0101
3712 */
3713 write_reg(info, IPC, 0x05);
3714}
3715
3716void async_mode(MGSLPC_INFO *info)
3717{
3718 unsigned char val;
3719
3720 /* disable all interrupts */
3721 irq_disable(info, CHA, 0xffff);
3722 irq_disable(info, CHB, 0xffff);
3723 port_irq_disable(info, 0xff);
3724
3725 /* MODE
3726 *
3727 * 07 Reserved, 0
3728 * 06 FRTS RTS State, 0=active
3729 * 05 FCTS Flow Control on CTS
3730 * 04 FLON Flow Control Enable
3731 * 03 RAC Receiver Active, 0 = inactive
3732 * 02 RTS 0=Auto RTS, 1=manual RTS
3733 * 01 TRS Timer Resolution, 1=512
3734 * 00 TLP Test Loop, 0 = no loop
3735 *
3736 * 0000 0110
3737 */
3738 val = 0x06;
3739 if (info->params.loopback)
3740 val |= BIT0;
3741
3742 /* preserve RTS state */
3743 if (!(info->serial_signals & SerialSignal_RTS))
3744 val |= BIT6;
3745 write_reg(info, CHA + MODE, val);
3746
3747 /* CCR0
3748 *
3749 * 07 PU Power Up, 1=active, 0=power down
3750 * 06 MCE Master Clock Enable, 1=enabled
3751 * 05 Reserved, 0
3752 * 04..02 SC[2..0] Encoding, 000=NRZ
3753 * 01..00 SM[1..0] Serial Mode, 11=Async
3754 *
3755 * 1000 0011
3756 */
3757 write_reg(info, CHA + CCR0, 0x83);
3758
3759 /* CCR1
3760 *
3761 * 07..05 Reserved, 0
3762 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3763 * 03 BCR Bit Clock Rate, 1=16x
3764 * 02..00 CM[2..0] Clock Mode, 111=BRG
3765 *
3766 * 0001 1111
3767 */
3768 write_reg(info, CHA + CCR1, 0x1f);
3769
3770 /* CCR2 (channel A)
3771 *
3772 * 07..06 BGR[9..8] Baud rate bits 9..8
3773 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3774 * 04 SSEL Clock source select, 1=submode b
3775 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3776 * 02 RWX Read/Write Exchange 0=disabled
3777 * 01 Reserved, 0
3778 * 00 DIV, data inversion 0=disabled, 1=enabled
3779 *
3780 * 0001 0000
3781 */
3782 write_reg(info, CHA + CCR2, 0x10);
3783
3784 /* CCR3
3785 *
3786 * 07..01 Reserved, 0
3787 * 00 PSD DPLL Phase Shift Disable
3788 *
3789 * 0000 0000
3790 */
3791 write_reg(info, CHA + CCR3, 0);
3792
3793 /* CCR4
3794 *
3795 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3796 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3797 * 05 TST1 Test Pin, 0=normal operation
3798 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3799 * 03..00 Reserved, must be 0
3800 *
3801 * 0101 0000
3802 */
3803 write_reg(info, CHA + CCR4, 0x50);
3804 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3805
3806 /* DAFO Data Format
3807 *
3808 * 07 Reserved, 0
3809 * 06 XBRK transmit break, 0=normal operation
3810 * 05 Stop bits (0=1, 1=2)
3811 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3812 * 02 PAREN Parity Enable
3813 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3814 *
3815 */
3816 val = 0x00;
3817 if (info->params.data_bits != 8)
3818 val |= BIT0; /* 7 bits */
3819 if (info->params.stop_bits != 1)
3820 val |= BIT5;
3821 if (info->params.parity != ASYNC_PARITY_NONE)
3822 {
3823 val |= BIT2; /* Parity enable */
3824 if (info->params.parity == ASYNC_PARITY_ODD)
3825 val |= BIT3;
3826 else
3827 val |= BIT4;
3828 }
3829 write_reg(info, CHA + DAFO, val);
3830
3831 /* RFC Rx FIFO Control
3832 *
3833 * 07 Reserved, 0
3834 * 06 DPS, 1=parity bit not stored in data byte
3835 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3836 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3837 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3838 * 01 Reserved, 0
3839 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3840 *
3841 * 0101 1100
3842 */
3843 write_reg(info, CHA + RFC, 0x5c);
3844
3845 /* RLCR Receive length check register
3846 *
3847 * Max frame length = (RL + 1) * 32
3848 */
3849 write_reg(info, CHA + RLCR, 0);
3850
3851 /* XBCH Transmit Byte Count High
3852 *
3853 * 07 DMA mode, 0 = interrupt driven
3854 * 06 NRM, 0=ABM (ignored)
3855 * 05 CAS Carrier Auto Start
3856 * 04 XC Transmit Continuously (ignored)
3857 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3858 *
3859 * 0000 0000
3860 */
3861 val = 0x00;
3862 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3863 val |= BIT5;
3864 write_reg(info, CHA + XBCH, val);
3865 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3866 irq_enable(info, CHA, IRQ_CTS);
3867
3868 /* MODE:03 RAC Receiver Active, 1=active */
3869 set_reg_bits(info, CHA + MODE, BIT3);
3870 enable_auxclk(info);
3871 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3872 irq_enable(info, CHB, IRQ_CTS);
3873 /* PVR[3] 1=AUTO CTS active */
3874 set_reg_bits(info, CHA + PVR, BIT3);
3875 } else
3876 clear_reg_bits(info, CHA + PVR, BIT3);
3877 irq_enable(info, CHA,
3878 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3879 IRQ_ALLSENT + IRQ_TXFIFO);
3880 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3881 wait_command_complete(info, CHA);
3882 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3883}
3884
3885/* Set the HDLC idle mode for the transmitter.
3886 */
3887void tx_set_idle(MGSLPC_INFO *info)
3888{
3889 /* Note: ESCC2 only supports flags and one idle modes */
3890 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3891 set_reg_bits(info, CHA + CCR1, BIT3);
3892 else
3893 clear_reg_bits(info, CHA + CCR1, BIT3);
3894}
3895
3896/* get state of the V24 status (input) signals.
3897 */
3898void get_signals(MGSLPC_INFO *info)
3899{
3900 unsigned char status = 0;
3901
3902 /* preserve DTR and RTS */
3903 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3904
3905 if (read_reg(info, CHB + VSTR) & BIT7)
3906 info->serial_signals |= SerialSignal_DCD;
3907 if (read_reg(info, CHB + STAR) & BIT1)
3908 info->serial_signals |= SerialSignal_CTS;
3909
3910 status = read_reg(info, CHA + PVR);
3911 if (!(status & PVR_RI))
3912 info->serial_signals |= SerialSignal_RI;
3913 if (!(status & PVR_DSR))
3914 info->serial_signals |= SerialSignal_DSR;
3915}
3916
3917/* Set the state of DTR and RTS based on contents of
3918 * serial_signals member of device extension.
3919 */
3920void set_signals(MGSLPC_INFO *info)
3921{
3922 unsigned char val;
3923
3924 val = read_reg(info, CHA + MODE);
3925 if (info->params.mode == MGSL_MODE_ASYNC) {
3926 if (info->serial_signals & SerialSignal_RTS)
3927 val &= ~BIT6;
3928 else
3929 val |= BIT6;
3930 } else {
3931 if (info->serial_signals & SerialSignal_RTS)
3932 val |= BIT2;
3933 else
3934 val &= ~BIT2;
3935 }
3936 write_reg(info, CHA + MODE, val);
3937
3938 if (info->serial_signals & SerialSignal_DTR)
3939 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3940 else
3941 set_reg_bits(info, CHA + PVR, PVR_DTR);
3942}
3943
3944void rx_reset_buffers(MGSLPC_INFO *info)
3945{
3946 RXBUF *buf;
3947 int i;
3948
3949 info->rx_put = 0;
3950 info->rx_get = 0;
3951 info->rx_frame_count = 0;
3952 for (i=0 ; i < info->rx_buf_count ; i++) {
3953 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3954 buf->status = buf->count = 0;
3955 }
3956}
3957
3958/* Attempt to return a received HDLC frame
3959 * Only frames received without errors are returned.
3960 *
3961 * Returns 1 if frame returned, otherwise 0
3962 */
3963int rx_get_frame(MGSLPC_INFO *info)
3964{
3965 unsigned short status;
3966 RXBUF *buf;
3967 unsigned int framesize = 0;
3968 unsigned long flags;
3969 struct tty_struct *tty = info->tty;
3970 int return_frame = 0;
3971
3972 if (info->rx_frame_count == 0)
3973 return 0;
3974
3975 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3976
3977 status = buf->status;
3978
3979 /* 07 VFR 1=valid frame
3980 * 06 RDO 1=data overrun
3981 * 05 CRC 1=OK, 0=error
3982 * 04 RAB 1=frame aborted
3983 */
3984 if ((status & 0xf0) != 0xA0) {
3985 if (!(status & BIT7) || (status & BIT4))
3986 info->icount.rxabort++;
3987 else if (status & BIT6)
3988 info->icount.rxover++;
3989 else if (!(status & BIT5)) {
3990 info->icount.rxcrc++;
3991 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3992 return_frame = 1;
3993 }
3994 framesize = 0;
3995#ifdef CONFIG_HDLC
3996 {
3997 struct net_device_stats *stats = hdlc_stats(info->netdev);
3998 stats->rx_errors++;
3999 stats->rx_frame_errors++;
4000 }
4001#endif
4002 } else
4003 return_frame = 1;
4004
4005 if (return_frame)
4006 framesize = buf->count;
4007
4008 if (debug_level >= DEBUG_LEVEL_BH)
4009 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
4010 __FILE__,__LINE__,info->device_name,status,framesize);
4011
4012 if (debug_level >= DEBUG_LEVEL_DATA)
4013 trace_block(info, buf->data, framesize, 0);
4014
4015 if (framesize) {
4016 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
4017 framesize+1 > info->max_frame_size) ||
4018 framesize > info->max_frame_size)
4019 info->icount.rxlong++;
4020 else {
4021 if (status & BIT5)
4022 info->icount.rxok++;
4023
4024 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
4025 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
4026 ++framesize;
4027 }
4028
4029#ifdef CONFIG_HDLC
4030 if (info->netcount)
4031 hdlcdev_rx(info, buf->data, framesize);
4032 else
4033#endif
4034 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
4035 }
4036 }
4037
4038 spin_lock_irqsave(&info->lock,flags);
4039 buf->status = buf->count = 0;
4040 info->rx_frame_count--;
4041 info->rx_get++;
4042 if (info->rx_get >= info->rx_buf_count)
4043 info->rx_get = 0;
4044 spin_unlock_irqrestore(&info->lock,flags);
4045
4046 return 1;
4047}
4048
4049BOOLEAN register_test(MGSLPC_INFO *info)
4050{
4051 static unsigned char patterns[] =
4052 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
4053 static unsigned int count = sizeof(patterns) / sizeof(patterns[0]);
4054 unsigned int i;
4055 BOOLEAN rc = TRUE;
4056 unsigned long flags;
4057
4058 spin_lock_irqsave(&info->lock,flags);
4059 reset_device(info);
4060
4061 for (i = 0; i < count; i++) {
4062 write_reg(info, XAD1, patterns[i]);
4063 write_reg(info, XAD2, patterns[(i + 1) % count]);
4064 if ((read_reg(info, XAD1) != patterns[i]) ||
4065 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
4066 rc = FALSE;
4067 break;
4068 }
4069 }
4070
4071 spin_unlock_irqrestore(&info->lock,flags);
4072 return rc;
4073}
4074
4075BOOLEAN irq_test(MGSLPC_INFO *info)
4076{
4077 unsigned long end_time;
4078 unsigned long flags;
4079
4080 spin_lock_irqsave(&info->lock,flags);
4081 reset_device(info);
4082
4083 info->testing_irq = TRUE;
4084 hdlc_mode(info);
4085
4086 info->irq_occurred = FALSE;
4087
4088 /* init hdlc mode */
4089
4090 irq_enable(info, CHA, IRQ_TIMER);
4091 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
4092 issue_command(info, CHA, CMD_START_TIMER);
4093
4094 spin_unlock_irqrestore(&info->lock,flags);
4095
4096 end_time=100;
4097 while(end_time-- && !info->irq_occurred) {
4098 msleep_interruptible(10);
4099 }
4100
4101 info->testing_irq = FALSE;
4102
4103 spin_lock_irqsave(&info->lock,flags);
4104 reset_device(info);
4105 spin_unlock_irqrestore(&info->lock,flags);
4106
4107 return info->irq_occurred ? TRUE : FALSE;
4108}
4109
4110int adapter_test(MGSLPC_INFO *info)
4111{
4112 if (!register_test(info)) {
4113 info->init_error = DiagStatus_AddressFailure;
4114 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4115 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4116 return -ENODEV;
4117 }
4118
4119 if (!irq_test(info)) {
4120 info->init_error = DiagStatus_IrqFailure;
4121 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4122 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4123 return -ENODEV;
4124 }
4125
4126 if (debug_level >= DEBUG_LEVEL_INFO)
4127 printk("%s(%d):device %s passed diagnostics\n",
4128 __FILE__,__LINE__,info->device_name);
4129 return 0;
4130}
4131
4132void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4133{
4134 int i;
4135 int linecount;
4136 if (xmit)
4137 printk("%s tx data:\n",info->device_name);
4138 else
4139 printk("%s rx data:\n",info->device_name);
4140
4141 while(count) {
4142 if (count > 16)
4143 linecount = 16;
4144 else
4145 linecount = count;
4146
4147 for(i=0;i<linecount;i++)
4148 printk("%02X ",(unsigned char)data[i]);
4149 for(;i<17;i++)
4150 printk(" ");
4151 for(i=0;i<linecount;i++) {
4152 if (data[i]>=040 && data[i]<=0176)
4153 printk("%c",data[i]);
4154 else
4155 printk(".");
4156 }
4157 printk("\n");
4158
4159 data += linecount;
4160 count -= linecount;
4161 }
4162}
4163
4164/* HDLC frame time out
4165 * update stats and do tx completion processing
4166 */
4167void tx_timeout(unsigned long context)
4168{
4169 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4170 unsigned long flags;
4171
4172 if ( debug_level >= DEBUG_LEVEL_INFO )
4173 printk( "%s(%d):tx_timeout(%s)\n",
4174 __FILE__,__LINE__,info->device_name);
4175 if(info->tx_active &&
4176 info->params.mode == MGSL_MODE_HDLC) {
4177 info->icount.txtimeout++;
4178 }
4179 spin_lock_irqsave(&info->lock,flags);
4180 info->tx_active = 0;
4181 info->tx_count = info->tx_put = info->tx_get = 0;
4182
4183 spin_unlock_irqrestore(&info->lock,flags);
4184
4185#ifdef CONFIG_HDLC
4186 if (info->netcount)
4187 hdlcdev_tx_done(info);
4188 else
4189#endif
4190 bh_transmit(info);
4191}
4192
4193#ifdef CONFIG_HDLC
4194
4195/**
4196 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4197 * set encoding and frame check sequence (FCS) options
4198 *
4199 * dev pointer to network device structure
4200 * encoding serial encoding setting
4201 * parity FCS setting
4202 *
4203 * returns 0 if success, otherwise error code
4204 */
4205static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4206 unsigned short parity)
4207{
4208 MGSLPC_INFO *info = dev_to_port(dev);
4209 unsigned char new_encoding;
4210 unsigned short new_crctype;
4211
4212 /* return error if TTY interface open */
4213 if (info->count)
4214 return -EBUSY;
4215
4216 switch (encoding)
4217 {
4218 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4219 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4220 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4221 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4222 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4223 default: return -EINVAL;
4224 }
4225
4226 switch (parity)
4227 {
4228 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4229 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4230 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4231 default: return -EINVAL;
4232 }
4233
4234 info->params.encoding = new_encoding;
4235 info->params.crc_type = new_crctype;;
4236
4237 /* if network interface up, reprogram hardware */
4238 if (info->netcount)
4239 mgslpc_program_hw(info);
4240
4241 return 0;
4242}
4243
4244/**
4245 * called by generic HDLC layer to send frame
4246 *
4247 * skb socket buffer containing HDLC frame
4248 * dev pointer to network device structure
4249 *
4250 * returns 0 if success, otherwise error code
4251 */
4252static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4253{
4254 MGSLPC_INFO *info = dev_to_port(dev);
4255 struct net_device_stats *stats = hdlc_stats(dev);
4256 unsigned long flags;
4257
4258 if (debug_level >= DEBUG_LEVEL_INFO)
4259 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4260
4261 /* stop sending until this frame completes */
4262 netif_stop_queue(dev);
4263
4264 /* copy data to device buffers */
4265 memcpy(info->tx_buf, skb->data, skb->len);
4266 info->tx_get = 0;
4267 info->tx_put = info->tx_count = skb->len;
4268
4269 /* update network statistics */
4270 stats->tx_packets++;
4271 stats->tx_bytes += skb->len;
4272
4273 /* done with socket buffer, so free it */
4274 dev_kfree_skb(skb);
4275
4276 /* save start time for transmit timeout detection */
4277 dev->trans_start = jiffies;
4278
4279 /* start hardware transmitter if necessary */
4280 spin_lock_irqsave(&info->lock,flags);
4281 if (!info->tx_active)
4282 tx_start(info);
4283 spin_unlock_irqrestore(&info->lock,flags);
4284
4285 return 0;
4286}
4287
4288/**
4289 * called by network layer when interface enabled
4290 * claim resources and initialize hardware
4291 *
4292 * dev pointer to network device structure
4293 *
4294 * returns 0 if success, otherwise error code
4295 */
4296static int hdlcdev_open(struct net_device *dev)
4297{
4298 MGSLPC_INFO *info = dev_to_port(dev);
4299 int rc;
4300 unsigned long flags;
4301
4302 if (debug_level >= DEBUG_LEVEL_INFO)
4303 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4304
4305 /* generic HDLC layer open processing */
4306 if ((rc = hdlc_open(dev)))
4307 return rc;
4308
4309 /* arbitrate between network and tty opens */
4310 spin_lock_irqsave(&info->netlock, flags);
4311 if (info->count != 0 || info->netcount != 0) {
4312 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4313 spin_unlock_irqrestore(&info->netlock, flags);
4314 return -EBUSY;
4315 }
4316 info->netcount=1;
4317 spin_unlock_irqrestore(&info->netlock, flags);
4318
4319 /* claim resources and init adapter */
4320 if ((rc = startup(info)) != 0) {
4321 spin_lock_irqsave(&info->netlock, flags);
4322 info->netcount=0;
4323 spin_unlock_irqrestore(&info->netlock, flags);
4324 return rc;
4325 }
4326
4327 /* assert DTR and RTS, apply hardware settings */
4328 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4329 mgslpc_program_hw(info);
4330
4331 /* enable network layer transmit */
4332 dev->trans_start = jiffies;
4333 netif_start_queue(dev);
4334
4335 /* inform generic HDLC layer of current DCD status */
4336 spin_lock_irqsave(&info->lock, flags);
4337 get_signals(info);
4338 spin_unlock_irqrestore(&info->lock, flags);
4339 hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
4340
4341 return 0;
4342}
4343
4344/**
4345 * called by network layer when interface is disabled
4346 * shutdown hardware and release resources
4347 *
4348 * dev pointer to network device structure
4349 *
4350 * returns 0 if success, otherwise error code
4351 */
4352static int hdlcdev_close(struct net_device *dev)
4353{
4354 MGSLPC_INFO *info = dev_to_port(dev);
4355 unsigned long flags;
4356
4357 if (debug_level >= DEBUG_LEVEL_INFO)
4358 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4359
4360 netif_stop_queue(dev);
4361
4362 /* shutdown adapter and release resources */
4363 shutdown(info);
4364
4365 hdlc_close(dev);
4366
4367 spin_lock_irqsave(&info->netlock, flags);
4368 info->netcount=0;
4369 spin_unlock_irqrestore(&info->netlock, flags);
4370
4371 return 0;
4372}
4373
4374/**
4375 * called by network layer to process IOCTL call to network device
4376 *
4377 * dev pointer to network device structure
4378 * ifr pointer to network interface request structure
4379 * cmd IOCTL command code
4380 *
4381 * returns 0 if success, otherwise error code
4382 */
4383static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4384{
4385 const size_t size = sizeof(sync_serial_settings);
4386 sync_serial_settings new_line;
4387 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4388 MGSLPC_INFO *info = dev_to_port(dev);
4389 unsigned int flags;
4390
4391 if (debug_level >= DEBUG_LEVEL_INFO)
4392 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4393
4394 /* return error if TTY interface open */
4395 if (info->count)
4396 return -EBUSY;
4397
4398 if (cmd != SIOCWANDEV)
4399 return hdlc_ioctl(dev, ifr, cmd);
4400
4401 switch(ifr->ifr_settings.type) {
4402 case IF_GET_IFACE: /* return current sync_serial_settings */
4403
4404 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4405 if (ifr->ifr_settings.size < size) {
4406 ifr->ifr_settings.size = size; /* data size wanted */
4407 return -ENOBUFS;
4408 }
4409
4410 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4411 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4412 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4413 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4414
4415 switch (flags){
4416 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4417 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4418 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4419 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4420 default: new_line.clock_type = CLOCK_DEFAULT;
4421 }
4422
4423 new_line.clock_rate = info->params.clock_speed;
4424 new_line.loopback = info->params.loopback ? 1:0;
4425
4426 if (copy_to_user(line, &new_line, size))
4427 return -EFAULT;
4428 return 0;
4429
4430 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4431
4432 if(!capable(CAP_NET_ADMIN))
4433 return -EPERM;
4434 if (copy_from_user(&new_line, line, size))
4435 return -EFAULT;
4436
4437 switch (new_line.clock_type)
4438 {
4439 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4440 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4441 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4442 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4443 case CLOCK_DEFAULT: flags = info->params.flags &
4444 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4445 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4446 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4447 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4448 default: return -EINVAL;
4449 }
4450
4451 if (new_line.loopback != 0 && new_line.loopback != 1)
4452 return -EINVAL;
4453
4454 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4455 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4456 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4457 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4458 info->params.flags |= flags;
4459
4460 info->params.loopback = new_line.loopback;
4461
4462 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4463 info->params.clock_speed = new_line.clock_rate;
4464 else
4465 info->params.clock_speed = 0;
4466
4467 /* if network interface up, reprogram hardware */
4468 if (info->netcount)
4469 mgslpc_program_hw(info);
4470 return 0;
4471
4472 default:
4473 return hdlc_ioctl(dev, ifr, cmd);
4474 }
4475}
4476
4477/**
4478 * called by network layer when transmit timeout is detected
4479 *
4480 * dev pointer to network device structure
4481 */
4482static void hdlcdev_tx_timeout(struct net_device *dev)
4483{
4484 MGSLPC_INFO *info = dev_to_port(dev);
4485 struct net_device_stats *stats = hdlc_stats(dev);
4486 unsigned long flags;
4487
4488 if (debug_level >= DEBUG_LEVEL_INFO)
4489 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4490
4491 stats->tx_errors++;
4492 stats->tx_aborted_errors++;
4493
4494 spin_lock_irqsave(&info->lock,flags);
4495 tx_stop(info);
4496 spin_unlock_irqrestore(&info->lock,flags);
4497
4498 netif_wake_queue(dev);
4499}
4500
4501/**
4502 * called by device driver when transmit completes
4503 * reenable network layer transmit if stopped
4504 *
4505 * info pointer to device instance information
4506 */
4507static void hdlcdev_tx_done(MGSLPC_INFO *info)
4508{
4509 if (netif_queue_stopped(info->netdev))
4510 netif_wake_queue(info->netdev);
4511}
4512
4513/**
4514 * called by device driver when frame received
4515 * pass frame to network layer
4516 *
4517 * info pointer to device instance information
4518 * buf pointer to buffer contianing frame data
4519 * size count of data bytes in buf
4520 */
4521static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4522{
4523 struct sk_buff *skb = dev_alloc_skb(size);
4524 struct net_device *dev = info->netdev;
4525 struct net_device_stats *stats = hdlc_stats(dev);
4526
4527 if (debug_level >= DEBUG_LEVEL_INFO)
4528 printk("hdlcdev_rx(%s)\n",dev->name);
4529
4530 if (skb == NULL) {
4531 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4532 stats->rx_dropped++;
4533 return;
4534 }
4535
4536 memcpy(skb_put(skb, size),buf,size);
4537
4538 skb->protocol = hdlc_type_trans(skb, info->netdev);
4539
4540 stats->rx_packets++;
4541 stats->rx_bytes += size;
4542
4543 netif_rx(skb);
4544
4545 info->netdev->last_rx = jiffies;
4546}
4547
4548/**
4549 * called by device driver when adding device instance
4550 * do generic HDLC initialization
4551 *
4552 * info pointer to device instance information
4553 *
4554 * returns 0 if success, otherwise error code
4555 */
4556static int hdlcdev_init(MGSLPC_INFO *info)
4557{
4558 int rc;
4559 struct net_device *dev;
4560 hdlc_device *hdlc;
4561
4562 /* allocate and initialize network and HDLC layer objects */
4563
4564 if (!(dev = alloc_hdlcdev(info))) {
4565 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4566 return -ENOMEM;
4567 }
4568
4569 /* for network layer reporting purposes only */
4570 dev->base_addr = info->io_base;
4571 dev->irq = info->irq_level;
4572
4573 /* network layer callbacks and settings */
4574 dev->do_ioctl = hdlcdev_ioctl;
4575 dev->open = hdlcdev_open;
4576 dev->stop = hdlcdev_close;
4577 dev->tx_timeout = hdlcdev_tx_timeout;
4578 dev->watchdog_timeo = 10*HZ;
4579 dev->tx_queue_len = 50;
4580
4581 /* generic HDLC layer callbacks and settings */
4582 hdlc = dev_to_hdlc(dev);
4583 hdlc->attach = hdlcdev_attach;
4584 hdlc->xmit = hdlcdev_xmit;
4585
4586 /* register objects with HDLC layer */
4587 if ((rc = register_hdlc_device(dev))) {
4588 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4589 free_netdev(dev);
4590 return rc;
4591 }
4592
4593 info->netdev = dev;
4594 return 0;
4595}
4596
4597/**
4598 * called by device driver when removing device instance
4599 * do generic HDLC cleanup
4600 *
4601 * info pointer to device instance information
4602 */
4603static void hdlcdev_exit(MGSLPC_INFO *info)
4604{
4605 unregister_hdlc_device(info->netdev);
4606 free_netdev(info->netdev);
4607 info->netdev = NULL;
4608}
4609
4610#endif /* CONFIG_HDLC */
4611