Sascha Hauer | 54df526 | 2009-02-06 15:42:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009 Sascha Hauer, Pengutronix |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ |
| 18 | |
| 19 | #include <linux/types.h> |
| 20 | #include <linux/init.h> |
| 21 | |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/mtd/physmap.h> |
| 24 | #include <linux/mtd/plat-ram.h> |
| 25 | #include <linux/memory.h> |
| 26 | #include <linux/gpio.h> |
| 27 | #include <linux/smc911x.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/i2c.h> |
| 30 | #include <linux/i2c/at24.h> |
| 31 | |
| 32 | #include <asm/mach-types.h> |
| 33 | #include <asm/mach/arch.h> |
| 34 | #include <asm/mach/time.h> |
| 35 | #include <asm/mach/map.h> |
| 36 | |
| 37 | #include <mach/hardware.h> |
| 38 | #include <mach/common.h> |
| 39 | #include <mach/imx-uart.h> |
| 40 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE |
| 41 | #include <mach/i2c.h> |
| 42 | #endif |
| 43 | #include <mach/iomux-mx35.h> |
| 44 | #include <mach/ipu.h> |
| 45 | #include <mach/mx3fb.h> |
| 46 | |
| 47 | #include "devices.h" |
| 48 | |
| 49 | static const struct fb_videomode fb_modedb[] = { |
| 50 | { |
| 51 | /* 240x320 @ 60 Hz */ |
| 52 | .name = "Sharp-LQ035Q7", |
| 53 | .refresh = 60, |
| 54 | .xres = 240, |
| 55 | .yres = 320, |
| 56 | .pixclock = 185925, |
| 57 | .left_margin = 9, |
| 58 | .right_margin = 16, |
| 59 | .upper_margin = 7, |
| 60 | .lower_margin = 9, |
| 61 | .hsync_len = 1, |
| 62 | .vsync_len = 1, |
| 63 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN, |
| 64 | .vmode = FB_VMODE_NONINTERLACED, |
| 65 | .flag = 0, |
| 66 | }, { |
| 67 | /* 240x320 @ 60 Hz */ |
| 68 | .name = "TX090", |
| 69 | .refresh = 60, |
| 70 | .xres = 240, |
| 71 | .yres = 320, |
| 72 | .pixclock = 38255, |
| 73 | .left_margin = 144, |
| 74 | .right_margin = 0, |
| 75 | .upper_margin = 7, |
| 76 | .lower_margin = 40, |
| 77 | .hsync_len = 96, |
| 78 | .vsync_len = 1, |
| 79 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH, |
| 80 | .vmode = FB_VMODE_NONINTERLACED, |
| 81 | .flag = 0, |
| 82 | }, |
| 83 | }; |
| 84 | |
| 85 | static struct ipu_platform_data mx3_ipu_data = { |
| 86 | .irq_base = MXC_IPU_IRQ_START, |
| 87 | }; |
| 88 | |
| 89 | static struct mx3fb_platform_data mx3fb_pdata = { |
| 90 | .dma_dev = &mx3_ipu.dev, |
| 91 | .name = "Sharp-LQ035Q7", |
| 92 | .mode = fb_modedb, |
| 93 | .num_modes = ARRAY_SIZE(fb_modedb), |
| 94 | }; |
| 95 | |
| 96 | static struct physmap_flash_data pcm043_flash_data = { |
| 97 | .width = 2, |
| 98 | }; |
| 99 | |
| 100 | static struct resource pcm043_flash_resource = { |
| 101 | .start = 0xa0000000, |
| 102 | .end = 0xa1ffffff, |
| 103 | .flags = IORESOURCE_MEM, |
| 104 | }; |
| 105 | |
| 106 | static struct platform_device pcm043_flash = { |
| 107 | .name = "physmap-flash", |
| 108 | .id = 0, |
| 109 | .dev = { |
| 110 | .platform_data = &pcm043_flash_data, |
| 111 | }, |
| 112 | .resource = &pcm043_flash_resource, |
| 113 | .num_resources = 1, |
| 114 | }; |
| 115 | |
| 116 | static struct imxuart_platform_data uart_pdata = { |
| 117 | .flags = IMXUART_HAVE_RTSCTS, |
| 118 | }; |
| 119 | |
| 120 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE |
| 121 | static struct imxi2c_platform_data pcm043_i2c_1_data = { |
| 122 | .bitrate = 50000, |
| 123 | }; |
| 124 | |
| 125 | static struct at24_platform_data board_eeprom = { |
| 126 | .byte_len = 4096, |
| 127 | .page_size = 32, |
| 128 | .flags = AT24_FLAG_ADDR16, |
| 129 | }; |
| 130 | |
| 131 | static struct i2c_board_info pcm043_i2c_devices[] = { |
| 132 | { |
| 133 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ |
| 134 | .platform_data = &board_eeprom, |
| 135 | }, { |
| 136 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), |
| 137 | .type = "pcf8563", |
| 138 | } |
| 139 | }; |
| 140 | #endif |
| 141 | |
| 142 | static struct platform_device *devices[] __initdata = { |
| 143 | &pcm043_flash, |
| 144 | &mxc_fec_device, |
| 145 | }; |
| 146 | |
| 147 | static struct pad_desc pcm043_pads[] = { |
| 148 | /* UART1 */ |
| 149 | MX35_PAD_CTS1__UART1_CTS, |
| 150 | MX35_PAD_RTS1__UART1_RTS, |
| 151 | MX35_PAD_TXD1__UART1_TXD_MUX, |
| 152 | MX35_PAD_RXD1__UART1_RXD_MUX, |
| 153 | /* UART2 */ |
| 154 | MX35_PAD_CTS2__UART2_CTS, |
| 155 | MX35_PAD_RTS2__UART2_RTS, |
| 156 | MX35_PAD_TXD2__UART2_TXD_MUX, |
| 157 | MX35_PAD_RXD2__UART2_RXD_MUX, |
| 158 | /* FEC */ |
| 159 | MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, |
| 160 | MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, |
| 161 | MX35_PAD_FEC_RX_DV__FEC_RX_DV, |
| 162 | MX35_PAD_FEC_COL__FEC_COL, |
| 163 | MX35_PAD_FEC_RDATA0__FEC_RDATA_0, |
| 164 | MX35_PAD_FEC_TDATA0__FEC_TDATA_0, |
| 165 | MX35_PAD_FEC_TX_EN__FEC_TX_EN, |
| 166 | MX35_PAD_FEC_MDC__FEC_MDC, |
| 167 | MX35_PAD_FEC_MDIO__FEC_MDIO, |
| 168 | MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, |
| 169 | MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, |
| 170 | MX35_PAD_FEC_CRS__FEC_CRS, |
| 171 | MX35_PAD_FEC_RDATA1__FEC_RDATA_1, |
| 172 | MX35_PAD_FEC_TDATA1__FEC_TDATA_1, |
| 173 | MX35_PAD_FEC_RDATA2__FEC_RDATA_2, |
| 174 | MX35_PAD_FEC_TDATA2__FEC_TDATA_2, |
| 175 | MX35_PAD_FEC_RDATA3__FEC_RDATA_3, |
| 176 | MX35_PAD_FEC_TDATA3__FEC_TDATA_3, |
| 177 | /* I2C1 */ |
| 178 | MX35_PAD_I2C1_CLK__I2C1_SCL, |
| 179 | MX35_PAD_I2C1_DAT__I2C1_SDA, |
| 180 | /* Display */ |
| 181 | MX35_PAD_LD0__IPU_DISPB_DAT_0, |
| 182 | MX35_PAD_LD1__IPU_DISPB_DAT_1, |
| 183 | MX35_PAD_LD2__IPU_DISPB_DAT_2, |
| 184 | MX35_PAD_LD3__IPU_DISPB_DAT_3, |
| 185 | MX35_PAD_LD4__IPU_DISPB_DAT_4, |
| 186 | MX35_PAD_LD5__IPU_DISPB_DAT_5, |
| 187 | MX35_PAD_LD6__IPU_DISPB_DAT_6, |
| 188 | MX35_PAD_LD7__IPU_DISPB_DAT_7, |
| 189 | MX35_PAD_LD8__IPU_DISPB_DAT_8, |
| 190 | MX35_PAD_LD9__IPU_DISPB_DAT_9, |
| 191 | MX35_PAD_LD10__IPU_DISPB_DAT_10, |
| 192 | MX35_PAD_LD11__IPU_DISPB_DAT_11, |
| 193 | MX35_PAD_LD12__IPU_DISPB_DAT_12, |
| 194 | MX35_PAD_LD13__IPU_DISPB_DAT_13, |
| 195 | MX35_PAD_LD14__IPU_DISPB_DAT_14, |
| 196 | MX35_PAD_LD15__IPU_DISPB_DAT_15, |
| 197 | MX35_PAD_LD16__IPU_DISPB_DAT_16, |
| 198 | MX35_PAD_LD17__IPU_DISPB_DAT_17, |
| 199 | MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC, |
| 200 | MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK, |
| 201 | MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY, |
| 202 | MX35_PAD_CONTRAST__IPU_DISPB_CONTR, |
| 203 | MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, |
| 204 | MX35_PAD_D3_REV__IPU_DISPB_D3_REV, |
| 205 | MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, |
| 206 | MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL |
| 207 | }; |
| 208 | |
| 209 | /* |
| 210 | * Board specific initialization. |
| 211 | */ |
| 212 | static void __init mxc_board_init(void) |
| 213 | { |
| 214 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); |
| 215 | |
| 216 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 217 | |
| 218 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
| 219 | |
| 220 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
| 221 | |
| 222 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE |
| 223 | i2c_register_board_info(0, pcm043_i2c_devices, |
| 224 | ARRAY_SIZE(pcm043_i2c_devices)); |
| 225 | |
| 226 | mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data); |
| 227 | #endif |
| 228 | |
| 229 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); |
| 230 | mxc_register_device(&mx3_fb, &mx3fb_pdata); |
| 231 | } |
| 232 | |
| 233 | static void __init pcm043_timer_init(void) |
| 234 | { |
| 235 | mx35_clocks_init(); |
| 236 | } |
| 237 | |
| 238 | struct sys_timer pcm043_timer = { |
| 239 | .init = pcm043_timer_init, |
| 240 | }; |
| 241 | |
| 242 | MACHINE_START(PCM043, "Phytec Phycore pcm043") |
| 243 | /* Maintainer: Pengutronix */ |
| 244 | .phys_io = AIPS1_BASE_ADDR, |
| 245 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
| 246 | .boot_params = PHYS_OFFSET + 0x100, |
Sascha Hauer | cd4a05f | 2009-04-02 22:32:10 +0200 | [diff] [blame] | 247 | .map_io = mx35_map_io, |
Sascha Hauer | 54df526 | 2009-02-06 15:42:26 +0100 | [diff] [blame] | 248 | .init_irq = mxc_init_irq, |
| 249 | .init_machine = mxc_board_init, |
| 250 | .timer = &pcm043_timer, |
| 251 | MACHINE_END |
| 252 | |