| Fabio Estevam | 1553a1e | 2008-11-12 15:38:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. |
| 3 | */ |
| 4 | |
| 5 | /* |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__ |
| 12 | #define __ASM_ARCH_MXC_BOARD_MX31PDK_H__ |
| 13 | |
| Magnus Lilja | c133261 | 2009-04-14 22:00:06 +0200 | [diff] [blame] | 14 | /* mandatory for CONFIG_DEBUG_LL */ |
| Fabio Estevam | 1553a1e | 2008-11-12 15:38:39 +0100 | [diff] [blame] | 15 | |
| 16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
| 17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
| 18 | |
| Magnus Lilja | 135cad3 | 2009-05-17 20:18:08 +0200 | [diff] [blame] | 19 | /* Definitions for components on the Debug board */ |
| 20 | |
| 21 | /* Base address of CPLD controller on the Debug board */ |
| 22 | #define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR) |
| 23 | |
| 24 | /* LAN9217 ethernet base address */ |
| 25 | #define LAN9217_BASE_ADDR CS5_BASE_ADDR |
| 26 | |
| 27 | /* CPLD config and interrupt base address */ |
| 28 | #define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000) |
| 29 | |
| 30 | /* LED switchs */ |
| 31 | #define CPLD_LED_REG (CPLD_ADDR + 0x00) |
| 32 | /* buttons */ |
| 33 | #define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08) |
| 34 | /* status, interrupt */ |
| 35 | #define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10) |
| 36 | #define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38) |
| 37 | #define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20) |
| 38 | /* magic word for debug CPLD */ |
| 39 | #define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40) |
| 40 | #define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48) |
| 41 | /* CPLD code version */ |
| 42 | #define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50) |
| 43 | /* magic word for debug CPLD */ |
| 44 | #define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58) |
| 45 | /* module reset register */ |
| 46 | #define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60) |
| 47 | /* CPU ID and Personality ID */ |
| 48 | #define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68) |
| 49 | |
| 50 | /* CPLD IRQ line for external uart, external ethernet etc */ |
| 51 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) |
| 52 | |
| 53 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) |
| 54 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) |
| 55 | |
| 56 | #define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0) |
| 57 | #define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1) |
| 58 | #define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2) |
| 59 | #define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3) |
| 60 | #define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4) |
| 61 | |
| 62 | #define MXC_MAX_EXP_IO_LINES 16 |
| 63 | |
| Fabio Estevam | 1553a1e | 2008-11-12 15:38:39 +0100 | [diff] [blame] | 64 | #endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */ |