blob: 79c37577c916e17ad45a09151bf2feff28ec99b9 [file] [log] [blame]
Juergen Beiserteea643f2008-07-05 10:02:56 +02001/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
Ilya Yanok74bef9a2009-03-03 02:49:23 +03006 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
Juergen Beiserteea643f2008-07-05 10:02:56 +02007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/clk.h>
25#include <linux/io.h>
Ilya Yanok74bef9a2009-03-03 02:49:23 +030026#include <linux/err.h>
27#include <linux/delay.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020028
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/hardware.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020030#include <asm/proc-fns.h>
31#include <asm/system.h>
32
Ilya Yanok74bef9a2009-03-03 02:49:23 +030033#ifdef CONFIG_ARCH_MX1
34#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR)
35#define WDOG_WCR_ENABLE (1 << 0)
36#else
37#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR)
38#define WDOG_WCR_ENABLE (1 << 2)
39#endif
Juergen Beiserteea643f2008-07-05 10:02:56 +020040
41/*
42 * Reset the system. It is called by machine_restart().
43 */
Russell Kingbe093be2009-03-19 16:20:24 +000044void arch_reset(char mode, const char *cmd)
Juergen Beiserteea643f2008-07-05 10:02:56 +020045{
Ilya Yanok74bef9a2009-03-03 02:49:23 +030046 if (!cpu_is_mx1()) {
47 struct clk *clk;
Juergen Beiserteea643f2008-07-05 10:02:56 +020048
Ilya Yanok74bef9a2009-03-03 02:49:23 +030049 clk = clk_get_sys("imx-wdt.0", NULL);
50 if (!IS_ERR(clk))
51 clk_enable(clk);
Juergen Beiserteea643f2008-07-05 10:02:56 +020052 }
53
Juergen Beiserteea643f2008-07-05 10:02:56 +020054 /* Assert SRS signal */
Ilya Yanok74bef9a2009-03-03 02:49:23 +030055 __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG);
56
57 /* wait for reset to assert... */
58 mdelay(500);
59
60 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
61
62 /* delay to allow the serial port to show the message */
63 mdelay(50);
64
65 /* we'll take a jump through zero as a poor second */
66 cpu_reset(0);
Juergen Beiserteea643f2008-07-05 10:02:56 +020067}