blob: 40b0c087b5921384d46bf7f745cf93f2b391015b [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
Jerome Glisse771fe6b2009-06-05 14:42:42 +020026#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090027#include <linux/slab.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020028#include <linux/fb.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020029
30#include "drmP.h"
31#include "drm.h"
32#include "drm_crtc.h"
33#include "drm_crtc_helper.h"
34#include "radeon_drm.h"
35#include "radeon.h"
36
Dave Airlie785b93e2009-08-28 15:46:53 +100037#include "drm_fb_helper.h"
38
Dave Airlie6a9ee8a2010-02-01 15:38:10 +100039#include <linux/vga_switcheroo.h>
40
Dave Airlie38651672010-03-30 05:34:13 +000041/* object hierarchy -
42 this contains a helper + a radeon fb
43 the helper contains a pointer to radeon framebuffer baseclass.
44*/
Dave Airlie8be48d92010-03-30 05:34:14 +000045struct radeon_fbdev {
Dave Airlie785b93e2009-08-28 15:46:53 +100046 struct drm_fb_helper helper;
Dave Airlie38651672010-03-30 05:34:13 +000047 struct radeon_framebuffer rfb;
48 struct list_head fbdev_list;
49 struct radeon_device *rdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020050};
51
Jerome Glisse771fe6b2009-06-05 14:42:42 +020052static struct fb_ops radeonfb_ops = {
53 .owner = THIS_MODULE,
Michel Dänzerc88f9f02009-09-15 17:09:30 +020054 .fb_check_var = drm_fb_helper_check_var,
Dave Airlie785b93e2009-08-28 15:46:53 +100055 .fb_set_par = drm_fb_helper_set_par,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020056 .fb_fillrect = cfb_fillrect,
57 .fb_copyarea = cfb_copyarea,
58 .fb_imageblit = cfb_imageblit,
Dave Airlie785b93e2009-08-28 15:46:53 +100059 .fb_pan_display = drm_fb_helper_pan_display,
60 .fb_blank = drm_fb_helper_blank,
Dave Airlie068143d2009-10-05 09:58:02 +100061 .fb_setcmap = drm_fb_helper_setcmap,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020062};
63
Jerome Glisse771fe6b2009-06-05 14:42:42 +020064
Dave Airliee024e112009-06-24 09:48:08 +100065static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020066{
67 int aligned = width;
Dave Airliee024e112009-06-24 09:48:08 +100068 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020069 int pitch_mask = 0;
70
71 switch (bpp / 8) {
72 case 1:
73 pitch_mask = align_large ? 255 : 127;
74 break;
75 case 2:
76 pitch_mask = align_large ? 127 : 31;
77 break;
78 case 3:
79 case 4:
80 pitch_mask = align_large ? 63 : 15;
81 break;
82 }
83
84 aligned += pitch_mask;
85 aligned &= ~pitch_mask;
86 return aligned;
87}
88
Dave Airlie8be48d92010-03-30 05:34:14 +000089static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
Jerome Glisse771fe6b2009-06-05 14:42:42 +020090{
Dave Airlie8be48d92010-03-30 05:34:14 +000091 struct radeon_bo *rbo = gobj->driver_private;
92 int ret;
93
94 ret = radeon_bo_reserve(rbo, false);
95 if (likely(ret == 0)) {
96 radeon_bo_kunmap(rbo);
Dave Airlie29d08b32010-09-27 16:17:17 +100097 radeon_bo_unpin(rbo);
Dave Airlie8be48d92010-03-30 05:34:14 +000098 radeon_bo_unreserve(rbo);
99 }
100 drm_gem_object_unreference_unlocked(gobj);
101}
102
103static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
104 struct drm_mode_fb_cmd *mode_cmd,
105 struct drm_gem_object **gobj_p)
106{
107 struct radeon_device *rdev = rfbdev->rdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200108 struct drm_gem_object *gobj = NULL;
Jerome Glisse4c788672009-11-20 14:29:23 +0100109 struct radeon_bo *rbo = NULL;
Dave Airliee024e112009-06-24 09:48:08 +1000110 bool fb_tiled = false; /* useful for testing */
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200111 u32 tiling_flags = 0;
Dave Airlie8be48d92010-03-30 05:34:14 +0000112 int ret;
113 int aligned_size, size;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200114
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200115 /* need to align pitch with crtc limits */
Dave Airlie8be48d92010-03-30 05:34:14 +0000116 mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200117
Dave Airlie8be48d92010-03-30 05:34:14 +0000118 size = mode_cmd->pitch * mode_cmd->height;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200119 aligned_size = ALIGN(size, PAGE_SIZE);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200120 ret = radeon_gem_object_create(rdev, aligned_size, 0,
Dave Airlie8be48d92010-03-30 05:34:14 +0000121 RADEON_GEM_DOMAIN_VRAM,
Dave Airlie4dfe9472010-08-23 08:27:47 +1000122 false, true,
Dave Airlie8be48d92010-03-30 05:34:14 +0000123 &gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200124 if (ret) {
Dave Airlie8be48d92010-03-30 05:34:14 +0000125 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
126 aligned_size);
127 return -ENOMEM;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200128 }
Jerome Glisse4c788672009-11-20 14:29:23 +0100129 rbo = gobj->driver_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200130
Dave Airliee024e112009-06-24 09:48:08 +1000131 if (fb_tiled)
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200132 tiling_flags = RADEON_TILING_MACRO;
133
134#ifdef __BIG_ENDIAN
Dave Airlie8be48d92010-03-30 05:34:14 +0000135 switch (mode_cmd->bpp) {
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200136 case 32:
137 tiling_flags |= RADEON_TILING_SWAP_32BIT;
138 break;
139 case 16:
140 tiling_flags |= RADEON_TILING_SWAP_16BIT;
141 default:
142 break;
143 }
144#endif
145
Jerome Glisse4c788672009-11-20 14:29:23 +0100146 if (tiling_flags) {
147 ret = radeon_bo_set_tiling_flags(rbo,
Dave Airlie8be48d92010-03-30 05:34:14 +0000148 tiling_flags | RADEON_TILING_SURFACE,
149 mode_cmd->pitch);
Jerome Glisse4c788672009-11-20 14:29:23 +0100150 if (ret)
151 dev_err(rdev->dev, "FB failed to set tiling flags\n");
152 }
Dave Airlie8be48d92010-03-30 05:34:14 +0000153
Dave Airlie38651672010-03-30 05:34:13 +0000154
Jerome Glisse4c788672009-11-20 14:29:23 +0100155 ret = radeon_bo_reserve(rbo, false);
156 if (unlikely(ret != 0))
157 goto out_unref;
Dave Airlie8be48d92010-03-30 05:34:14 +0000158 ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL);
Jerome Glissef92e93e2009-06-22 18:15:58 +0200159 if (ret) {
Jerome Glisse4c788672009-11-20 14:29:23 +0100160 radeon_bo_unreserve(rbo);
161 goto out_unref;
162 }
163 if (fb_tiled)
164 radeon_bo_check_tiling(rbo, 0, 0);
Dave Airlie8be48d92010-03-30 05:34:14 +0000165 ret = radeon_bo_kmap(rbo, NULL);
Jerome Glisse4c788672009-11-20 14:29:23 +0100166 radeon_bo_unreserve(rbo);
167 if (ret) {
Jerome Glissef92e93e2009-06-22 18:15:58 +0200168 goto out_unref;
169 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200170
Dave Airlie8be48d92010-03-30 05:34:14 +0000171 *gobj_p = gobj;
172 return 0;
173out_unref:
174 radeonfb_destroy_pinned_object(gobj);
175 *gobj_p = NULL;
176 return ret;
177}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200178
Dave Airlie8be48d92010-03-30 05:34:14 +0000179static int radeonfb_create(struct radeon_fbdev *rfbdev,
180 struct drm_fb_helper_surface_size *sizes)
181{
182 struct radeon_device *rdev = rfbdev->rdev;
183 struct fb_info *info;
184 struct drm_framebuffer *fb = NULL;
185 struct drm_mode_fb_cmd mode_cmd;
186 struct drm_gem_object *gobj = NULL;
187 struct radeon_bo *rbo = NULL;
188 struct device *device = &rdev->pdev->dev;
189 int ret;
190 unsigned long tmp;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200191
Dave Airlie8be48d92010-03-30 05:34:14 +0000192 mode_cmd.width = sizes->surface_width;
193 mode_cmd.height = sizes->surface_height;
194
195 /* avivo can't scanout real 24bpp */
196 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
197 sizes->surface_bpp = 32;
198
199 mode_cmd.bpp = sizes->surface_bpp;
200 mode_cmd.depth = sizes->surface_depth;
201
202 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
203 rbo = gobj->driver_private;
204
205 /* okay we have an object now allocate the framebuffer */
206 info = framebuffer_alloc(0, device);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200207 if (info == NULL) {
208 ret = -ENOMEM;
209 goto out_unref;
210 }
Dave Airlie785b93e2009-08-28 15:46:53 +1000211
Dave Airlie8be48d92010-03-30 05:34:14 +0000212 info->par = rfbdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200213
Dave Airlie8be48d92010-03-30 05:34:14 +0000214 radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
215
Dave Airlie38651672010-03-30 05:34:13 +0000216 fb = &rfbdev->rfb.base;
217
218 /* setup helper */
219 rfbdev->helper.fb = fb;
220 rfbdev->helper.fbdev = info;
Dave Airlie38651672010-03-30 05:34:13 +0000221
Dave Airlie8be48d92010-03-30 05:34:14 +0000222 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
Dave Airliebf8e8282009-08-17 10:20:47 +1000223
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200224 strcpy(info->fix.id, "radeondrmfb");
Dave Airlie785b93e2009-08-28 15:46:53 +1000225
Dave Airlie068143d2009-10-05 09:58:02 +1000226 drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
Dave Airlie785b93e2009-08-28 15:46:53 +1000227
Jesse Barnes8fd4bd22010-06-23 12:56:12 -0700228 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200229 info->fbops = &radeonfb_ops;
Dave Airlie785b93e2009-08-28 15:46:53 +1000230
Dave Airlie8be48d92010-03-30 05:34:14 +0000231 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200232 info->fix.smem_start = rdev->mc.aper_base + tmp;
Dave Airlie8be48d92010-03-30 05:34:14 +0000233 info->fix.smem_len = radeon_bo_size(rbo);
234 info->screen_base = rbo->kptr;
235 info->screen_size = radeon_bo_size(rbo);
Dave Airlie785b93e2009-08-28 15:46:53 +1000236
Dave Airlie38651672010-03-30 05:34:13 +0000237 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
Dave Airlieed8f0d92009-07-29 17:07:38 +1000238
239 /* setup aperture base/size for vesafb takeover */
Marcin Slusarz1471ca92010-05-16 17:27:03 +0200240 info->apertures = alloc_apertures(1);
241 if (!info->apertures) {
242 ret = -ENOMEM;
243 goto out_unref;
244 }
245 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
246 info->apertures->ranges[0].size = rdev->mc.real_vram_size;
Dave Airlieed8f0d92009-07-29 17:07:38 +1000247
Michel Dänzer696d4df2009-06-23 16:12:53 +0200248 info->fix.mmio_start = 0;
249 info->fix.mmio_len = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200250 info->pixmap.size = 64*1024;
251 info->pixmap.buf_align = 8;
252 info->pixmap.access_align = 32;
253 info->pixmap.flags = FB_PIXMAP_SYSTEM;
254 info->pixmap.scan_align = 1;
Dave Airlie4abe3522010-03-30 05:34:18 +0000255
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200256 if (info->screen_base == NULL) {
257 ret = -ENOSPC;
258 goto out_unref;
259 }
Dave Airlie4abe3522010-03-30 05:34:18 +0000260
261 ret = fb_alloc_cmap(&info->cmap, 256, 0);
262 if (ret) {
263 ret = -ENOMEM;
264 goto out_unref;
265 }
266
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200267 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
268 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
Dave Airlie8be48d92010-03-30 05:34:14 +0000269 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200270 DRM_INFO("fb depth is %d\n", fb->depth);
271 DRM_INFO(" pitch is %d\n", fb->pitch);
272
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000273 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200274 return 0;
275
276out_unref:
Jerome Glisse4c788672009-11-20 14:29:23 +0100277 if (rbo) {
Dave Airlie8be48d92010-03-30 05:34:14 +0000278
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200279 }
Jerome Glissef92e93e2009-06-22 18:15:58 +0200280 if (fb && ret) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200281 drm_gem_object_unreference(gobj);
282 drm_framebuffer_cleanup(fb);
283 kfree(fb);
284 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200285 return ret;
286}
287
Dave Airlie8be48d92010-03-30 05:34:14 +0000288static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
289 struct drm_fb_helper_surface_size *sizes)
Dave Airlie38651672010-03-30 05:34:13 +0000290{
Dave Airlie8be48d92010-03-30 05:34:14 +0000291 struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
Dave Airlie38651672010-03-30 05:34:13 +0000292 int new_fb = 0;
293 int ret;
294
Dave Airlie8be48d92010-03-30 05:34:14 +0000295 if (!helper->fb) {
296 ret = radeonfb_create(rfbdev, sizes);
Dave Airlie38651672010-03-30 05:34:13 +0000297 if (ret)
298 return ret;
Dave Airlie38651672010-03-30 05:34:13 +0000299 new_fb = 1;
Dave Airlie38651672010-03-30 05:34:13 +0000300 }
Dave Airlie38651672010-03-30 05:34:13 +0000301 return new_fb;
302}
303
Dave Airlied50ba252009-09-23 14:44:08 +1000304static char *mode_option;
305int radeon_parse_options(char *options)
306{
307 char *this_opt;
308
309 if (!options || !*options)
310 return 0;
311
312 while ((this_opt = strsep(&options, ",")) != NULL) {
313 if (!*this_opt)
314 continue;
315 mode_option = this_opt;
316 }
317 return 0;
318}
319
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000320void radeon_fb_output_poll_changed(struct radeon_device *rdev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200321{
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000322 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
Dave Airlie5c4426a2010-03-30 05:34:17 +0000323}
324
Dave Airlie8be48d92010-03-30 05:34:14 +0000325static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200326{
327 struct fb_info *info;
Dave Airlie38651672010-03-30 05:34:13 +0000328 struct radeon_framebuffer *rfb = &rfbdev->rfb;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200329
Dave Airlie8be48d92010-03-30 05:34:14 +0000330 if (rfbdev->helper.fbdev) {
331 info = rfbdev->helper.fbdev;
Dave Airlie4abe3522010-03-30 05:34:18 +0000332
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200333 unregister_framebuffer(info);
Dave Airlie4abe3522010-03-30 05:34:18 +0000334 if (info->cmap.len)
335 fb_dealloc_cmap(&info->cmap);
Dave Airlie8be48d92010-03-30 05:34:14 +0000336 framebuffer_release(info);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200337 }
338
Dave Airlie8be48d92010-03-30 05:34:14 +0000339 if (rfb->obj) {
Dave Airlie29d08b32010-09-27 16:17:17 +1000340 radeonfb_destroy_pinned_object(rfb->obj);
341 rfb->obj = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200342 }
Dave Airlie4abe3522010-03-30 05:34:18 +0000343 drm_fb_helper_fini(&rfbdev->helper);
Dave Airlie38651672010-03-30 05:34:13 +0000344 drm_framebuffer_cleanup(&rfb->base);
Dave Airlie785b93e2009-08-28 15:46:53 +1000345
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200346 return 0;
347}
Dave Airlie4abe3522010-03-30 05:34:18 +0000348
349static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
350 .gamma_set = radeon_crtc_fb_gamma_set,
351 .gamma_get = radeon_crtc_fb_gamma_get,
352 .fb_probe = radeon_fb_find_or_create_single,
Dave Airlie4abe3522010-03-30 05:34:18 +0000353};
Dave Airlie38651672010-03-30 05:34:13 +0000354
355int radeon_fbdev_init(struct radeon_device *rdev)
356{
Dave Airlie8be48d92010-03-30 05:34:14 +0000357 struct radeon_fbdev *rfbdev;
Dave Airlie4abe3522010-03-30 05:34:18 +0000358 int bpp_sel = 32;
Chris Wilson5a793952010-06-06 10:50:03 +0100359 int ret;
Dave Airlie4abe3522010-03-30 05:34:18 +0000360
361 /* select 8 bpp console on RN50 or 16MB cards */
362 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
363 bpp_sel = 8;
Dave Airlie8be48d92010-03-30 05:34:14 +0000364
365 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
366 if (!rfbdev)
367 return -ENOMEM;
368
369 rfbdev->rdev = rdev;
370 rdev->mode_info.rfbdev = rfbdev;
Dave Airlie4abe3522010-03-30 05:34:18 +0000371 rfbdev->helper.funcs = &radeon_fb_helper_funcs;
Dave Airlie8be48d92010-03-30 05:34:14 +0000372
Chris Wilson5a793952010-06-06 10:50:03 +0100373 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
374 rdev->num_crtc,
375 RADEONFB_CONN_LIMIT);
376 if (ret) {
377 kfree(rfbdev);
378 return ret;
379 }
380
Dave Airlie0b4c0f32010-03-30 05:34:15 +0000381 drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
Dave Airlie4abe3522010-03-30 05:34:18 +0000382 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
Dave Airlie38651672010-03-30 05:34:13 +0000383 return 0;
384}
385
386void radeon_fbdev_fini(struct radeon_device *rdev)
387{
Dave Airlie8be48d92010-03-30 05:34:14 +0000388 if (!rdev->mode_info.rfbdev)
389 return;
390
Dave Airlie38651672010-03-30 05:34:13 +0000391 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
Dave Airlie8be48d92010-03-30 05:34:14 +0000392 kfree(rdev->mode_info.rfbdev);
Dave Airlie38651672010-03-30 05:34:13 +0000393 rdev->mode_info.rfbdev = NULL;
394}
395
396void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
397{
398 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
399}
400
401int radeon_fbdev_total_size(struct radeon_device *rdev)
402{
403 struct radeon_bo *robj;
404 int size = 0;
405
406 robj = rdev->mode_info.rfbdev->rfb.obj->driver_private;
407 size += radeon_bo_size(robj);
408 return size;
409}
410
411bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
412{
413 if (robj == rdev->mode_info.rfbdev->rfb.obj->driver_private)
414 return true;
415 return false;
416}