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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2440/mach-osiris.c
Ben Dooks110d3222006-03-20 17:10:02 +00002 *
Ben Dooksf3374222008-07-03 11:24:40 +01003 * Copyright (c) 2005,2008 Simtec Electronics
Ben Dooks110d3222006-03-20 17:10:02 +00004 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
Ben Dooksec976d62009-05-13 22:52:24 +010018#include <linux/gpio.h>
Ben Dooks110d3222006-03-20 17:10:02 +000019#include <linux/device.h>
Ben Dooks5698bd22007-06-06 10:36:09 +010020#include <linux/sysdev.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010021#include <linux/serial_core.h>
Ben Dooksd96a9802008-04-16 00:12:39 +010022#include <linux/clk.h>
Ben Dooksf3374222008-07-03 11:24:40 +010023#include <linux/i2c.h>
Russell Kingfced80c2008-09-06 12:10:45 +010024#include <linux/io.h>
Ben Dooks110d3222006-03-20 17:10:02 +000025
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/osiris-map.h>
31#include <mach/osiris-cpld.h>
Ben Dooks110d3222006-03-20 17:10:02 +000032
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/hardware.h>
Ben Dooks110d3222006-03-20 17:10:02 +000034#include <asm/irq.h>
35#include <asm/mach-types.h>
36
Ben Dooksbaf6b282009-07-30 23:23:32 +010037#include <plat/cpu-freq.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010038#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010039#include <mach/regs-gpio.h>
40#include <mach/regs-mem.h>
41#include <mach/regs-lcd.h>
Ben Dooks7926b5a2008-10-30 10:14:35 +000042#include <plat/nand.h>
Ben Dooks3e1b7762008-10-31 16:14:40 +000043#include <plat/iic.h>
Ben Dooks110d3222006-03-20 17:10:02 +000044
45#include <linux/mtd/mtd.h>
46#include <linux/mtd/nand.h>
47#include <linux/mtd/nand_ecc.h>
48#include <linux/mtd/partitions.h>
49
Ben Dooksd5120ae2008-10-07 23:09:51 +010050#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010051#include <plat/devs.h>
52#include <plat/cpu.h>
Ben Dooks110d3222006-03-20 17:10:02 +000053
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010054/* onboard perihperal map */
Ben Dooks110d3222006-03-20 17:10:02 +000055
56static struct map_desc osiris_iodesc[] __initdata = {
57 /* ISA IO areas (may be over-written later) */
58
59 {
60 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
61 .pfn = __phys_to_pfn(S3C2410_CS5),
62 .length = SZ_16M,
63 .type = MT_DEVICE,
64 }, {
65 .virtual = (u32)S3C24XX_VA_ISA_WORD,
66 .pfn = __phys_to_pfn(S3C2410_CS5),
67 .length = SZ_16M,
68 .type = MT_DEVICE,
69 },
70
71 /* CPLD control registers */
72
73 {
Ben Dooksc362aec2007-06-06 09:51:51 +010074 .virtual = (u32)OSIRIS_VA_CTRL0,
75 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
76 .length = SZ_16K,
77 .type = MT_DEVICE,
78 }, {
Ben Dooks110d3222006-03-20 17:10:02 +000079 .virtual = (u32)OSIRIS_VA_CTRL1,
80 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
81 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010082 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000083 }, {
84 .virtual = (u32)OSIRIS_VA_CTRL2,
85 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
86 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010087 .type = MT_DEVICE,
Ben Dooksc362aec2007-06-06 09:51:51 +010088 }, {
89 .virtual = (u32)OSIRIS_VA_IDREG,
90 .pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
91 .length = SZ_16K,
92 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000093 },
94};
95
96#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
97#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
98#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
99
100static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
101 [0] = {
102 .name = "uclk",
103 .divisor = 1,
104 .min_baud = 0,
105 .max_baud = 0,
106 },
107 [1] = {
108 .name = "pclk",
109 .divisor = 1,
110 .min_baud = 0,
Ben Dooks705630d2006-07-26 20:16:39 +0100111 .max_baud = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000112 }
113};
114
Ben Dooks66a9b492006-06-18 23:04:05 +0100115static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000116 [0] = {
117 .hwport = 0,
118 .flags = 0,
119 .ucon = UCON,
120 .ulcon = ULCON,
121 .ufcon = UFCON,
122 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100123 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000124 },
125 [1] = {
Ben Dookse2e58102006-06-18 16:21:50 +0100126 .hwport = 1,
Ben Dooks110d3222006-03-20 17:10:02 +0000127 .flags = 0,
128 .ucon = UCON,
129 .ulcon = ULCON,
130 .ufcon = UFCON,
131 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100132 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000133 },
Ben Dooksca7aa4d2006-12-07 20:49:01 +0100134 [2] = {
135 .hwport = 2,
136 .flags = 0,
137 .ucon = UCON,
138 .ulcon = ULCON,
139 .ufcon = UFCON,
140 .clocks = osiris_serial_clocks,
141 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
142 }
Ben Dooks110d3222006-03-20 17:10:02 +0000143};
144
145/* NAND Flash on Osiris board */
146
147static int external_map[] = { 2 };
148static int chip0_map[] = { 0 };
149static int chip1_map[] = { 1 };
150
Ben Dooksda956fd2006-03-20 21:02:39 +0000151static struct mtd_partition osiris_default_nand_part[] = {
Ben Dooks110d3222006-03-20 17:10:02 +0000152 [0] = {
153 .name = "Boot Agent",
154 .size = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +0100155 .offset = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000156 },
157 [1] = {
158 .name = "/boot",
159 .size = SZ_4M - SZ_16K,
160 .offset = SZ_16K,
161 },
162 [2] = {
163 .name = "user1",
164 .offset = SZ_4M,
165 .size = SZ_32M - SZ_4M,
166 },
167 [3] = {
168 .name = "user2",
169 .offset = SZ_32M,
170 .size = MTDPART_SIZ_FULL,
171 }
172};
173
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100174static struct mtd_partition osiris_default_nand_part_large[] = {
175 [0] = {
176 .name = "Boot Agent",
177 .size = SZ_128K,
178 .offset = 0,
179 },
180 [1] = {
181 .name = "/boot",
182 .size = SZ_4M - SZ_128K,
183 .offset = SZ_128K,
184 },
185 [2] = {
186 .name = "user1",
187 .offset = SZ_4M,
188 .size = SZ_32M - SZ_4M,
189 },
190 [3] = {
191 .name = "user2",
192 .offset = SZ_32M,
193 .size = MTDPART_SIZ_FULL,
194 }
195};
196
Ben Dooks110d3222006-03-20 17:10:02 +0000197/* the Osiris has 3 selectable slots for nand-flash, the two
198 * on-board chip areas, as well as the external slot.
199 *
200 * Note, there is no current hot-plug support for the External
201 * socket.
202*/
203
204static struct s3c2410_nand_set osiris_nand_sets[] = {
205 [1] = {
206 .name = "External",
207 .nr_chips = 1,
208 .nr_map = external_map,
209 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100210 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000211 },
212 [0] = {
213 .name = "chip0",
214 .nr_chips = 1,
215 .nr_map = chip0_map,
216 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100217 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000218 },
219 [2] = {
220 .name = "chip1",
221 .nr_chips = 1,
222 .nr_map = chip1_map,
223 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100224 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000225 },
226};
227
228static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
229{
230 unsigned int tmp;
231
232 slot = set->nr_map[slot] & 3;
233
234 pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
235 slot, set, set->nr_map);
236
Ben Dooksc362aec2007-06-06 09:51:51 +0100237 tmp = __raw_readb(OSIRIS_VA_CTRL0);
238 tmp &= ~OSIRIS_CTRL0_NANDSEL;
Ben Dooks110d3222006-03-20 17:10:02 +0000239 tmp |= slot;
240
Ben Dooksc362aec2007-06-06 09:51:51 +0100241 pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
Ben Dooks110d3222006-03-20 17:10:02 +0000242
Ben Dooksc362aec2007-06-06 09:51:51 +0100243 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
Ben Dooks110d3222006-03-20 17:10:02 +0000244}
245
246static struct s3c2410_platform_nand osiris_nand_info = {
247 .tacls = 25,
248 .twrph0 = 60,
249 .twrph1 = 60,
250 .nr_sets = ARRAY_SIZE(osiris_nand_sets),
251 .sets = osiris_nand_sets,
252 .select_chip = osiris_nand_select,
253};
254
255/* PCMCIA control and configuration */
256
257static struct resource osiris_pcmcia_resource[] = {
258 [0] = {
259 .start = 0x0f000000,
260 .end = 0x0f100000,
261 .flags = IORESOURCE_MEM,
262 },
263 [1] = {
264 .start = 0x0c000000,
265 .end = 0x0c100000,
266 .flags = IORESOURCE_MEM,
267 }
268};
269
270static struct platform_device osiris_pcmcia = {
271 .name = "osiris-pcmcia",
272 .id = -1,
273 .num_resources = ARRAY_SIZE(osiris_pcmcia_resource),
274 .resource = osiris_pcmcia_resource,
275};
276
Ben Dooks5698bd22007-06-06 10:36:09 +0100277/* Osiris power management device */
278
279#ifdef CONFIG_PM
280static unsigned char pm_osiris_ctrl0;
281
282static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
283{
Ben Dooks28047ec2007-10-04 23:16:42 +0100284 unsigned int tmp;
285
Ben Dooks5698bd22007-06-06 10:36:09 +0100286 pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
Ben Dooks28047ec2007-10-04 23:16:42 +0100287 tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
288
289 /* ensure correct NAND slot is selected on resume */
290 if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
291 tmp |= 2;
292
293 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
294
Ben Dooks4afcdda2007-10-04 23:18:08 +0100295 /* ensure that an nRESET is not generated on resume. */
Ben Dooks070276d2009-05-17 22:32:23 +0100296 s3c2410_gpio_setpin(S3C2410_GPA(21), 1);
297 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
Ben Dooks4afcdda2007-10-04 23:18:08 +0100298
Ben Dooks5698bd22007-06-06 10:36:09 +0100299 return 0;
300}
301
302static int osiris_pm_resume(struct sys_device *sd)
303{
304 if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
305 __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
306
Ben Dooks28047ec2007-10-04 23:16:42 +0100307 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
308
Ben Dooks070276d2009-05-17 22:32:23 +0100309 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
Ben Dooks4afcdda2007-10-04 23:18:08 +0100310
Ben Dooks5698bd22007-06-06 10:36:09 +0100311 return 0;
312}
313
314#else
315#define osiris_pm_suspend NULL
316#define osiris_pm_resume NULL
317#endif
318
319static struct sysdev_class osiris_pm_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +0100320 .name = "mach-osiris",
Ben Dooks5698bd22007-06-06 10:36:09 +0100321 .suspend = osiris_pm_suspend,
322 .resume = osiris_pm_resume,
323};
324
325static struct sys_device osiris_pm_sysdev = {
326 .cls = &osiris_pm_sysclass,
327};
328
Ben Dooksf3374222008-07-03 11:24:40 +0100329/* I2C devices fitted. */
330
331static struct i2c_board_info osiris_i2c_devs[] __initdata = {
332 {
333 I2C_BOARD_INFO("tps65011", 0x48),
334 .irq = IRQ_EINT20,
335 },
336};
337
Ben Dooks110d3222006-03-20 17:10:02 +0000338/* Standard Osiris devices */
339
340static struct platform_device *osiris_devices[] __initdata = {
Ben Dooks3e1b7762008-10-31 16:14:40 +0000341 &s3c_device_i2c0,
Ben Dooks55ba86b2007-06-06 09:53:00 +0100342 &s3c_device_wdt,
Ben Dooks110d3222006-03-20 17:10:02 +0000343 &s3c_device_nand,
344 &osiris_pcmcia,
345};
346
Ben Dooks2bc75092008-07-15 17:17:48 +0100347static struct clk *osiris_clocks[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000348 &s3c24xx_dclk0,
349 &s3c24xx_dclk1,
350 &s3c24xx_clkout0,
351 &s3c24xx_clkout1,
352 &s3c24xx_uclk,
353};
354
Ben Dooksbaf6b282009-07-30 23:23:32 +0100355static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
356 .refresh = 7800, /* refresh period is 7.8usec */
357 .auto_io = 1,
358 .need_io = 1,
359};
360
Ben Dooksda956fd2006-03-20 21:02:39 +0000361static void __init osiris_map_io(void)
Ben Dooks110d3222006-03-20 17:10:02 +0000362{
Ben Dooksda956fd2006-03-20 21:02:39 +0000363 unsigned long flags;
364
Ben Dooks110d3222006-03-20 17:10:02 +0000365 /* initialise the clocks */
366
Ben Dooksd96a9802008-04-16 00:12:39 +0100367 s3c24xx_dclk0.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000368 s3c24xx_dclk0.rate = 12*1000*1000;
369
Ben Dooksd96a9802008-04-16 00:12:39 +0100370 s3c24xx_dclk1.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000371 s3c24xx_dclk1.rate = 24*1000*1000;
372
373 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
374 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
375
376 s3c24xx_uclk.parent = &s3c24xx_clkout1;
377
Ben Dooksce89c202007-04-20 11:15:27 +0100378 s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
379
Ben Dooks110d3222006-03-20 17:10:02 +0000380 s3c_device_nand.dev.platform_data = &osiris_nand_info;
381
382 s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
383 s3c24xx_init_clocks(0);
384 s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
Ben Dooks110d3222006-03-20 17:10:02 +0000385
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100386 /* check for the newer revision boards with large page nand */
387
388 if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
389 printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
390 __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
391 osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
392 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
393 } else {
394 /* write-protect line to the NAND */
Ben Dooks070276d2009-05-17 22:32:23 +0100395 s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100396 }
397
Ben Dooks110d3222006-03-20 17:10:02 +0000398 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
Ben Dooksda956fd2006-03-20 21:02:39 +0000399
400 local_irq_save(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000401 __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
Ben Dooksda956fd2006-03-20 21:02:39 +0000402 local_irq_restore(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000403}
404
Ben Dooks57e51712007-04-20 11:19:16 +0100405static void __init osiris_init(void)
406{
Ben Dooks5698bd22007-06-06 10:36:09 +0100407 sysdev_class_register(&osiris_pm_sysclass);
408 sysdev_register(&osiris_pm_sysdev);
409
Ben Dooks3e1b7762008-10-31 16:14:40 +0000410 s3c_i2c0_set_platdata(NULL);
411
Ben Dooksbaf6b282009-07-30 23:23:32 +0100412 s3c_cpufreq_setboard(&osiris_cpufreq);
413
Ben Dooksf3374222008-07-03 11:24:40 +0100414 i2c_register_board_info(0, osiris_i2c_devs,
415 ARRAY_SIZE(osiris_i2c_devs));
416
Ben Dooks57e51712007-04-20 11:19:16 +0100417 platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
418};
419
Ben Dooks110d3222006-03-20 17:10:02 +0000420MACHINE_START(OSIRIS, "Simtec-OSIRIS")
421 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
Ben Dooks110d3222006-03-20 17:10:02 +0000422 .phys_io = S3C2410_PA_UART,
423 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
424 .boot_params = S3C2410_SDRAM_PA + 0x100,
425 .map_io = osiris_map_io,
Ben Dooks110d3222006-03-20 17:10:02 +0000426 .init_irq = s3c24xx_init_irq,
Ben Dooks5698bd22007-06-06 10:36:09 +0100427 .init_machine = osiris_init,
Ben Dooks110d3222006-03-20 17:10:02 +0000428 .timer = &s3c24xx_timer,
429MACHINE_END