Sascha Hauer | c0a5f85 | 2009-02-02 14:11:54 +0100 | [diff] [blame] | 1 | /* |
| 2 | * IRAM |
| 3 | */ |
| 4 | #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ |
| 5 | #define MX35_IRAM_SIZE SZ_128K |
| 6 | |
| 7 | #define MXC_FEC_BASE_ADDR 0x50038000 |
Sascha Hauer | 7bc07eb | 2009-04-17 16:52:25 +0200 | [diff] [blame] | 8 | #define MX35_OTG_BASE_ADDR 0x53ff4000 |
Sascha Hauer | c0a5f85 | 2009-02-02 14:11:54 +0100 | [diff] [blame] | 9 | #define MX35_NFC_BASE_ADDR 0xBB000000 |
| 10 | |
| 11 | /* |
| 12 | * Interrupt numbers |
| 13 | */ |
| 14 | #define MXC_INT_OWIRE 2 |
| 15 | #define MX35_INT_MMC_SDHC1 7 |
| 16 | #define MXC_INT_MMC_SDHC2 8 |
| 17 | #define MXC_INT_MMC_SDHC3 9 |
| 18 | #define MX35_INT_SSI1 11 |
| 19 | #define MX35_INT_SSI2 12 |
| 20 | #define MXC_INT_GPU2D 16 |
| 21 | #define MXC_INT_ASRC 17 |
| 22 | #define MXC_INT_USBHS 35 |
| 23 | #define MXC_INT_USBOTG 37 |
| 24 | #define MXC_INT_ESAI 40 |
| 25 | #define MXC_INT_CAN1 43 |
| 26 | #define MXC_INT_CAN2 44 |
| 27 | #define MXC_INT_MLB 46 |
| 28 | #define MXC_INT_SPDIF 47 |
| 29 | #define MXC_INT_FEC 57 |
| 30 | |