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Bryan Wu1394f032007-05-06 14:50:22 -07001#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
7
8config MMU
9 bool
10 default n
11
12config FPU
13 bool
14 default n
15
16config RWSEM_GENERIC_SPINLOCK
17 bool
18 default y
19
20config RWSEM_XCHGADD_ALGORITHM
21 bool
22 default n
23
24config BLACKFIN
25 bool
26 default y
27
Aubrey Lie3defff2007-05-21 18:09:11 +080028config ZONE_DMA
29 bool
30 default y
31
Bryan Wu1394f032007-05-06 14:50:22 -070032config BFIN
33 bool
34 default y
35
36config SEMAPHORE_SLEEPERS
37 bool
38 default y
39
40config GENERIC_FIND_NEXT_BIT
41 bool
42 default y
43
44config GENERIC_HWEIGHT
45 bool
46 default y
47
48config GENERIC_HARDIRQS
49 bool
50 default y
51
52config GENERIC_IRQ_PROBE
53 bool
54 default y
55
56config GENERIC_TIME
57 bool
58 default n
59
Michael Hennerichb2d15832007-07-24 15:46:36 +080060config GENERIC_GPIO
Bryan Wu1394f032007-05-06 14:50:22 -070061 bool
62 default y
63
64config FORCE_MAX_ZONEORDER
65 int
66 default "14"
67
68config GENERIC_CALIBRATE_DELAY
69 bool
70 default y
71
72config IRQCHIP_DEMUX_GPIO
73 bool
Michael Hennerich34e0fc82007-07-12 16:17:18 +080074 depends on (BF53x || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -070075 default y
76
77source "init/Kconfig"
78source "kernel/Kconfig.preempt"
79
80menu "Blackfin Processor Options"
81
82comment "Processor and Board Settings"
83
84choice
85 prompt "CPU"
86 default BF533
87
88config BF531
89 bool "BF531"
90 help
91 BF531 Processor Support.
92
93config BF532
94 bool "BF532"
95 help
96 BF532 Processor Support.
97
98config BF533
99 bool "BF533"
100 help
101 BF533 Processor Support.
102
103config BF534
104 bool "BF534"
105 help
106 BF534 Processor Support.
107
108config BF536
109 bool "BF536"
110 help
111 BF536 Processor Support.
112
113config BF537
114 bool "BF537"
115 help
116 BF537 Processor Support.
117
Roy Huang24a07a12007-07-12 22:41:45 +0800118config BF542
119 bool "BF542"
120 help
121 BF542 Processor Support.
122
123config BF544
124 bool "BF544"
125 help
126 BF544 Processor Support.
127
128config BF548
129 bool "BF548"
130 help
131 BF548 Processor Support.
132
133config BF549
134 bool "BF549"
135 help
136 BF549 Processor Support.
137
Bryan Wu1394f032007-05-06 14:50:22 -0700138config BF561
139 bool "BF561"
140 help
141 Not Supported Yet - Work in progress - BF561 Processor Support.
142
143endchoice
144
145choice
146 prompt "Silicon Rev"
147 default BF_REV_0_2 if BF537
148 default BF_REV_0_3 if BF533
Roy Huang24a07a12007-07-12 22:41:45 +0800149 default BF_REV_0_0 if BF549
150
151config BF_REV_0_0
152 bool "0.0"
153 depends on (BF549)
Bryan Wu1394f032007-05-06 14:50:22 -0700154
155config BF_REV_0_2
156 bool "0.2"
157 depends on (BF537 || BF536 || BF534)
158
159config BF_REV_0_3
160 bool "0.3"
161 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
162
163config BF_REV_0_4
164 bool "0.4"
165 depends on (BF561 || BF533 || BF532 || BF531)
166
167config BF_REV_0_5
168 bool "0.5"
169 depends on (BF561 || BF533 || BF532 || BF531)
170
Jie Zhangde3025f2007-06-25 18:04:12 +0800171config BF_REV_ANY
172 bool "any"
173
174config BF_REV_NONE
175 bool "none"
176
Bryan Wu1394f032007-05-06 14:50:22 -0700177endchoice
178
Roy Huang24a07a12007-07-12 22:41:45 +0800179config BF53x
180 bool
181 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
182 default y
183
184config BF54x
185 bool
186 depends on (BF542 || BF544 || BF548 || BF549)
187 default y
188
Bryan Wu1394f032007-05-06 14:50:22 -0700189config BFIN_DUAL_CORE
190 bool
191 depends on (BF561)
192 default y
193
194config BFIN_SINGLE_CORE
195 bool
196 depends on !BFIN_DUAL_CORE
197 default y
198
199choice
200 prompt "System type"
201 default BFIN533_STAMP
202 help
203 Do NOT change the board here. Please use the top level
204 configuration to ensure that all the other settings are
205 correct.
206
207config BFIN533_EZKIT
208 bool "BF533-EZKIT"
209 depends on (BF533 || BF532 || BF531)
210 help
211 BF533-EZKIT-LITE board Support.
212
213config BFIN533_STAMP
214 bool "BF533-STAMP"
215 depends on (BF533 || BF532 || BF531)
216 help
217 BF533-STAMP board Support.
218
219config BFIN537_STAMP
220 bool "BF537-STAMP"
221 depends on (BF537 || BF536 || BF534)
222 help
223 BF537-STAMP board Support.
224
225config BFIN533_BLUETECHNIX_CM
226 bool "Bluetechnix CM-BF533"
227 depends on (BF533)
228 help
229 CM-BF533 support for EVAL- and DEV-Board.
230
231config BFIN537_BLUETECHNIX_CM
232 bool "Bluetechnix CM-BF537"
233 depends on (BF537)
234 help
235 CM-BF537 support for EVAL- and DEV-Board.
236
Roy Huang24a07a12007-07-12 22:41:45 +0800237config BFIN548_EZKIT
238 bool "BF548-EZKIT"
239 depends on (BF548 || BF549)
240 help
241 BFIN548-EZKIT board Support.
242
Bryan Wu1394f032007-05-06 14:50:22 -0700243config BFIN561_BLUETECHNIX_CM
Mike Frysinger0a290592007-05-21 18:09:21 +0800244 bool "Bluetechnix CM-BF561"
Bryan Wu1394f032007-05-06 14:50:22 -0700245 depends on (BF561)
246 help
247 CM-BF561 support for EVAL- and DEV-Board.
248
249config BFIN561_EZKIT
250 bool "BF561-EZKIT"
251 depends on (BF561)
252 help
253 BF561-EZKIT-LITE board Support.
254
Mike Frysinger0a290592007-05-21 18:09:21 +0800255config BFIN561_TEPLA
256 bool "BF561-TEPLA"
257 depends on (BF561)
258 help
259 BF561-TEPLA board Support.
260
Bryan Wu1394f032007-05-06 14:50:22 -0700261config PNAV10
262 bool "PNAV 1.0 board"
263 depends on (BF537)
264 help
265 PNAV 1.0 board Support.
266
267config GENERIC_BOARD
268 bool "Custom"
269 depends on (BF537 || BF536 \
270 || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
271 help
272 GENERIC or Custom board Support.
273
274endchoice
275
276config MEM_GENERIC_BOARD
277 bool
278 depends on GENERIC_BOARD
279 default y
280
281config MEM_MT48LC64M4A2FB_7E
282 bool
283 depends on (BFIN533_STAMP)
284 default y
285
286config MEM_MT48LC16M16A2TG_75
287 bool
288 depends on (BFIN533_EZKIT || BFIN561_EZKIT \
289 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
290 default y
291
292config MEM_MT48LC32M8A2_75
293 bool
294 depends on (BFIN537_STAMP || PNAV10)
295 default y
296
297config MEM_MT48LC8M32B2B5_7
298 bool
299 depends on (BFIN561_BLUETECHNIX_CM)
300 default y
301
302config BFIN_SHARED_FLASH_ENET
303 bool
304 depends on (BFIN533_STAMP)
305 default y
306
307source "arch/blackfin/mach-bf533/Kconfig"
308source "arch/blackfin/mach-bf561/Kconfig"
309source "arch/blackfin/mach-bf537/Kconfig"
Roy Huang24a07a12007-07-12 22:41:45 +0800310source "arch/blackfin/mach-bf548/Kconfig"
Bryan Wu1394f032007-05-06 14:50:22 -0700311
312menu "Board customizations"
313
314config CMDLINE_BOOL
315 bool "Default bootloader kernel arguments"
316
317config CMDLINE
318 string "Initial kernel command string"
319 depends on CMDLINE_BOOL
320 default "console=ttyBF0,57600"
321 help
322 If you don't have a boot loader capable of passing a command line string
323 to the kernel, you may specify one here. As a minimum, you should specify
324 the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
325
Robin Getzf16295e2007-08-03 18:07:17 +0800326comment "Clock/PLL Setup"
Bryan Wu1394f032007-05-06 14:50:22 -0700327
328config CLKIN_HZ
329 int "Crystal Frequency in Hz"
330 default "11059200" if BFIN533_STAMP
331 default "27000000" if BFIN533_EZKIT
332 default "25000000" if BFIN537_STAMP
333 default "30000000" if BFIN561_EZKIT
334 default "24576000" if PNAV10
335 help
336 The frequency of CLKIN crystal oscillator on the board in Hz.
337
Robin Getzf16295e2007-08-03 18:07:17 +0800338config BFIN_KERNEL_CLOCK
339 bool "Re-program Clocks while Kernel boots?"
340 default n
341 help
342 This option decides if kernel clocks are re-programed from the
343 bootloader settings. If the clocks are not set, the SDRAM settings
344 are also not changed, and the Bootloader does 100% of the hardware
345 configuration.
346
347config PLL_BYPASS
348 bool "Bypass PLL"
349 depends on BFIN_KERNEL_CLOCK
350 default n
351
352config CLKIN_HALF
353 bool "Half Clock In"
354 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
355 default n
356 help
357 If this is set the clock will be divided by 2, before it goes to the PLL.
358
359config VCO_MULT
360 int "VCO Multiplier"
361 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
362 range 1 64
363 default "22" if BFIN533_EZKIT
364 default "45" if BFIN533_STAMP
365 default "20" if BFIN537_STAMP
366 default "22" if BFIN533_BLUETECHNIX_CM
367 default "20" if BFIN537_BLUETECHNIX_CM
368 default "20" if BFIN561_BLUETECHNIX_CM
369 default "20" if BFIN561_EZKIT
370 help
371 This controls the frequency of the on-chip PLL. This can be between 1 and 64.
372 PLL Frequency = (Crystal Frequency) * (this setting)
373
374choice
375 prompt "Core Clock Divider"
376 depends on BFIN_KERNEL_CLOCK
377 default CCLK_DIV_1
378 help
379 This sets the frequency of the core. It can be 1, 2, 4 or 8
380 Core Frequency = (PLL frequency) / (this setting)
381
382config CCLK_DIV_1
383 bool "1"
384
385config CCLK_DIV_2
386 bool "2"
387
388config CCLK_DIV_4
389 bool "4"
390
391config CCLK_DIV_8
392 bool "8"
393endchoice
394
395config SCLK_DIV
396 int "System Clock Divider"
397 depends on BFIN_KERNEL_CLOCK
398 range 1 15
399 default 5 if BFIN533_EZKIT
400 default 5 if BFIN533_STAMP
401 default 4 if BFIN537_STAMP
402 default 5 if BFIN533_BLUETECHNIX_CM
403 default 4 if BFIN537_BLUETECHNIX_CM
404 default 4 if BFIN561_BLUETECHNIX_CM
405 default 5 if BFIN561_EZKIT
406 help
407 This sets the frequency of the system clock (including SDRAM or DDR).
408 This can be between 1 and 15
409 System Clock = (PLL frequency) / (this setting)
410
411#
412# Max & Min Speeds for various Chips
413#
414config MAX_VCO_HZ
415 int
416 default 600000000 if BF522
417 default 600000000 if BF525
418 default 600000000 if BF527
419 default 400000000 if BF531
420 default 400000000 if BF532
421 default 750000000 if BF533
422 default 500000000 if BF534
423 default 400000000 if BF536
424 default 600000000 if BF537
425 default 533000000 if BF538
426 default 533000000 if BF539
427 default 600000000 if BF542
428 default 533000000 if BF544
429 default 533000000 if BF549
430 default 600000000 if BF561
431
432config MIN_VCO_HZ
433 int
434 default 50000000
435
436config MAX_SCLK_HZ
437 int
438 default 133000000
439
440config MIN_SCLK_HZ
441 int
442 default 27000000
443
444comment "Kernel Timer/Scheduler"
445
446source kernel/Kconfig.hz
447
448comment "Memory Setup"
449
Bryan Wu1394f032007-05-06 14:50:22 -0700450config MEM_SIZE
451 int "SDRAM Memory Size in MBytes"
452 default 32 if BFIN533_EZKIT
453 default 64 if BFIN537_STAMP
454 default 64 if BFIN561_EZKIT
455 default 128 if BFIN533_STAMP
456 default 64 if PNAV10
457
458config MEM_ADD_WIDTH
459 int "SDRAM Memory Address Width"
460 default 9 if BFIN533_EZKIT
461 default 9 if BFIN561_EZKIT
462 default 10 if BFIN537_STAMP
463 default 11 if BFIN533_STAMP
464 default 10 if PNAV10
465
466config ENET_FLASH_PIN
467 int "PF port/pin used for flash and ethernet sharing"
468 depends on (BFIN533_STAMP)
469 default 0
470 help
471 PF port/pin used for flash and ethernet sharing to allow other PF
472 pins to be used on other platforms without having to touch common
473 code.
474 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
475
476config BOOT_LOAD
477 hex "Kernel load address for booting"
478 default "0x1000"
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800479 range 0x1000 0x20000000
Bryan Wu1394f032007-05-06 14:50:22 -0700480 help
481 This option allows you to set the load address of the kernel.
482 This can be useful if you are on a board which has a small amount
483 of memory or you wish to reserve some memory at the beginning of
484 the address space.
485
Mike Frysinger2d8f1612007-08-05 14:06:16 +0800486 Note that you need to keep this value above 4k (0x1000) as this
487 memory region is used to capture NULL pointer references as well
488 as some core kernel functions.
Bryan Wu1394f032007-05-06 14:50:22 -0700489
490comment "LED Status Indicators"
491 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
492
493config BFIN_ALIVE_LED
494 bool "Enable Board Alive"
495 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
496 default n
497 help
498 Blink the LEDs you select when the kernel is running. Helps detect
499 a hung kernel.
500
501config BFIN_ALIVE_LED_NUM
502 int "LED"
503 depends on BFIN_ALIVE_LED
504 range 1 3 if BFIN533_STAMP
505 default "3" if BFIN533_STAMP
506 help
507 Select the LED (marked on the board) for you to blink.
508
509config BFIN_IDLE_LED
510 bool "Enable System Load/Idle LED"
511 depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
512 default n
513 help
514 Blinks the LED you select when to determine kernel load.
515
516config BFIN_IDLE_LED_NUM
517 int "LED"
518 depends on BFIN_IDLE_LED
519 range 1 3 if BFIN533_STAMP
520 default "2" if BFIN533_STAMP
521 help
522 Select the LED (marked on the board) for you to blink.
523
Mike Frysingerf0b5d122007-08-05 17:03:59 +0800524choice
525 prompt "Blackfin Exception Scratch Register"
526 default BFIN_SCRATCH_REG_RETN
527 help
528 Select the resource to reserve for the Exception handler:
529 - RETN: Non-Maskable Interrupt (NMI)
530 - RETE: Exception Return (JTAG/ICE)
531 - CYCLES: Performance counter
532
533 If you are unsure, please select "RETN".
534
535config BFIN_SCRATCH_REG_RETN
536 bool "RETN"
537 help
538 Use the RETN register in the Blackfin exception handler
539 as a stack scratch register. This means you cannot
540 safely use NMI on the Blackfin while running Linux, but
541 you can debug the system with a JTAG ICE and use the
542 CYCLES performance registers.
543
544 If you are unsure, please select "RETN".
545
546config BFIN_SCRATCH_REG_RETE
547 bool "RETE"
548 help
549 Use the RETE register in the Blackfin exception handler
550 as a stack scratch register. This means you cannot
551 safely use a JTAG ICE while debugging a Blackfin board,
552 but you can safely use the CYCLES performance registers
553 and the NMI.
554
555 If you are unsure, please select "RETN".
556
557config BFIN_SCRATCH_REG_CYCLES
558 bool "CYCLES"
559 help
560 Use the CYCLES register in the Blackfin exception handler
561 as a stack scratch register. This means you cannot
562 safely use the CYCLES performance registers on a Blackfin
563 board at anytime, but you can debug the system with a JTAG
564 ICE and use the NMI.
565
566 If you are unsure, please select "RETN".
567
568endchoice
569
Bryan Wu1394f032007-05-06 14:50:22 -0700570#
571# Sorry - but you need to put the hex address here -
572#
573
574# Flag Data register
575config BFIN_ALIVE_LED_PORT
576 hex
577 default 0xFFC00700 if (BFIN533_STAMP)
578
579# Peripheral Flag Direction Register
580config BFIN_ALIVE_LED_DPORT
581 hex
582 default 0xFFC00730 if (BFIN533_STAMP)
583
584config BFIN_ALIVE_LED_PIN
585 hex
586 default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
587 default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
588 default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
589
590config BFIN_IDLE_LED_PORT
591 hex
592 default 0xFFC00700 if (BFIN533_STAMP)
593
594# Peripheral Flag Direction Register
595config BFIN_IDLE_LED_DPORT
596 hex
597 default 0xFFC00730 if (BFIN533_STAMP)
598
599config BFIN_IDLE_LED_PIN
600 hex
601 default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
602 default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
603 default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
604
Bryan Wu1394f032007-05-06 14:50:22 -0700605endmenu
606
607
608menu "Blackfin Kernel Optimizations"
609
Bryan Wu1394f032007-05-06 14:50:22 -0700610comment "Memory Optimizations"
611
612config I_ENTRY_L1
613 bool "Locate interrupt entry code in L1 Memory"
614 default y
615 help
616 If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
617 into L1 instruction memory.(less latency)
618
619config EXCPT_IRQ_SYSC_L1
620 bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
621 default y
622 help
623 If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
624 into L1 instruction memory.(less latency)
625
626config DO_IRQ_L1
627 bool "Locate frequently called do_irq dispatcher function in L1 Memory"
628 default y
629 help
630 If enabled frequently called do_irq dispatcher function is linked
631 into L1 instruction memory.(less latency)
632
633config CORE_TIMER_IRQ_L1
634 bool "Locate frequently called timer_interrupt() function in L1 Memory"
635 default y
636 help
637 If enabled frequently called timer_interrupt() function is linked
638 into L1 instruction memory.(less latency)
639
640config IDLE_L1
641 bool "Locate frequently idle function in L1 Memory"
642 default y
643 help
644 If enabled frequently called idle function is linked
645 into L1 instruction memory.(less latency)
646
647config SCHEDULE_L1
648 bool "Locate kernel schedule function in L1 Memory"
649 default y
650 help
651 If enabled frequently called kernel schedule is linked
652 into L1 instruction memory.(less latency)
653
654config ARITHMETIC_OPS_L1
655 bool "Locate kernel owned arithmetic functions in L1 Memory"
656 default y
657 help
658 If enabled arithmetic functions are linked
659 into L1 instruction memory.(less latency)
660
661config ACCESS_OK_L1
662 bool "Locate access_ok function in L1 Memory"
663 default y
664 help
665 If enabled access_ok function is linked
666 into L1 instruction memory.(less latency)
667
668config MEMSET_L1
669 bool "Locate memset function in L1 Memory"
670 default y
671 help
672 If enabled memset function is linked
673 into L1 instruction memory.(less latency)
674
675config MEMCPY_L1
676 bool "Locate memcpy function in L1 Memory"
677 default y
678 help
679 If enabled memcpy function is linked
680 into L1 instruction memory.(less latency)
681
682config SYS_BFIN_SPINLOCK_L1
683 bool "Locate sys_bfin_spinlock function in L1 Memory"
684 default y
685 help
686 If enabled sys_bfin_spinlock function is linked
687 into L1 instruction memory.(less latency)
688
689config IP_CHECKSUM_L1
690 bool "Locate IP Checksum function in L1 Memory"
691 default n
692 help
693 If enabled IP Checksum function is linked
694 into L1 instruction memory.(less latency)
695
696config CACHELINE_ALIGNED_L1
697 bool "Locate cacheline_aligned data to L1 Data Memory"
Michael Hennerich157cc5a2007-07-12 16:20:21 +0800698 default y if !BF54x
699 default n if BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700700 depends on !BF531
701 help
702 If enabled cacheline_anligned data is linked
703 into L1 data memory.(less latency)
704
705config SYSCALL_TAB_L1
706 bool "Locate Syscall Table L1 Data Memory"
707 default n
708 depends on !BF531
709 help
710 If enabled the Syscall LUT is linked
711 into L1 data memory.(less latency)
712
713config CPLB_SWITCH_TAB_L1
714 bool "Locate CPLB Switch Tables L1 Data Memory"
715 default n
716 depends on !BF531
717 help
718 If enabled the CPLB Switch Tables are linked
719 into L1 data memory.(less latency)
720
721endmenu
722
723
724choice
725 prompt "Kernel executes from"
726 help
727 Choose the memory type that the kernel will be running in.
728
729config RAMKERNEL
730 bool "RAM"
731 help
732 The kernel will be resident in RAM when running.
733
734config ROMKERNEL
735 bool "ROM"
736 help
737 The kernel will be resident in FLASH/ROM when running.
738
739endchoice
740
741source "mm/Kconfig"
742
Bryan Wudb0fa202007-07-12 14:55:05 +0800743config LARGE_ALLOCS
744 bool "Allow allocating large blocks (> 1MB) of memory"
745 help
746 Allow the slab memory allocator to keep chains for very large
747 memory sizes - upto 32MB. You may need this if your system has
748 a lot of RAM, and you need to able to allocate very large
749 contiguous chunks. If unsure, say N.
750
Bryan Wu1394f032007-05-06 14:50:22 -0700751config BFIN_DMA_5XX
752 bool "Enable DMA Support"
Roy Huang24a07a12007-07-12 22:41:45 +0800753 depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700754 default y
755 help
756 DMA driver for BF5xx.
757
758choice
759 prompt "Uncached SDRAM region"
760 default DMA_UNCACHED_1M
761 depends BFIN_DMA_5XX
762config DMA_UNCACHED_2M
763 bool "Enable 2M DMA region"
764config DMA_UNCACHED_1M
765 bool "Enable 1M DMA region"
766config DMA_UNCACHED_NONE
767 bool "Disable DMA region"
768endchoice
769
770
771comment "Cache Support"
Robin Getz3bebca22007-10-10 23:55:26 +0800772config BFIN_ICACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700773 bool "Enable ICACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800774config BFIN_DCACHE
Bryan Wu1394f032007-05-06 14:50:22 -0700775 bool "Enable DCACHE"
Robin Getz3bebca22007-10-10 23:55:26 +0800776config BFIN_DCACHE_BANKA
Bryan Wu1394f032007-05-06 14:50:22 -0700777 bool "Enable only 16k BankA DCACHE - BankB is SRAM"
Robin Getz3bebca22007-10-10 23:55:26 +0800778 depends on BFIN_DCACHE && !BF531
Bryan Wu1394f032007-05-06 14:50:22 -0700779 default n
Robin Getz3bebca22007-10-10 23:55:26 +0800780config BFIN_ICACHE_LOCK
781 bool "Enable Instruction Cache Locking"
Bryan Wu1394f032007-05-06 14:50:22 -0700782
783choice
784 prompt "Policy"
Robin Getz3bebca22007-10-10 23:55:26 +0800785 depends on BFIN_DCACHE
786 default BFIN_WB
787config BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700788 bool "Write back"
789 help
790 Write Back Policy:
791 Cached data will be written back to SDRAM only when needed.
792 This can give a nice increase in performance, but beware of
793 broken drivers that do not properly invalidate/flush their
794 cache.
795
796 Write Through Policy:
797 Cached data will always be written back to SDRAM when the
798 cache is updated. This is a completely safe setting, but
799 performance is worse than Write Back.
800
801 If you are unsure of the options and you want to be safe,
802 then go with Write Through.
803
Robin Getz3bebca22007-10-10 23:55:26 +0800804config BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700805 bool "Write through"
806 help
807 Write Back Policy:
808 Cached data will be written back to SDRAM only when needed.
809 This can give a nice increase in performance, but beware of
810 broken drivers that do not properly invalidate/flush their
811 cache.
812
813 Write Through Policy:
814 Cached data will always be written back to SDRAM when the
815 cache is updated. This is a completely safe setting, but
816 performance is worse than Write Back.
817
818 If you are unsure of the options and you want to be safe,
819 then go with Write Through.
820
821endchoice
822
823config L1_MAX_PIECE
824 int "Set the max L1 SRAM pieces"
825 default 16
826 help
827 Set the max memory pieces for the L1 SRAM allocation algorithm.
828 Min value is 16. Max value is 1024.
829
Bryan Wu1394f032007-05-06 14:50:22 -0700830comment "Asynchonous Memory Configuration"
831
Mike Frysingerddf416b2007-10-10 18:06:47 +0800832menu "EBIU_AMGCTL Global Control"
Bryan Wu1394f032007-05-06 14:50:22 -0700833config C_AMCKEN
834 bool "Enable CLKOUT"
835 default y
836
837config C_CDPRIO
838 bool "DMA has priority over core for ext. accesses"
Michael Hennerich9be343c2007-07-12 11:58:44 +0800839 depends on !BF54x
Bryan Wu1394f032007-05-06 14:50:22 -0700840 default n
841
842config C_B0PEN
843 depends on BF561
844 bool "Bank 0 16 bit packing enable"
845 default y
846
847config C_B1PEN
848 depends on BF561
849 bool "Bank 1 16 bit packing enable"
850 default y
851
852config C_B2PEN
853 depends on BF561
854 bool "Bank 2 16 bit packing enable"
855 default y
856
857config C_B3PEN
858 depends on BF561
859 bool "Bank 3 16 bit packing enable"
860 default n
861
862choice
863 prompt"Enable Asynchonous Memory Banks"
864 default C_AMBEN_ALL
865
866config C_AMBEN
867 bool "Disable All Banks"
868
869config C_AMBEN_B0
870 bool "Enable Bank 0"
871
872config C_AMBEN_B0_B1
873 bool "Enable Bank 0 & 1"
874
875config C_AMBEN_B0_B1_B2
876 bool "Enable Bank 0 & 1 & 2"
877
878config C_AMBEN_ALL
879 bool "Enable All Banks"
880endchoice
881endmenu
882
883menu "EBIU_AMBCTL Control"
884config BANK_0
885 hex "Bank 0"
886 default 0x7BB0
887
888config BANK_1
889 hex "Bank 1"
890 default 0x7BB0
891
892config BANK_2
893 hex "Bank 2"
894 default 0x7BB0
895
896config BANK_3
897 hex "Bank 3"
898 default 0x99B3
899endmenu
900
901endmenu
902
903#############################################################################
904menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
905
906config PCI
907 bool "PCI support"
908 help
909 Support for PCI bus.
910
911source "drivers/pci/Kconfig"
912
913config HOTPLUG
914 bool "Support for hot-pluggable device"
915 help
916 Say Y here if you want to plug devices into your computer while
917 the system is running, and be able to use them quickly. In many
918 cases, the devices can likewise be unplugged at any time too.
919
920 One well known example of this is PCMCIA- or PC-cards, credit-card
921 size devices such as network cards, modems or hard drives which are
922 plugged into slots found on all modern laptop computers. Another
923 example, used on modern desktops as well as laptops, is USB.
924
925 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
926 software (at <http://linux-hotplug.sourceforge.net/>) and install it.
927 Then your kernel will automatically call out to a user mode "policy
928 agent" (/sbin/hotplug) to load modules and set up software needed
929 to use devices as you hotplug them.
930
931source "drivers/pcmcia/Kconfig"
932
933source "drivers/pci/hotplug/Kconfig"
934
935endmenu
936
937menu "Executable file formats"
938
939source "fs/Kconfig.binfmt"
940
941endmenu
942
943menu "Power management options"
944source "kernel/power/Kconfig"
945
946choice
947 prompt "Select PM Wakeup Event Source"
948 default PM_WAKEUP_GPIO_BY_SIC_IWR
949 depends on PM
950 help
951 If you have a GPIO already configured as input with the corresponding PORTx_MASK
952 bit set - "Specify Wakeup Event by SIC_IWR value"
953
954config PM_WAKEUP_GPIO_BY_SIC_IWR
955 bool "Specify Wakeup Event by SIC_IWR value"
956config PM_WAKEUP_BY_GPIO
957 bool "Cause Wakeup Event by GPIO"
958config PM_WAKEUP_GPIO_API
959 bool "Configure Wakeup Event by PM GPIO API"
960
961endchoice
962
963config PM_WAKEUP_SIC_IWR
964 hex "Wakeup Events (SIC_IWR)"
965 depends on PM_WAKEUP_GPIO_BY_SIC_IWR
966 default 0x80000000 if (BF537 || BF536 || BF534)
967 default 0x100000 if (BF533 || BF532 || BF531)
968
969config PM_WAKEUP_GPIO_NUMBER
970 int "Wakeup GPIO number"
971 range 0 47
972 depends on PM_WAKEUP_BY_GPIO
973 default 2 if BFIN537_STAMP
974
975choice
976 prompt "GPIO Polarity"
977 depends on PM_WAKEUP_BY_GPIO
978 default PM_WAKEUP_GPIO_POLAR_H
979config PM_WAKEUP_GPIO_POLAR_H
980 bool "Active High"
981config PM_WAKEUP_GPIO_POLAR_L
982 bool "Active Low"
983config PM_WAKEUP_GPIO_POLAR_EDGE_F
984 bool "Falling EDGE"
985config PM_WAKEUP_GPIO_POLAR_EDGE_R
986 bool "Rising EDGE"
987config PM_WAKEUP_GPIO_POLAR_EDGE_B
988 bool "Both EDGE"
989endchoice
990
991endmenu
992
Roy Huang24a07a12007-07-12 22:41:45 +0800993if (BF537 || BF533 || BF54x)
Bryan Wu1394f032007-05-06 14:50:22 -0700994
995menu "CPU Frequency scaling"
996
997source "drivers/cpufreq/Kconfig"
998
999config CPU_FREQ
1000 bool
1001 default n
1002 help
1003 If you want to enable this option, you should select the
1004 DPMC driver from Character Devices.
1005endmenu
1006
1007endif
1008
1009source "net/Kconfig"
1010
1011source "drivers/Kconfig"
1012
1013source "fs/Kconfig"
1014
1015source "arch/blackfin/oprofile/Kconfig"
1016
1017menu "Kernel hacking"
1018
1019source "lib/Kconfig.debug"
1020
1021config DEBUG_HWERR
1022 bool "Hardware error interrupt debugging"
1023 depends on DEBUG_KERNEL
1024 help
1025 When enabled, the hardware error interrupt is never disabled, and
1026 will happen immediately when an error condition occurs. This comes
1027 at a slight cost in code size, but is necessary if you are getting
1028 hardware error interrupts and need to know where they are coming
1029 from.
1030
1031config DEBUG_ICACHE_CHECK
1032 bool "Check Instruction cache coherancy"
1033 depends on DEBUG_KERNEL
1034 depends on DEBUG_HWERR
1035 help
1036 Say Y here if you are getting wierd unexplained errors. This will
1037 ensure that icache is what SDRAM says it should be, by doing a
1038 byte wise comparision between SDRAM and instruction cache. This
1039 also relocates the irq_panic() function to L1 memory, (which is
1040 un-cached).
1041
1042config DEBUG_KERNEL_START
1043 bool "Debug Kernel Startup"
1044 depends on DEBUG_KERNEL
1045 help
1046 Say Y here to put in an mini-execption handler before the kernel
1047 replaces the bootloader exception handler. This will stop kernels
1048 from dieing at startup with no visible error messages.
1049
1050config DEBUG_SERIAL_EARLY_INIT
1051 bool "Initialize serial driver early"
1052 default n
1053 depends on SERIAL_BFIN
1054 help
1055 Say Y here if you want to get kernel output early when kernel
1056 crashes before the normal console initialization. If this option
1057 is enable, console output will always go to the ttyBF0, no matter
1058 what kernel boot paramters you set.
1059
1060config DEBUG_HUNT_FOR_ZERO
1061 bool "Catch NULL pointer reads/writes"
1062 default y
1063 help
1064 Say Y here to catch reads/writes to anywhere in the memory range
1065 from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
1066 catching common programming errors such as NULL pointer dereferences.
1067
1068 Misbehaving applications will be killed (generate a SEGV) while the
1069 kernel will trigger a panic.
1070
1071 Enabling this option will take up an extra entry in CPLB table.
1072 Otherwise, there is no extra overhead.
1073
Robin Getz518039b2007-07-25 11:03:28 +08001074config DEBUG_BFIN_HWTRACE_ON
1075 bool "Turn on Blackfin's Hardware Trace"
1076 default y
1077 help
1078 All Blackfins include a Trace Unit which stores a history of the last
1079 16 changes in program flow taken by the program sequencer. The history
1080 allows the user to recreate the program sequencer’s recent path. This
1081 can be handy when an application dies - we print out the execution
1082 path of how it got to the offending instruction.
1083
1084 By turning this off, you may save a tiny amount of power.
1085
1086choice
1087 prompt "Omit loop Tracing"
1088 default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1089 depends on DEBUG_BFIN_HWTRACE_ON
1090 help
1091 The trace buffer can be configured to omit recording of changes in
1092 program flow that match either the last entry or one of the last
1093 two entries. Omitting one of these entries from the record prevents
1094 the trace buffer from overflowing because of any sort of loop (for, do
1095 while, etc) in the program.
1096
1097 Because zero-overhead Hardware loops are not recorded in the trace buffer,
1098 this feature can be used to prevent trace overflow from loops that
1099 are nested four deep.
1100
1101config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1102 bool "Trace all Loops"
1103 help
1104 The trace buffer records all changes of flow
1105
1106config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1107 bool "Compress single-level loops"
1108 help
1109 The trace buffer does not record single loops - helpful if trace
1110 is spinning on a while or do loop.
1111
1112config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1113 bool "Compress two-level loops"
1114 help
1115 The trace buffer does not record loops two levels deep. Helpful if
1116 the trace is spinning in a nested loop
1117
1118endchoice
1119
1120config DEBUG_BFIN_HWTRACE_COMPRESSION
1121 int
1122 depends on DEBUG_BFIN_HWTRACE_ON
1123 default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
1124 default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
1125 default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
1126
1127
1128config DEBUG_BFIN_HWTRACE_EXPAND
1129 bool "Expand Trace Buffer greater than 16 entries"
1130 depends on DEBUG_BFIN_HWTRACE_ON
1131 default n
1132 help
1133 By selecting this option, every time the 16 hardware entries in
1134 the Blackfin's HW Trace buffer are full, the kernel will move them
1135 into a software buffer, for dumping when there is an issue. This
1136 has a great impact on performance, (an interrupt every 16 change of
1137 flows) and should normally be turned off, except in those nasty
1138 debugging sessions
1139
1140config DEBUG_BFIN_HWTRACE_EXPAND_LEN
1141 int "Size of Trace buffer (in power of 2k)"
1142 range 0 4
1143 depends on DEBUG_BFIN_HWTRACE_EXPAND
1144 default 1
1145 help
1146 This sets the size of the software buffer that the trace information
1147 is kept in.
1148 0 for (2^0) 1k, or 256 entries,
1149 1 for (2^1) 2k, or 512 entries,
1150 2 for (2^2) 4k, or 1024 entries,
1151 3 for (2^3) 8k, or 2048 entries,
1152 4 for (2^4) 16k, or 4096 entries
1153
Bryan Wu1394f032007-05-06 14:50:22 -07001154config DEBUG_BFIN_NO_KERN_HWTRACE
1155 bool "Trace user apps (turn off hwtrace in kernel)"
Robin Getz518039b2007-07-25 11:03:28 +08001156 depends on DEBUG_BFIN_HWTRACE_ON
Bryan Wu1394f032007-05-06 14:50:22 -07001157 default n
1158 help
1159 Some pieces of the kernel contain a lot of flow changes which can
1160 quickly fill up the hardware trace buffer. When debugging crashes,
1161 the hardware trace may indicate that the problem lies in kernel
1162 space when in reality an application is buggy.
1163
1164 Say Y here to disable hardware tracing in some known "jumpy" pieces
1165 of code so that the trace buffer will extend further back.
1166
Robin Getz0ae53642007-10-09 17:24:49 +08001167config EARLY_PRINTK
1168 bool "Early printk"
1169 default n
1170 help
1171 This option enables special console drivers which allow the kernel
1172 to print messages very early in the bootup process.
1173
1174 This is useful for kernel debugging when your machine crashes very
1175 early before the console code is initialized. After enabling this
1176 feature, you must add "earlyprintk=serial,uart0,57600" to the
1177 command line (bootargs). It is safe to say Y here in all cases, as
1178 all of this lives in the init section and is thrown away after the
1179 kernel boots completely.
1180
Bryan Wu1394f032007-05-06 14:50:22 -07001181config DUAL_CORE_TEST_MODULE
1182 tristate "Dual Core Test Module"
1183 depends on (BF561)
1184 default n
1185 help
1186 Say Y here to build-in dual core test module for dual core test.
1187
1188config CPLB_INFO
1189 bool "Display the CPLB information"
1190 help
1191 Display the CPLB information.
1192
1193config ACCESS_CHECK
1194 bool "Check the user pointer address"
1195 default y
1196 help
1197 Usually the pointer transfer from user space is checked to see if its
1198 address is in the kernel space.
1199
1200 Say N here to disable that check to improve the performance.
1201
1202endmenu
1203
1204source "security/Kconfig"
1205
1206source "crypto/Kconfig"
1207
1208source "lib/Kconfig"