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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Low-Level PCI Access for i386 machines
3 *
4 * Copyright 1993, 1994 Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * Drew@Colorado.EDU
8 * +1 (303) 786-7975
9 *
10 * Drew's work was sponsored by:
11 * iX Multiuser Multitasking Magazine
12 * Hannover, Germany
13 * hm@ix.de
14 *
15 * Copyright 1997--2000 Martin Mares <mj@ucw.cz>
16 *
17 * For more information, please consult the following manuals (look at
18 * http://www.pcisig.com/ for how to get them):
19 *
20 * PCI BIOS Specification
21 * PCI Local Bus Specification
22 * PCI to PCI Bridge Specification
23 * PCI System Design Guide
24 *
25 */
26
27#include <linux/types.h>
28#include <linux/kernel.h>
29#include <linux/pci.h>
30#include <linux/init.h>
31#include <linux/ioport.h>
32#include <linux/errno.h>
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -070033#include <linux/bootmem.h>
34
35#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37#include "pci.h"
38
Gary Hade036fff42007-10-03 15:56:14 -070039static int
40skip_isa_ioresource_align(struct pci_dev *dev) {
41
42 if ((pci_probe & PCI_CAN_SKIP_ISA_ALIGN) &&
Gary Hade11949252007-10-08 16:24:16 -070043 !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
Gary Hade036fff42007-10-03 15:56:14 -070044 return 1;
45 return 0;
46}
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048/*
49 * We need to avoid collisions with `mirrored' VGA ports
50 * and other strange ISA hardware, so we always want the
51 * addresses to be allocated in the 0x000-0x0ff region
52 * modulo 0x400.
53 *
54 * Why? Because some silly external IO cards only decode
55 * the low 10 bits of the IO address. The 0x00-0xff region
56 * is reserved for motherboard devices that decode all 16
57 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
58 * but we want to try to avoid allocating at 0x2900-0x2bff
59 * which might have be mirrored at 0x0100-0x03ff..
60 */
61void
62pcibios_align_resource(void *data, struct resource *res,
Greg Kroah-Hartmane31dd6e2006-06-12 17:06:02 -070063 resource_size_t size, resource_size_t align)
Linus Torvalds1da177e2005-04-16 15:20:36 -070064{
Gary Hade036fff42007-10-03 15:56:14 -070065 struct pci_dev *dev = data;
66
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 if (res->flags & IORESOURCE_IO) {
Greg Kroah-Hartmane31dd6e2006-06-12 17:06:02 -070068 resource_size_t start = res->start;
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Gary Hade036fff42007-10-03 15:56:14 -070070 if (skip_isa_ioresource_align(dev))
71 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 if (start & 0x300) {
73 start = (start + 0x3ff) & ~0x3ff;
74 res->start = start;
75 }
76 }
77}
Dave Airlie6c00a612007-10-29 18:06:10 +100078EXPORT_SYMBOL(pcibios_align_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
80/*
81 * Handle resources of PCI devices. If the world were perfect, we could
82 * just allocate all the resource regions and do nothing more. It isn't.
83 * On the other hand, we cannot just re-allocate all devices, as it would
84 * require us to know lots of host bridge internals. So we attempt to
85 * keep as much of the original configuration as possible, but tweak it
86 * when it's found to be wrong.
87 *
88 * Known BIOS problems we have to work around:
89 * - I/O or memory regions not configured
90 * - regions configured, but not enabled in the command register
91 * - bogus I/O addresses above 64K used
92 * - expansion ROMs left enabled (this may sound harmless, but given
93 * the fact the PCI specs explicitly allow address decoders to be
94 * shared between expansion ROMs and other resource regions, it's
95 * at least dangerous)
96 *
97 * Our solution:
98 * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
99 * This gives us fixed barriers on where we can allocate.
100 * (2) Allocate resources for all enabled devices. If there is
101 * a collision, just mark the resource as unallocated. Also
102 * disable expansion ROMs during this step.
103 * (3) Try to allocate resources for disabled devices. If the
104 * resources were assigned correctly, everything goes well,
105 * if they weren't, they won't disturb allocation of other
106 * resources.
107 * (4) Assign new addresses to resources which were either
108 * not configured at all or misconfigured. If explicitly
109 * requested by the user, configure expansion ROM address
110 * as well.
111 */
112
113static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
114{
115 struct pci_bus *bus;
116 struct pci_dev *dev;
117 int idx;
118 struct resource *r, *pr;
119
120 /* Depth-First Search on bus tree */
121 list_for_each_entry(bus, bus_list, node) {
122 if ((dev = bus->self)) {
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700123 for (idx = PCI_BRIDGE_RESOURCES;
124 idx < PCI_NUM_RESOURCES; idx++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 r = &dev->resource[idx];
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400126 if (!r->flags)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 continue;
128 pr = pci_find_parent_resource(dev, r);
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700129 if (!r->start || !pr ||
130 request_resource(pr, r) < 0) {
131 printk(KERN_ERR "PCI: Cannot allocate "
132 "resource region %d "
133 "of bridge %s\n",
134 idx, pci_name(dev));
135 /*
136 * Something is wrong with the region.
137 * Invalidate the resource to prevent
138 * child resource allocations in this
139 * range.
140 */
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400141 r->flags = 0;
142 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 }
144 }
145 pcibios_allocate_bus_resources(&bus->children);
146 }
147}
148
149static void __init pcibios_allocate_resources(int pass)
150{
151 struct pci_dev *dev = NULL;
152 int idx, disabled;
153 u16 command;
154 struct resource *r, *pr;
155
156 for_each_pci_dev(dev) {
157 pci_read_config_word(dev, PCI_COMMAND, &command);
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700158 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 r = &dev->resource[idx];
160 if (r->parent) /* Already allocated */
161 continue;
162 if (!r->start) /* Address not assigned at all */
163 continue;
164 if (r->flags & IORESOURCE_IO)
165 disabled = !(command & PCI_COMMAND_IO);
166 else
167 disabled = !(command & PCI_COMMAND_MEMORY);
168 if (pass == disabled) {
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700169 DBG("PCI: Resource %08lx-%08lx "
170 "(f=%lx, d=%d, p=%d)\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 r->start, r->end, r->flags, disabled, pass);
172 pr = pci_find_parent_resource(dev, r);
173 if (!pr || request_resource(pr, r) < 0) {
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700174 printk(KERN_ERR "PCI: Cannot allocate "
175 "resource region %d "
176 "of device %s\n",
177 idx, pci_name(dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 /* We'll assign a new address later */
179 r->end -= r->start;
180 r->start = 0;
181 }
182 }
183 }
184 if (!pass) {
185 r = &dev->resource[PCI_ROM_RESOURCE];
186 if (r->flags & IORESOURCE_ROM_ENABLE) {
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700187 /* Turn the ROM off, leave the resource region,
188 * but keep it unregistered. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 u32 reg;
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700190 DBG("PCI: Switching off ROM of %s\n",
191 pci_name(dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192 r->flags &= ~IORESOURCE_ROM_ENABLE;
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700193 pci_read_config_dword(dev,
194 dev->rom_base_reg, &reg);
195 pci_write_config_dword(dev, dev->rom_base_reg,
196 reg & ~PCI_ROM_ADDRESS_ENABLE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 }
198 }
199 }
200}
201
202static int __init pcibios_assign_resources(void)
203{
204 struct pci_dev *dev = NULL;
Ivan Kokshaysky81d4af12005-08-30 18:48:52 +0400205 struct resource *r, *pr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206
Ivan Kokshaysky81d4af12005-08-30 18:48:52 +0400207 if (!(pci_probe & PCI_ASSIGN_ROMS)) {
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700208 /*
209 * Try to use BIOS settings for ROMs, otherwise let
210 * pci_assign_unassigned_resources() allocate the new
211 * addresses.
212 */
Ivan Kokshaysky81d4af12005-08-30 18:48:52 +0400213 for_each_pci_dev(dev) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 r = &dev->resource[PCI_ROM_RESOURCE];
Ivan Kokshaysky81d4af12005-08-30 18:48:52 +0400215 if (!r->flags || !r->start)
216 continue;
217 pr = pci_find_parent_resource(dev, r);
218 if (!pr || request_resource(pr, r) < 0) {
219 r->end -= r->start;
220 r->start = 0;
221 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 }
223 }
Ivan Kokshaysky81d4af12005-08-30 18:48:52 +0400224
225 pci_assign_unassigned_resources();
226
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227 return 0;
228}
229
230void __init pcibios_resource_survey(void)
231{
232 DBG("PCI: Allocating resources\n");
233 pcibios_allocate_bus_resources(&pci_root_buses);
234 pcibios_allocate_resources(0);
235 pcibios_allocate_resources(1);
236}
237
238/**
239 * called in fs_initcall (one below subsys_initcall),
240 * give a chance for motherboard reserve resources
241 */
242fs_initcall(pcibios_assign_resources);
243
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244/*
245 * If we set up a device for bus mastering, we need to check the latency
246 * timer as certain crappy BIOSes forget to set it properly.
247 */
248unsigned int pcibios_max_latency = 255;
249
250void pcibios_set_master(struct pci_dev *dev)
251{
252 u8 lat;
253 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
254 if (lat < 16)
255 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
256 else if (lat > pcibios_max_latency)
257 lat = pcibios_max_latency;
258 else
259 return;
Randy Dunlap7edab2f2006-10-17 10:17:58 -0700260 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
261 pci_name(dev), lat);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
263}
264
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700265static void pci_unmap_page_range(struct vm_area_struct *vma)
266{
267 u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
268 free_memtype(addr, addr + vma->vm_end - vma->vm_start);
269}
270
271static void pci_track_mmap_page_range(struct vm_area_struct *vma)
272{
273 u64 addr = (u64)vma->vm_pgoff << PAGE_SHIFT;
274 unsigned long flags = pgprot_val(vma->vm_page_prot)
275 & _PAGE_CACHE_MASK;
276
277 reserve_memtype(addr, addr + vma->vm_end - vma->vm_start, flags, NULL);
278}
279
280static struct vm_operations_struct pci_mmap_ops = {
281 .open = pci_track_mmap_page_range,
282 .close = pci_unmap_page_range,
283};
284
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
286 enum pci_mmap_state mmap_state, int write_combine)
287{
288 unsigned long prot;
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700289 u64 addr = vma->vm_pgoff << PAGE_SHIFT;
290 unsigned long len = vma->vm_end - vma->vm_start;
291 unsigned long flags;
292 unsigned long new_flags;
Venki Pallipadidee7cbb2008-03-24 14:39:55 -0700293 int retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294
295 /* I/O space cannot be accessed via normal processor loads and
296 * stores on this platform.
297 */
298 if (mmap_state == pci_mmap_io)
299 return -EINVAL;
300
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 prot = pgprot_val(vma->vm_page_prot);
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700302 if (pat_wc_enabled && write_combine)
303 prot |= _PAGE_CACHE_WC;
Suresh Siddhade33c442008-04-25 17:07:22 -0700304 else if (pat_wc_enabled)
305 /*
306 * ioremap() and ioremap_nocache() defaults to UC MINUS for now.
307 * To avoid attribute conflicts, request UC MINUS here
308 * aswell.
309 */
310 prot |= _PAGE_CACHE_UC_MINUS;
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700311 else if (boot_cpu_data.x86 > 3)
312 prot |= _PAGE_CACHE_UC;
313
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 vma->vm_page_prot = __pgprot(prot);
315
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700316 flags = pgprot_val(vma->vm_page_prot) & _PAGE_CACHE_MASK;
Venki Pallipadidee7cbb2008-03-24 14:39:55 -0700317 retval = reserve_memtype(addr, addr + len, flags, &new_flags);
318 if (retval)
319 return retval;
320
321 if (flags != new_flags) {
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700322 /*
323 * Do not fallback to certain memory types with certain
324 * requested type:
325 * - request is uncached, return cannot be write-back
326 * - request is uncached, return cannot be write-combine
327 * - request is write-combine, return cannot be write-back
328 */
Suresh Siddhade33c442008-04-25 17:07:22 -0700329 if ((flags == _PAGE_CACHE_UC_MINUS &&
330 (new_flags == _PAGE_CACHE_WB)) ||
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700331 (flags == _PAGE_CACHE_WC &&
332 new_flags == _PAGE_CACHE_WB)) {
333 free_memtype(addr, addr+len);
334 return -EINVAL;
335 }
336 flags = new_flags;
337 }
338
339 if (vma->vm_pgoff <= max_pfn_mapped &&
340 ioremap_change_attr((unsigned long)__va(addr), len, flags)) {
341 free_memtype(addr, addr + len);
342 return -EINVAL;
343 }
344
Michael S. Tsirkin346d3882005-07-31 11:51:45 +0300345 if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
346 vma->vm_end - vma->vm_start,
347 vma->vm_page_prot))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 return -EAGAIN;
349
venkatesh.pallipadi@intel.com03d72aa2008-03-18 17:00:19 -0700350 vma->vm_ops = &pci_mmap_ops;
351
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352 return 0;
353}