blob: f194a848ae8e75c18f191aba79528d1623a76837 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
2 * File: include/asm-blackfin/mach-bf537/bf537.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description: SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF537
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30#ifndef __MACH_BF537_H__
31#define __MACH_BF537_H__
32
Bryan Wu1394f032007-05-06 14:50:22 -070033/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */
34
35#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */
36#define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORTx_STAT */
37#define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */
38#define EMAC_ERR_MASK (PHYINT | MMCINT | RXFSINT | TXFSINT | WAKEDET | RXDMAERR | TXDMAERR | STMDONE) /* EMAC_SYSTAT */
39#define UART_ERR_MASK_STAT1 (0x4) /* UARTx_IIR */
40#define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */
41#define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */
42
43#define OFFSET_(x) ((x) & 0x0000FFFF)
44
45/*some misc defines*/
46#define IMASK_IVG15 0x8000
47#define IMASK_IVG14 0x4000
48#define IMASK_IVG13 0x2000
49#define IMASK_IVG12 0x1000
50
51#define IMASK_IVG11 0x0800
52#define IMASK_IVG10 0x0400
53#define IMASK_IVG9 0x0200
54#define IMASK_IVG8 0x0100
55
56#define IMASK_IVG7 0x0080
57#define IMASK_IVGTMR 0x0040
58#define IMASK_IVGHW 0x0020
59
60/***************************/
61
62
Robin Getz3bebca22007-10-10 23:55:26 +080063#define BFIN_DSUBBANKS 4
64#define BFIN_DWAYS 2
65#define BFIN_DLINES 64
66#define BFIN_ISUBBANKS 4
67#define BFIN_IWAYS 4
68#define BFIN_ILINES 32
Bryan Wu1394f032007-05-06 14:50:22 -070069
70#define WAY0_L 0x1
71#define WAY1_L 0x2
72#define WAY01_L 0x3
73#define WAY2_L 0x4
74#define WAY02_L 0x5
75#define WAY12_L 0x6
76#define WAY012_L 0x7
77
78#define WAY3_L 0x8
79#define WAY03_L 0x9
80#define WAY13_L 0xA
81#define WAY013_L 0xB
82
83#define WAY32_L 0xC
84#define WAY320_L 0xD
85#define WAY321_L 0xE
86#define WAYALL_L 0xF
87
88#define DMC_ENABLE (2<<2) /*yes, 2, not 1 */
89
90/********************************* EBIU Settings ************************************/
91#define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
92#define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
93
94#ifdef CONFIG_C_AMBEN_ALL
95#define V_AMBEN AMBEN_ALL
96#endif
97#ifdef CONFIG_C_AMBEN
98#define V_AMBEN 0x0
99#endif
100#ifdef CONFIG_C_AMBEN_B0
101#define V_AMBEN AMBEN_B0
102#endif
103#ifdef CONFIG_C_AMBEN_B0_B1
104#define V_AMBEN AMBEN_B0_B1
105#endif
106#ifdef CONFIG_C_AMBEN_B0_B1_B2
107#define V_AMBEN AMBEN_B0_B1_B2
108#endif
109#ifdef CONFIG_C_AMCKEN
110#define V_AMCKEN AMCKEN
111#else
112#define V_AMCKEN 0x0
113#endif
114#ifdef CONFIG_C_CDPRIO
115#define V_CDPRIO 0x100
116#else
117#define V_CDPRIO 0x0
118#endif
119
120#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO)
121
Bryan Wu1394f032007-05-06 14:50:22 -0700122#ifdef CONFIG_BF537
123#define CPU "BF537"
Robin Getze482cad2008-10-10 18:21:45 +0800124#define CPUID 0x27c8
Bryan Wu1394f032007-05-06 14:50:22 -0700125#endif
126#ifdef CONFIG_BF536
127#define CPU "BF536"
Robin Getze482cad2008-10-10 18:21:45 +0800128#define CPUID 0x27c8
Bryan Wu1394f032007-05-06 14:50:22 -0700129#endif
130#ifdef CONFIG_BF534
131#define CPU "BF534"
Robin Getze482cad2008-10-10 18:21:45 +0800132#define CPUID 0x27c6
Bryan Wu1394f032007-05-06 14:50:22 -0700133#endif
Robin Getze482cad2008-10-10 18:21:45 +0800134
Bryan Wu1394f032007-05-06 14:50:22 -0700135#ifndef CPU
Mike Frysinger25632652008-10-28 14:11:45 +0800136#error "Unknown CPU type - This kernel doesn't seem to be configured properly"
Bryan Wu1394f032007-05-06 14:50:22 -0700137#endif
138
Bryan Wu1394f032007-05-06 14:50:22 -0700139#endif /* __MACH_BF537_H__ */