Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/sh/boards/magicpanel/setup.c |
| 3 | * |
| 4 | * Copyright (C) 2007 Markus Brunner, Mark Jonas |
| 5 | * |
| 6 | * Magic Panel Release 2 board setup |
| 7 | * |
| 8 | * This file is subject to the terms and conditions of the GNU General Public |
| 9 | * License. See the file "COPYING" in the main directory of this archive |
| 10 | * for more details. |
| 11 | */ |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/platform_device.h> |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 15 | #include <linux/delay.h> |
Magnus Damm | 843284d | 2008-10-08 20:42:56 +0900 | [diff] [blame] | 16 | #include <linux/gpio.h> |
Steve Glendinning | 02da916 | 2009-01-07 17:21:29 +0900 | [diff] [blame] | 17 | #include <linux/smsc911x.h> |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 18 | #include <linux/mtd/mtd.h> |
| 19 | #include <linux/mtd/partitions.h> |
| 20 | #include <linux/mtd/physmap.h> |
| 21 | #include <linux/mtd/map.h> |
Paul Mundt | 7639a45 | 2008-10-20 13:02:48 +0900 | [diff] [blame] | 22 | #include <mach/magicpanelr2.h> |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 23 | #include <asm/heartbeat.h> |
Paul Mundt | f727565 | 2008-10-20 12:04:53 +0900 | [diff] [blame] | 24 | #include <cpu/sh7720.h> |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 25 | |
| 26 | #define LAN9115_READY (ctrl_inl(0xA8000084UL) & 0x00000001UL) |
| 27 | |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 28 | /* Prefer cmdline over RedBoot */ |
| 29 | static const char *probes[] = { "cmdlinepart", "RedBoot", NULL }; |
| 30 | |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 31 | /* Wait until reset finished. Timeout is 100ms. */ |
| 32 | static int __init ethernet_reset_finished(void) |
| 33 | { |
| 34 | int i; |
| 35 | |
| 36 | if (LAN9115_READY) |
| 37 | return 1; |
| 38 | |
| 39 | for (i = 0; i < 10; ++i) { |
| 40 | mdelay(10); |
| 41 | if (LAN9115_READY) |
| 42 | return 1; |
| 43 | } |
| 44 | |
| 45 | return 0; |
| 46 | } |
| 47 | |
| 48 | static void __init reset_ethernet(void) |
| 49 | { |
| 50 | /* PMDR: LAN_RESET=on */ |
| 51 | CLRBITS_OUTB(0x10, PORT_PMDR); |
| 52 | |
| 53 | udelay(200); |
| 54 | |
| 55 | /* PMDR: LAN_RESET=off */ |
| 56 | SETBITS_OUTB(0x10, PORT_PMDR); |
| 57 | } |
| 58 | |
| 59 | static void __init setup_chip_select(void) |
| 60 | { |
| 61 | /* CS2: LAN (0x08000000 - 0x0bffffff) */ |
| 62 | /* no idle cycles, normal space, 8 bit data bus */ |
| 63 | ctrl_outl(0x36db0400, CS2BCR); |
| 64 | /* (SW:1.5 WR:3 HW:1.5), ext. wait */ |
| 65 | ctrl_outl(0x000003c0, CS2WCR); |
| 66 | |
| 67 | /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ |
| 68 | /* no idle cycles, normal space, 8 bit data bus */ |
| 69 | ctrl_outl(0x00000200, CS4BCR); |
| 70 | /* (SW:1.5 WR:3 HW:1.5), ext. wait */ |
| 71 | ctrl_outl(0x00100981, CS4WCR); |
| 72 | |
| 73 | /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ |
| 74 | /* no idle cycles, normal space, 8 bit data bus */ |
| 75 | ctrl_outl(0x00000200, CS5ABCR); |
| 76 | /* (SW:1.5 WR:3 HW:1.5), ext. wait */ |
| 77 | ctrl_outl(0x00100981, CS5AWCR); |
| 78 | |
| 79 | /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ |
| 80 | /* no idle cycles, normal space, 8 bit data bus */ |
| 81 | ctrl_outl(0x00000200, CS5BBCR); |
| 82 | /* (SW:1.5 WR:3 HW:1.5), ext. wait */ |
| 83 | ctrl_outl(0x00100981, CS5BWCR); |
| 84 | |
| 85 | /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ |
| 86 | /* no idle cycles, normal space, 8 bit data bus */ |
| 87 | ctrl_outl(0x00000200, CS6ABCR); |
| 88 | /* (SW:1.5 WR:3 HW:1.5), no ext. wait */ |
| 89 | ctrl_outl(0x001009C1, CS6AWCR); |
| 90 | } |
| 91 | |
| 92 | static void __init setup_port_multiplexing(void) |
| 93 | { |
| 94 | /* A7 GPO(LED8); A6 GPO(LED7); A5 GPO(LED6); A4 GPO(LED5); |
| 95 | * A3 GPO(LED4); A2 GPO(LED3); A1 GPO(LED2); A0 GPO(LED1); |
| 96 | */ |
| 97 | ctrl_outw(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ |
| 98 | |
| 99 | /* B7 GPO(RST4); B6 GPO(RST3); B5 GPO(RST2); B4 GPO(RST1); |
| 100 | * B3 GPO(PB3); B2 GPO(PB2); B1 GPO(PB1); B0 GPO(PB0); |
| 101 | */ |
| 102 | ctrl_outw(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ |
| 103 | |
| 104 | /* C7 GPO(PC7); C6 GPO(PC6); C5 GPO(PC5); C4 GPO(PC4); |
| 105 | * C3 LCD_DATA3; C2 LCD_DATA2; C1 LCD_DATA1; C0 LCD_DATA0; |
| 106 | */ |
| 107 | ctrl_outw(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ |
| 108 | |
| 109 | /* D7 GPO(PD7); D6 GPO(PD6); D5 GPO(PD5); D4 GPO(PD4); |
| 110 | * D3 GPO(PD3); D2 GPO(PD2); D1 GPO(PD1); D0 GPO(PD0); |
| 111 | */ |
| 112 | ctrl_outw(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ |
| 113 | |
| 114 | /* E7 (x); E6 GPI(nu); E5 GPI(nu); E4 LCD_M_DISP; |
| 115 | * E3 LCD_CL1; E2 LCD_CL2; E1 LCD_DON; E0 LCD_FLM; |
| 116 | */ |
| 117 | ctrl_outw(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ |
| 118 | |
| 119 | /* F7 (x); F6 DA1(VLCD); F5 DA0(nc); F4 AN3; |
| 120 | * F3 AN2(MID_AD); F2 AN1(EARTH_AD); F1 AN0(TEMP); F0 GPI+(nc); |
| 121 | */ |
| 122 | ctrl_outw(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ |
| 123 | |
| 124 | /* G7 (x); G6 IRQ5(TOUCH_BUSY); G5 IRQ4(TOUCH_IRQ); G4 GPI(KEY2); |
| 125 | * G3 GPI(KEY1); G2 GPO(LED11); G1 GPO(LED10); G0 GPO(LED9); |
| 126 | */ |
| 127 | ctrl_outw(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ |
| 128 | |
| 129 | /* H7 (x); H6 /RAS(BRAS); H5 /CAS(BCAS); H4 CKE(BCKE); |
| 130 | * H3 GPO(EARTH_OFF); H2 GPO(EARTH_TEST); H1 USB2_PWR; H0 USB1_PWR; |
| 131 | */ |
| 132 | ctrl_outw(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ |
| 133 | |
| 134 | /* J7 (x); J6 AUDCK; J5 ASEBRKAK; J4 AUDATA3; |
| 135 | * J3 AUDATA2; J2 AUDATA1; J1 AUDATA0; J0 AUDSYNC; |
| 136 | */ |
| 137 | ctrl_outw(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ |
| 138 | |
| 139 | /* K7 (x); K6 (x); K5 (x); K4 (x); |
| 140 | * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) |
| 141 | */ |
| 142 | ctrl_outw(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ |
| 143 | |
| 144 | /* L7 TRST; L6 TMS; L5 TDO; L4 TDI; |
| 145 | * L3 TCK; L2 (x); L1 (x); L0 (x); |
| 146 | */ |
| 147 | ctrl_outw(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ |
| 148 | |
| 149 | /* M7 GPO(CURRENT_SINK); M6 GPO(PWR_SWITCH); M5 GPO(LAN_SPEED); |
| 150 | * M4 GPO(LAN_RESET); M3 GPO(BUZZER); M2 GPO(LCD_BL); |
| 151 | * M1 CS5B(CAN3_CS); M0 GPI+(nc); |
| 152 | */ |
| 153 | ctrl_outw(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ |
| 154 | |
| 155 | /* CURRENT_SINK=off, PWR_SWITCH=off, LAN_SPEED=100MBit, |
| 156 | * LAN_RESET=off, BUZZER=off, LCD_BL=off |
| 157 | */ |
| 158 | #if CONFIG_SH_MAGIC_PANEL_R2_VERSION == 2 |
| 159 | ctrl_outb(0x30, PORT_PMDR); |
| 160 | #elif CONFIG_SH_MAGIC_PANEL_R2_VERSION == 3 |
| 161 | ctrl_outb(0xF0, PORT_PMDR); |
| 162 | #else |
| 163 | #error Unknown revision of PLATFORM_MP_R2 |
| 164 | #endif |
| 165 | |
| 166 | /* P7 (x); P6 (x); P5 (x); |
| 167 | * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); |
| 168 | * P1 IRQ1(CAN2_IRQ); P0 IRQ0(CAN1_IRQ) |
| 169 | */ |
| 170 | ctrl_outw(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ |
| 171 | ctrl_outb(0x10, PORT_PPDR); |
| 172 | |
| 173 | /* R7 A25; R6 A24; R5 A23; R4 A22; |
| 174 | * R3 A21; R2 A20; R1 A19; R0 A0; |
| 175 | */ |
Magnus Damm | 843284d | 2008-10-08 20:42:56 +0900 | [diff] [blame] | 176 | gpio_request(GPIO_FN_A25, NULL); |
| 177 | gpio_request(GPIO_FN_A24, NULL); |
| 178 | gpio_request(GPIO_FN_A23, NULL); |
| 179 | gpio_request(GPIO_FN_A22, NULL); |
| 180 | gpio_request(GPIO_FN_A21, NULL); |
| 181 | gpio_request(GPIO_FN_A20, NULL); |
| 182 | gpio_request(GPIO_FN_A19, NULL); |
| 183 | gpio_request(GPIO_FN_A0, NULL); |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 184 | |
| 185 | /* S7 (x); S6 (x); S5 (x); S4 GPO(EEPROM_CS2); |
| 186 | * S3 GPO(EEPROM_CS1); S2 SIOF0_TXD; S1 SIOF0_RXD; S0 SIOF0_SCK; |
| 187 | */ |
| 188 | ctrl_outw(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ |
| 189 | |
| 190 | /* T7 (x); T6 (x); T5 (x); T4 COM1_CTS; |
| 191 | * T3 COM1_RTS; T2 COM1_TXD; T1 COM1_RXD; T0 GPO(WDOG) |
| 192 | */ |
| 193 | ctrl_outw(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ |
| 194 | |
| 195 | /* U7 (x); U6 (x); U5 (x); U4 GPI+(/AC_FAULT); |
| 196 | * U3 GPO(TOUCH_CS); U2 TOUCH_TXD; U1 TOUCH_RXD; U0 TOUCH_SCK; |
| 197 | */ |
| 198 | ctrl_outw(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ |
| 199 | |
| 200 | /* V7 (x); V6 (x); V5 (x); V4 GPO(MID2); |
| 201 | * V3 GPO(MID1); V2 CARD_TxD; V1 CARD_RxD; V0 GPI+(/BAT_FAULT); |
| 202 | */ |
| 203 | ctrl_outw(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ |
| 204 | } |
| 205 | |
| 206 | static void __init mpr2_setup(char **cmdline_p) |
| 207 | { |
| 208 | __set_io_port_base(0xa0000000); |
| 209 | |
| 210 | /* set Pin Select Register A: |
| 211 | * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, |
| 212 | * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND |
| 213 | */ |
| 214 | ctrl_outw(0xAABC, PORT_PSELA); |
| 215 | /* set Pin Select Register B: |
| 216 | * /SCIF0_RTS, /SCIF0_CTS, LCD_VCPWC, |
| 217 | * LCD_VEPWC, IIC_SDA, IIC_SCL, Reserved |
| 218 | */ |
| 219 | ctrl_outw(0x3C00, PORT_PSELB); |
| 220 | /* set Pin Select Register C: |
| 221 | * SIOF1_SCK, SIOF1_RxD, SCIF1_RxD, SCIF1_TxD, Reserved |
| 222 | */ |
| 223 | ctrl_outw(0x0000, PORT_PSELC); |
| 224 | /* set Pin Select Register D: Reserved, SIOF1_TxD, Reserved, SIOF1_MCLK, |
| 225 | * Reserved, SIOF1_SYNC, Reserved, SCIF1_SCK, Reserved |
| 226 | */ |
| 227 | ctrl_outw(0x0000, PORT_PSELD); |
| 228 | /* set USB TxRx Control: Reserved, DRV, Reserved, USB_TRANS, USB_SEL */ |
| 229 | ctrl_outw(0x0101, PORT_UTRCTL); |
| 230 | /* set USB Clock Control: USSCS, USSTB, Reserved (HighByte always A5) */ |
| 231 | ctrl_outw(0xA5C0, PORT_UCLKCR_W); |
| 232 | |
| 233 | setup_chip_select(); |
| 234 | |
| 235 | setup_port_multiplexing(); |
| 236 | |
| 237 | reset_ethernet(); |
| 238 | |
| 239 | printk(KERN_INFO "Magic Panel Release 2 A.%i\n", |
| 240 | CONFIG_SH_MAGIC_PANEL_R2_VERSION); |
| 241 | |
| 242 | if (ethernet_reset_finished() == 0) |
| 243 | printk(KERN_WARNING "Ethernet not ready\n"); |
| 244 | } |
| 245 | |
Steve Glendinning | 02da916 | 2009-01-07 17:21:29 +0900 | [diff] [blame] | 246 | static struct resource smsc911x_resources[] = { |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 247 | [0] = { |
| 248 | .start = 0xa8000000, |
| 249 | .end = 0xabffffff, |
| 250 | .flags = IORESOURCE_MEM, |
| 251 | }, |
| 252 | [1] = { |
| 253 | .start = 35, |
| 254 | .end = 35, |
| 255 | .flags = IORESOURCE_IRQ, |
| 256 | }, |
| 257 | }; |
| 258 | |
Steve Glendinning | 02da916 | 2009-01-07 17:21:29 +0900 | [diff] [blame] | 259 | static struct smsc911x_platform_config smsc911x_config = { |
| 260 | .phy_interface = PHY_INTERFACE_MODE_MII, |
| 261 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 262 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, |
| 263 | .flags = SMSC911X_USE_32BIT, |
| 264 | }; |
| 265 | |
| 266 | static struct platform_device smsc911x_device = { |
| 267 | .name = "smsc911x", |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 268 | .id = -1, |
Steve Glendinning | 02da916 | 2009-01-07 17:21:29 +0900 | [diff] [blame] | 269 | .num_resources = ARRAY_SIZE(smsc911x_resources), |
| 270 | .resource = smsc911x_resources, |
| 271 | .dev = { |
| 272 | .platform_data = &smsc911x_config, |
| 273 | }, |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 274 | }; |
| 275 | |
| 276 | static struct resource heartbeat_resources[] = { |
| 277 | [0] = { |
| 278 | .start = PA_LED, |
| 279 | .end = PA_LED, |
| 280 | .flags = IORESOURCE_MEM, |
| 281 | }, |
| 282 | }; |
| 283 | |
| 284 | static struct heartbeat_data heartbeat_data = { |
| 285 | .flags = HEARTBEAT_INVERTED, |
| 286 | }; |
| 287 | |
| 288 | static struct platform_device heartbeat_device = { |
| 289 | .name = "heartbeat", |
| 290 | .id = -1, |
| 291 | .dev = { |
| 292 | .platform_data = &heartbeat_data, |
| 293 | }, |
| 294 | .num_resources = ARRAY_SIZE(heartbeat_resources), |
| 295 | .resource = heartbeat_resources, |
| 296 | }; |
| 297 | |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 298 | static struct mtd_partition *parsed_partitions; |
| 299 | |
| 300 | static struct mtd_partition mpr2_partitions[] = { |
| 301 | /* Reserved for bootloader, read-only */ |
| 302 | { |
| 303 | .name = "Bootloader", |
| 304 | .offset = 0x00000000UL, |
| 305 | .size = MPR2_MTD_BOOTLOADER_SIZE, |
| 306 | .mask_flags = MTD_WRITEABLE, |
| 307 | }, |
| 308 | /* Reserved for kernel image */ |
| 309 | { |
| 310 | .name = "Kernel", |
| 311 | .offset = MTDPART_OFS_NXTBLK, |
| 312 | .size = MPR2_MTD_KERNEL_SIZE, |
| 313 | }, |
| 314 | /* Rest is used for Flash FS */ |
| 315 | { |
| 316 | .name = "Flash_FS", |
| 317 | .offset = MTDPART_OFS_NXTBLK, |
| 318 | .size = MTDPART_SIZ_FULL, |
| 319 | } |
| 320 | }; |
| 321 | |
| 322 | static struct physmap_flash_data flash_data = { |
| 323 | .width = 2, |
| 324 | }; |
| 325 | |
| 326 | static struct resource flash_resource = { |
| 327 | .start = 0x00000000, |
| 328 | .end = 0x2000000UL, |
| 329 | .flags = IORESOURCE_MEM, |
| 330 | }; |
| 331 | |
| 332 | static struct platform_device flash_device = { |
| 333 | .name = "physmap-flash", |
| 334 | .id = -1, |
| 335 | .resource = &flash_resource, |
| 336 | .num_resources = 1, |
| 337 | .dev = { |
| 338 | .platform_data = &flash_data, |
| 339 | }, |
| 340 | }; |
| 341 | |
| 342 | static struct mtd_info *flash_mtd; |
| 343 | |
| 344 | static struct map_info mpr2_flash_map = { |
| 345 | .name = "Magic Panel R2 Flash", |
| 346 | .size = 0x2000000UL, |
| 347 | .bankwidth = 2, |
| 348 | }; |
| 349 | |
| 350 | static void __init set_mtd_partitions(void) |
| 351 | { |
| 352 | int nr_parts = 0; |
| 353 | |
| 354 | simple_map_init(&mpr2_flash_map); |
| 355 | flash_mtd = do_map_probe("cfi_probe", &mpr2_flash_map); |
| 356 | nr_parts = parse_mtd_partitions(flash_mtd, probes, |
| 357 | &parsed_partitions, 0); |
| 358 | /* If there is no partition table, used the hard coded table */ |
| 359 | if (nr_parts <= 0) { |
| 360 | flash_data.parts = mpr2_partitions; |
| 361 | flash_data.nr_parts = ARRAY_SIZE(mpr2_partitions); |
| 362 | } else { |
| 363 | flash_data.nr_parts = nr_parts; |
| 364 | flash_data.parts = parsed_partitions; |
| 365 | } |
| 366 | } |
| 367 | |
| 368 | /* |
| 369 | * Add all resources to the platform_device |
| 370 | */ |
| 371 | |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 372 | static struct platform_device *mpr2_devices[] __initdata = { |
| 373 | &heartbeat_device, |
Steve Glendinning | 02da916 | 2009-01-07 17:21:29 +0900 | [diff] [blame] | 374 | &smsc911x_device, |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 375 | &flash_device, |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 376 | }; |
| 377 | |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 378 | |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 379 | static int __init mpr2_devices_setup(void) |
| 380 | { |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 381 | set_mtd_partitions(); |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 382 | return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices)); |
| 383 | } |
| 384 | device_initcall(mpr2_devices_setup); |
| 385 | |
| 386 | /* |
| 387 | * Initialize IRQ setting |
| 388 | */ |
| 389 | static void __init init_mpr2_IRQ(void) |
| 390 | { |
| 391 | plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */ |
| 392 | |
| 393 | set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ |
| 394 | set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ |
| 395 | set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ |
| 396 | set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ |
| 397 | set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ |
| 398 | set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ |
| 399 | |
| 400 | intc_set_priority(32, 13); /* IRQ0 CAN1 */ |
| 401 | intc_set_priority(33, 13); /* IRQ0 CAN2 */ |
| 402 | intc_set_priority(34, 13); /* IRQ0 CAN3 */ |
| 403 | intc_set_priority(35, 6); /* IRQ3 SMSC9115 */ |
| 404 | } |
| 405 | |
| 406 | /* |
| 407 | * The Machine Vector |
| 408 | */ |
| 409 | |
| 410 | static struct sh_machine_vector mv_mpr2 __initmv = { |
| 411 | .mv_name = "mpr2", |
| 412 | .mv_setup = mpr2_setup, |
Markus Brunner | e87ab0c | 2007-09-21 15:27:35 +0900 | [diff] [blame] | 413 | .mv_init_irq = init_mpr2_IRQ, |
Markus Brunner | ded5431 | 2007-09-12 11:54:58 +0900 | [diff] [blame] | 414 | }; |