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Nicolas Pitref40219b2006-11-17 01:07:26 -05001/*
2 * Philips UCB1400 touchscreen driver
3 *
4 * Author: Nicolas Pitre
5 * Created: September 25, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
13 * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
14 * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
15 */
16
17#include <linux/module.h>
18#include <linux/moduleparam.h>
19#include <linux/init.h>
Nicolas Pitref40219b2006-11-17 01:07:26 -050020#include <linux/completion.h>
21#include <linux/delay.h>
22#include <linux/input.h>
23#include <linux/device.h>
24#include <linux/interrupt.h>
25#include <linux/suspend.h>
26#include <linux/slab.h>
27#include <linux/kthread.h>
Dmitry Torokhovbff19b12006-12-08 01:37:03 -050028#include <linux/freezer.h>
Nicolas Pitref40219b2006-11-17 01:07:26 -050029
Nicolas Pitref40219b2006-11-17 01:07:26 -050030#include <sound/core.h>
31#include <sound/ac97_codec.h>
32
33
34/*
35 * Interesting UCB1400 AC-link registers
36 */
37
38#define UCB_IE_RIS 0x5e
39#define UCB_IE_FAL 0x60
40#define UCB_IE_STATUS 0x62
41#define UCB_IE_CLEAR 0x62
42#define UCB_IE_ADC (1 << 11)
43#define UCB_IE_TSPX (1 << 12)
44
45#define UCB_TS_CR 0x64
46#define UCB_TS_CR_TSMX_POW (1 << 0)
47#define UCB_TS_CR_TSPX_POW (1 << 1)
48#define UCB_TS_CR_TSMY_POW (1 << 2)
49#define UCB_TS_CR_TSPY_POW (1 << 3)
50#define UCB_TS_CR_TSMX_GND (1 << 4)
51#define UCB_TS_CR_TSPX_GND (1 << 5)
52#define UCB_TS_CR_TSMY_GND (1 << 6)
53#define UCB_TS_CR_TSPY_GND (1 << 7)
54#define UCB_TS_CR_MODE_INT (0 << 8)
55#define UCB_TS_CR_MODE_PRES (1 << 8)
56#define UCB_TS_CR_MODE_POS (2 << 8)
57#define UCB_TS_CR_BIAS_ENA (1 << 11)
58#define UCB_TS_CR_TSPX_LOW (1 << 12)
59#define UCB_TS_CR_TSMX_LOW (1 << 13)
60
61#define UCB_ADC_CR 0x66
62#define UCB_ADC_SYNC_ENA (1 << 0)
63#define UCB_ADC_VREFBYP_CON (1 << 1)
64#define UCB_ADC_INP_TSPX (0 << 2)
65#define UCB_ADC_INP_TSMX (1 << 2)
66#define UCB_ADC_INP_TSPY (2 << 2)
67#define UCB_ADC_INP_TSMY (3 << 2)
68#define UCB_ADC_INP_AD0 (4 << 2)
69#define UCB_ADC_INP_AD1 (5 << 2)
70#define UCB_ADC_INP_AD2 (6 << 2)
71#define UCB_ADC_INP_AD3 (7 << 2)
72#define UCB_ADC_EXT_REF (1 << 5)
73#define UCB_ADC_START (1 << 7)
74#define UCB_ADC_ENA (1 << 15)
75
76#define UCB_ADC_DATA 0x68
77#define UCB_ADC_DAT_VALID (1 << 15)
78#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
79
80#define UCB_ID 0x7e
81#define UCB_ID_1400 0x4304
82
83
84struct ucb1400 {
Andrew Mortonca377fe2006-12-15 09:26:20 +010085 struct snd_ac97 *ac97;
Nicolas Pitref40219b2006-11-17 01:07:26 -050086 struct input_dev *ts_idev;
87
88 int irq;
89
90 wait_queue_head_t ts_wait;
91 struct task_struct *ts_task;
92
93 unsigned int irq_pending; /* not bit field shared */
94 unsigned int ts_restart:1;
95 unsigned int adcsync:1;
96};
97
98static int adcsync;
Cliff Brakeb5b16c52007-04-12 01:35:43 -040099static int ts_delay = 55; /* us */
100static int ts_delay_pressure; /* us */
Nicolas Pitref40219b2006-11-17 01:07:26 -0500101
102static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
103{
104 return ucb->ac97->bus->ops->read(ucb->ac97, reg);
105}
106
107static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
108{
109 ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
110}
111
112static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
113{
114 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
115}
116
117static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
118{
119 unsigned int val;
120
121 if (ucb->adcsync)
122 adc_channel |= UCB_ADC_SYNC_ENA;
123
124 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
125 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
126
127 for (;;) {
128 val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
129 if (val & UCB_ADC_DAT_VALID)
130 break;
131 /* yield to other processes */
Rene Herman17881802007-09-26 00:02:19 -0400132 schedule_timeout_uninterruptible(1);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500133 }
134
135 return UCB_ADC_DAT_VALUE(val);
136}
137
138static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
139{
140 ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
141}
142
143/* Switch to interrupt mode. */
144static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
145{
146 ucb1400_reg_write(ucb, UCB_TS_CR,
147 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
148 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
149 UCB_TS_CR_MODE_INT);
150}
151
152/*
153 * Switch to pressure mode, and read pressure. We don't need to wait
154 * here, since both plates are being driven.
155 */
156static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
157{
158 ucb1400_reg_write(ucb, UCB_TS_CR,
159 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
160 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
161 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
Cliff Brakeb5b16c52007-04-12 01:35:43 -0400162 udelay(ts_delay_pressure);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500163 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
164}
165
166/*
167 * Switch to X position mode and measure Y plate. We switch the plate
168 * configuration in pressure mode, then switch to position mode. This
169 * gives a faster response time. Even so, we need to wait about 55us
170 * for things to stabilise.
171 */
172static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
173{
174 ucb1400_reg_write(ucb, UCB_TS_CR,
175 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
176 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
177 ucb1400_reg_write(ucb, UCB_TS_CR,
178 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
179 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
180 ucb1400_reg_write(ucb, UCB_TS_CR,
181 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
182 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
183
Cliff Brakeb5b16c52007-04-12 01:35:43 -0400184 udelay(ts_delay);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500185
186 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
187}
188
189/*
190 * Switch to Y position mode and measure X plate. We switch the plate
191 * configuration in pressure mode, then switch to position mode. This
192 * gives a faster response time. Even so, we need to wait about 55us
193 * for things to stabilise.
194 */
195static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
196{
197 ucb1400_reg_write(ucb, UCB_TS_CR,
198 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
199 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
200 ucb1400_reg_write(ucb, UCB_TS_CR,
201 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
202 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
203 ucb1400_reg_write(ucb, UCB_TS_CR,
204 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
205 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
206
Cliff Brakeb5b16c52007-04-12 01:35:43 -0400207 udelay(ts_delay);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500208
209 return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
210}
211
212/*
213 * Switch to X plate resistance mode. Set MX to ground, PX to
214 * supply. Measure current.
215 */
216static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
217{
218 ucb1400_reg_write(ucb, UCB_TS_CR,
219 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
220 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
221 return ucb1400_adc_read(ucb, 0);
222}
223
224/*
225 * Switch to Y plate resistance mode. Set MY to ground, PY to
226 * supply. Measure current.
227 */
228static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
229{
230 ucb1400_reg_write(ucb, UCB_TS_CR,
231 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
232 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
233 return ucb1400_adc_read(ucb, 0);
234}
235
236static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
237{
238 unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
239 return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
240}
241
242static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
243{
244 ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
245 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
246 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
247}
248
249static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
250{
251 ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
252}
253
254static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
255{
256 input_report_abs(idev, ABS_X, x);
257 input_report_abs(idev, ABS_Y, y);
258 input_report_abs(idev, ABS_PRESSURE, pressure);
259 input_sync(idev);
260}
261
262static void ucb1400_ts_event_release(struct input_dev *idev)
263{
264 input_report_abs(idev, ABS_PRESSURE, 0);
265 input_sync(idev);
266}
267
268static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
269{
270 unsigned int isr;
271
272 isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
273 ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
274 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
275
276 if (isr & UCB_IE_TSPX)
277 ucb1400_ts_irq_disable(ucb);
278 else
279 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
280
281 enable_irq(ucb->irq);
282}
283
284static int ucb1400_ts_thread(void *_ucb)
285{
286 struct ucb1400 *ucb = _ucb;
287 struct task_struct *tsk = current;
288 int valid = 0;
Satoru Takeuchic130bdb2007-05-14 23:52:07 -0400289 struct sched_param param = { .sched_priority = 1 };
Nicolas Pitref40219b2006-11-17 01:07:26 -0500290
Satoru Takeuchic130bdb2007-05-14 23:52:07 -0400291 sched_setscheduler(tsk, SCHED_FIFO, &param);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500292
Rafael J. Wysocki83144182007-07-17 04:03:35 -0700293 set_freezable();
Nicolas Pitref40219b2006-11-17 01:07:26 -0500294 while (!kthread_should_stop()) {
295 unsigned int x, y, p;
296 long timeout;
297
298 ucb->ts_restart = 0;
299
300 if (ucb->irq_pending) {
301 ucb->irq_pending = 0;
302 ucb1400_handle_pending_irq(ucb);
303 }
304
305 ucb1400_adc_enable(ucb);
306 x = ucb1400_ts_read_xpos(ucb);
307 y = ucb1400_ts_read_ypos(ucb);
308 p = ucb1400_ts_read_pressure(ucb);
309 ucb1400_adc_disable(ucb);
310
311 /* Switch back to interrupt mode. */
312 ucb1400_ts_mode_int(ucb);
313
314 msleep(10);
315
316 if (ucb1400_ts_pen_down(ucb)) {
317 ucb1400_ts_irq_enable(ucb);
318
319 /*
320 * If we spat out a valid sample set last time,
321 * spit out a "pen off" sample here.
322 */
323 if (valid) {
324 ucb1400_ts_event_release(ucb->ts_idev);
325 valid = 0;
326 }
327
328 timeout = MAX_SCHEDULE_TIMEOUT;
329 } else {
330 valid = 1;
331 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
332 timeout = msecs_to_jiffies(10);
333 }
334
Rafael J. Wysockie42837b2007-10-18 03:04:45 -0700335 wait_event_freezable_timeout(ucb->ts_wait,
Nicolas Pitref40219b2006-11-17 01:07:26 -0500336 ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
337 timeout);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500338 }
339
340 /* Send the "pen off" if we are stopping with the pen still active */
341 if (valid)
342 ucb1400_ts_event_release(ucb->ts_idev);
343
344 ucb->ts_task = NULL;
345 return 0;
346}
347
348/*
349 * A restriction with interrupts exists when using the ucb1400, as
350 * the codec read/write routines may sleep while waiting for codec
351 * access completion and uses semaphores for access control to the
352 * AC97 bus. A complete codec read cycle could take anywhere from
353 * 60 to 100uSec so we *definitely* don't want to spin inside the
354 * interrupt handler waiting for codec access. So, we handle the
355 * interrupt by scheduling a RT kernel thread to run in process
356 * context instead of interrupt context.
357 */
358static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
359{
360 struct ucb1400 *ucb = devid;
361
362 if (irqnr == ucb->irq) {
363 disable_irq(ucb->irq);
364 ucb->irq_pending = 1;
365 wake_up(&ucb->ts_wait);
366 return IRQ_HANDLED;
367 }
368 return IRQ_NONE;
369}
370
371static int ucb1400_ts_open(struct input_dev *idev)
372{
Dmitry Torokhov40b9b0b2007-04-12 01:34:08 -0400373 struct ucb1400 *ucb = input_get_drvdata(idev);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500374 int ret = 0;
375
376 BUG_ON(ucb->ts_task);
377
378 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
379 if (IS_ERR(ucb->ts_task)) {
380 ret = PTR_ERR(ucb->ts_task);
381 ucb->ts_task = NULL;
382 }
383
384 return ret;
385}
386
387static void ucb1400_ts_close(struct input_dev *idev)
388{
Dmitry Torokhov40b9b0b2007-04-12 01:34:08 -0400389 struct ucb1400 *ucb = input_get_drvdata(idev);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500390
391 if (ucb->ts_task)
392 kthread_stop(ucb->ts_task);
393
394 ucb1400_ts_irq_disable(ucb);
395 ucb1400_reg_write(ucb, UCB_TS_CR, 0);
396}
397
398#ifdef CONFIG_PM
399static int ucb1400_ts_resume(struct device *dev)
400{
401 struct ucb1400 *ucb = dev_get_drvdata(dev);
402
403 if (ucb->ts_task) {
404 /*
405 * Restart the TS thread to ensure the
406 * TS interrupt mode is set up again
407 * after sleep.
408 */
409 ucb->ts_restart = 1;
410 wake_up(&ucb->ts_wait);
411 }
412 return 0;
413}
414#else
415#define ucb1400_ts_resume NULL
416#endif
417
418#ifndef NO_IRQ
419#define NO_IRQ 0
420#endif
421
422/*
423 * Try to probe our interrupt, rather than relying on lots of
424 * hard-coded machine dependencies.
425 */
426static int ucb1400_detect_irq(struct ucb1400 *ucb)
427{
428 unsigned long mask, timeout;
429
430 mask = probe_irq_on();
431 if (!mask) {
432 probe_irq_off(mask);
433 return -EBUSY;
434 }
435
436 /* Enable the ADC interrupt. */
437 ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
438 ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
439 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
440 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
441
442 /* Cause an ADC interrupt. */
443 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
444 ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
445
446 /* Wait for the conversion to complete. */
447 timeout = jiffies + HZ/2;
448 while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
449 cpu_relax();
450 if (time_after(jiffies, timeout)) {
451 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
452 probe_irq_off(mask);
453 return -ENODEV;
454 }
455 }
456 ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
457
458 /* Disable and clear interrupt. */
459 ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
460 ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
461 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
462 ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
463
464 /* Read triggered interrupt. */
465 ucb->irq = probe_irq_off(mask);
466 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
467 return -ENODEV;
468
469 return 0;
470}
471
472static int ucb1400_ts_probe(struct device *dev)
473{
474 struct ucb1400 *ucb;
475 struct input_dev *idev;
476 int error, id, x_res, y_res;
477
478 ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
479 idev = input_allocate_device();
480 if (!ucb || !idev) {
481 error = -ENOMEM;
482 goto err_free_devs;
483 }
484
485 ucb->ts_idev = idev;
486 ucb->adcsync = adcsync;
487 ucb->ac97 = to_ac97_t(dev);
488 init_waitqueue_head(&ucb->ts_wait);
489
490 id = ucb1400_reg_read(ucb, UCB_ID);
491 if (id != UCB_ID_1400) {
492 error = -ENODEV;
493 goto err_free_devs;
494 }
495
496 error = ucb1400_detect_irq(ucb);
497 if (error) {
498 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
499 goto err_free_devs;
500 }
501
502 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
503 "UCB1400", ucb);
504 if (error) {
505 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
506 ucb->irq, error);
507 goto err_free_devs;
508 }
509 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
510
Dmitry Torokhov40b9b0b2007-04-12 01:34:08 -0400511 input_set_drvdata(idev, ucb);
512
Dmitry Torokhova5394fb02007-04-12 01:35:14 -0400513 idev->dev.parent = dev;
Nicolas Pitref40219b2006-11-17 01:07:26 -0500514 idev->name = "UCB1400 touchscreen interface";
515 idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
516 idev->id.product = id;
517 idev->open = ucb1400_ts_open;
518 idev->close = ucb1400_ts_close;
Jiri Slaby7b19ada2007-10-18 23:40:32 -0700519 idev->evbit[0] = BIT_MASK(EV_ABS);
Nicolas Pitref40219b2006-11-17 01:07:26 -0500520
521 ucb1400_adc_enable(ucb);
522 x_res = ucb1400_ts_read_xres(ucb);
523 y_res = ucb1400_ts_read_yres(ucb);
524 ucb1400_adc_disable(ucb);
525 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
526
527 input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
528 input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
529 input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
530
531 error = input_register_device(idev);
532 if (error)
533 goto err_free_irq;
534
535 dev_set_drvdata(dev, ucb);
536 return 0;
537
538 err_free_irq:
539 free_irq(ucb->irq, ucb);
540 err_free_devs:
541 input_free_device(idev);
542 kfree(ucb);
543 return error;
544}
545
546static int ucb1400_ts_remove(struct device *dev)
547{
548 struct ucb1400 *ucb = dev_get_drvdata(dev);
549
550 free_irq(ucb->irq, ucb);
551 input_unregister_device(ucb->ts_idev);
552 dev_set_drvdata(dev, NULL);
553 kfree(ucb);
554 return 0;
555}
556
557static struct device_driver ucb1400_ts_driver = {
Cliff Brakeff78b202007-04-09 23:50:50 -0400558 .name = "ucb1400_ts",
Nicolas Pitref40219b2006-11-17 01:07:26 -0500559 .owner = THIS_MODULE,
560 .bus = &ac97_bus_type,
561 .probe = ucb1400_ts_probe,
562 .remove = ucb1400_ts_remove,
563 .resume = ucb1400_ts_resume,
564};
565
566static int __init ucb1400_ts_init(void)
567{
568 return driver_register(&ucb1400_ts_driver);
569}
570
571static void __exit ucb1400_ts_exit(void)
572{
573 driver_unregister(&ucb1400_ts_driver);
574}
575
Cliff Brakeb5b16c52007-04-12 01:35:43 -0400576module_param(adcsync, bool, 0444);
577MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
578
579module_param(ts_delay, int, 0444);
580MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us.");
581
582module_param(ts_delay_pressure, int, 0444);
583MODULE_PARM_DESC(ts_delay_pressure,
584 "delay between panel setup and pressure read. Default = 0us.");
Nicolas Pitref40219b2006-11-17 01:07:26 -0500585
586module_init(ucb1400_ts_init);
587module_exit(ucb1400_ts_exit);
588
589MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
590MODULE_LICENSE("GPL");