Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * arch/sh64/mm/tlbmiss.c |
| 7 | * |
| 8 | * Original code from fault.c |
| 9 | * Copyright (C) 2000, 2001 Paolo Alberelli |
| 10 | * |
| 11 | * Fast PTE->TLB refill path |
| 12 | * Copyright (C) 2003 Richard.Curnow@superh.com |
| 13 | * |
| 14 | * IMPORTANT NOTES : |
| 15 | * The do_fast_page_fault function is called from a context in entry.S where very few registers |
| 16 | * have been saved. In particular, the code in this file must be compiled not to use ANY |
| 17 | * caller-save regiseters that are not part of the restricted save set. Also, it means that |
| 18 | * code in this file must not make calls to functions elsewhere in the kernel, or else the |
| 19 | * excepting context will see corruption in its caller-save registers. Plus, the entry.S save |
| 20 | * area is non-reentrant, so this code has to run with SR.BL==1, i.e. no interrupts taken inside |
| 21 | * it and panic on any exception. |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | #include <linux/signal.h> |
| 26 | #include <linux/sched.h> |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/errno.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/types.h> |
| 31 | #include <linux/ptrace.h> |
| 32 | #include <linux/mman.h> |
| 33 | #include <linux/mm.h> |
| 34 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/interrupt.h> |
| 36 | |
| 37 | #include <asm/system.h> |
| 38 | #include <asm/tlb.h> |
| 39 | #include <asm/io.h> |
| 40 | #include <asm/uaccess.h> |
| 41 | #include <asm/pgalloc.h> |
| 42 | #include <asm/mmu_context.h> |
| 43 | #include <asm/registers.h> /* required by inline asm statements */ |
| 44 | |
| 45 | /* Callable from fault.c, so not static */ |
| 46 | inline void __do_tlb_refill(unsigned long address, |
| 47 | unsigned long long is_text_not_data, pte_t *pte) |
| 48 | { |
| 49 | unsigned long long ptel; |
| 50 | unsigned long long pteh=0; |
| 51 | struct tlb_info *tlbp; |
| 52 | unsigned long long next; |
| 53 | |
| 54 | /* Get PTEL first */ |
| 55 | ptel = pte_val(*pte); |
| 56 | |
| 57 | /* |
| 58 | * Set PTEH register |
| 59 | */ |
| 60 | pteh = address & MMU_VPN_MASK; |
| 61 | |
| 62 | /* Sign extend based on neff. */ |
| 63 | #if (NEFF == 32) |
| 64 | /* Faster sign extension */ |
| 65 | pteh = (unsigned long long)(signed long long)(signed long)pteh; |
| 66 | #else |
| 67 | /* General case */ |
| 68 | pteh = (pteh & NEFF_SIGN) ? (pteh | NEFF_MASK) : pteh; |
| 69 | #endif |
| 70 | |
| 71 | /* Set the ASID. */ |
| 72 | pteh |= get_asid() << PTEH_ASID_SHIFT; |
| 73 | pteh |= PTEH_VALID; |
| 74 | |
| 75 | /* Set PTEL register, set_pte has performed the sign extension */ |
| 76 | ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ |
| 77 | |
| 78 | tlbp = is_text_not_data ? &(cpu_data->itlb) : &(cpu_data->dtlb); |
| 79 | next = tlbp->next; |
| 80 | __flush_tlb_slot(next); |
| 81 | asm volatile ("putcfg %0,1,%2\n\n\t" |
| 82 | "putcfg %0,0,%1\n" |
| 83 | : : "r" (next), "r" (pteh), "r" (ptel) ); |
| 84 | |
| 85 | next += TLB_STEP; |
| 86 | if (next > tlbp->last) next = tlbp->first; |
| 87 | tlbp->next = next; |
| 88 | |
| 89 | } |
| 90 | |
| 91 | static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long protection_flags, |
| 92 | unsigned long long textaccess, |
| 93 | unsigned long address) |
| 94 | { |
| 95 | pgd_t *dir; |
| 96 | pmd_t *pmd; |
| 97 | static pte_t *pte; |
| 98 | pte_t entry; |
| 99 | |
| 100 | dir = pgd_offset_k(address); |
| 101 | pmd = pmd_offset(dir, address); |
| 102 | |
| 103 | if (pmd_none(*pmd)) { |
| 104 | return 0; |
| 105 | } |
| 106 | |
| 107 | if (pmd_bad(*pmd)) { |
| 108 | pmd_clear(pmd); |
| 109 | return 0; |
| 110 | } |
| 111 | |
| 112 | pte = pte_offset_kernel(pmd, address); |
| 113 | entry = *pte; |
| 114 | |
| 115 | if (pte_none(entry) || !pte_present(entry)) { |
| 116 | return 0; |
| 117 | } |
| 118 | |
| 119 | if ((pte_val(entry) & protection_flags) != protection_flags) { |
| 120 | return 0; |
| 121 | } |
| 122 | |
| 123 | __do_tlb_refill(address, textaccess, pte); |
| 124 | |
| 125 | return 1; |
| 126 | } |
| 127 | |
| 128 | static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_flags, |
| 129 | unsigned long long textaccess, |
| 130 | unsigned long address) |
| 131 | { |
| 132 | pgd_t *dir; |
| 133 | pmd_t *pmd; |
| 134 | pte_t *pte; |
| 135 | pte_t entry; |
| 136 | |
| 137 | /* NB. The PGD currently only contains a single entry - there is no |
| 138 | page table tree stored for the top half of the address space since |
| 139 | virtual pages in that region should never be mapped in user mode. |
| 140 | (In kernel mode, the only things in that region are the 512Mb super |
| 141 | page (locked in), and vmalloc (modules) + I/O device pages (handled |
| 142 | by handle_vmalloc_fault), so no PGD for the upper half is required |
| 143 | by kernel mode either). |
| 144 | |
| 145 | See how mm->pgd is allocated and initialised in pgd_alloc to see why |
| 146 | the next test is necessary. - RPC */ |
| 147 | if (address >= (unsigned long) TASK_SIZE) { |
| 148 | /* upper half - never has page table entries. */ |
| 149 | return 0; |
| 150 | } |
| 151 | dir = pgd_offset(mm, address); |
| 152 | if (pgd_none(*dir)) { |
| 153 | return 0; |
| 154 | } |
| 155 | if (!pgd_present(*dir)) { |
| 156 | return 0; |
| 157 | } |
| 158 | |
| 159 | pmd = pmd_offset(dir, address); |
| 160 | if (pmd_none(*pmd)) { |
| 161 | return 0; |
| 162 | } |
| 163 | if (!pmd_present(*pmd)) { |
| 164 | return 0; |
| 165 | } |
| 166 | pte = pte_offset_kernel(pmd, address); |
| 167 | entry = *pte; |
| 168 | if (pte_none(entry)) { |
| 169 | return 0; |
| 170 | } |
| 171 | if (!pte_present(entry)) { |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | /* If the page doesn't have sufficient protection bits set to service the |
| 176 | kind of fault being handled, there's not much point doing the TLB refill. |
| 177 | Punt the fault to the general handler. */ |
| 178 | if ((pte_val(entry) & protection_flags) != protection_flags) { |
| 179 | return 0; |
| 180 | } |
| 181 | |
| 182 | __do_tlb_refill(address, textaccess, pte); |
| 183 | |
| 184 | return 1; |
| 185 | } |
| 186 | |
| 187 | /* Put all this information into one structure so that everything is just arithmetic |
| 188 | relative to a single base address. This reduces the number of movi/shori pairs needed |
| 189 | just to load addresses of static data. */ |
| 190 | struct expevt_lookup { |
| 191 | unsigned short protection_flags[8]; |
| 192 | unsigned char is_text_access[8]; |
| 193 | unsigned char is_write_access[8]; |
| 194 | }; |
| 195 | |
| 196 | #define PRU (1<<9) |
| 197 | #define PRW (1<<8) |
| 198 | #define PRX (1<<7) |
| 199 | #define PRR (1<<6) |
| 200 | |
| 201 | #define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED) |
| 202 | #define YOUNG (_PAGE_ACCESSED) |
| 203 | |
| 204 | /* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether |
| 205 | the fault happened in user mode or privileged mode. */ |
| 206 | static struct expevt_lookup expevt_lookup_table = { |
| 207 | .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW}, |
| 208 | .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0} |
| 209 | }; |
| 210 | |
| 211 | /* |
| 212 | This routine handles page faults that can be serviced just by refilling a |
| 213 | TLB entry from an existing page table entry. (This case represents a very |
| 214 | large majority of page faults.) Return 1 if the fault was successfully |
| 215 | handled. Return 0 if the fault could not be handled. (This leads into the |
| 216 | general fault handling in fault.c which deals with mapping file-backed |
| 217 | pages, stack growth, segmentation faults, swapping etc etc) |
| 218 | */ |
| 219 | asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt, |
| 220 | unsigned long address) |
| 221 | { |
| 222 | struct task_struct *tsk; |
| 223 | struct mm_struct *mm; |
| 224 | unsigned long long textaccess; |
| 225 | unsigned long long protection_flags; |
| 226 | unsigned long long index; |
| 227 | unsigned long long expevt4; |
| 228 | |
| 229 | /* The next few lines implement a way of hashing EXPEVT into a small array index |
| 230 | which can be used to lookup parameters specific to the type of TLBMISS being |
| 231 | handled. Note: |
| 232 | ITLBMISS has EXPEVT==0xa40 |
| 233 | RTLBMISS has EXPEVT==0x040 |
| 234 | WTLBMISS has EXPEVT==0x060 |
| 235 | */ |
| 236 | |
| 237 | expevt4 = (expevt >> 4); |
| 238 | /* TODO : xor ssr_md into this expression too. Then we can check that PRU is set |
| 239 | when it needs to be. */ |
| 240 | index = expevt4 ^ (expevt4 >> 5); |
| 241 | index &= 7; |
| 242 | protection_flags = expevt_lookup_table.protection_flags[index]; |
| 243 | textaccess = expevt_lookup_table.is_text_access[index]; |
| 244 | |
| 245 | #ifdef CONFIG_SH64_PROC_TLB |
| 246 | ++calls_to_do_fast_page_fault; |
| 247 | #endif |
| 248 | |
| 249 | /* SIM |
| 250 | * Note this is now called with interrupts still disabled |
| 251 | * This is to cope with being called for a missing IO port |
| 252 | * address with interupts disabled. This should be fixed as |
| 253 | * soon as we have a better 'fast path' miss handler. |
| 254 | * |
| 255 | * Plus take care how you try and debug this stuff. |
| 256 | * For example, writing debug data to a port which you |
| 257 | * have just faulted on is not going to work. |
| 258 | */ |
| 259 | |
| 260 | tsk = current; |
| 261 | mm = tsk->mm; |
| 262 | |
| 263 | if ((address >= VMALLOC_START && address < VMALLOC_END) || |
| 264 | (address >= IOBASE_VADDR && address < IOBASE_END)) { |
| 265 | if (ssr_md) { |
| 266 | /* Process-contexts can never have this address range mapped */ |
| 267 | if (handle_vmalloc_fault(mm, protection_flags, textaccess, address)) { |
| 268 | return 1; |
| 269 | } |
| 270 | } |
| 271 | } else if (!in_interrupt() && mm) { |
| 272 | if (handle_tlbmiss(mm, protection_flags, textaccess, address)) { |
| 273 | return 1; |
| 274 | } |
| 275 | } |
| 276 | |
| 277 | return 0; |
| 278 | } |
| 279 | |