Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ahci.c - AHCI SATA support |
| 3 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 8 | * Copyright 2004-2005 Red Hat, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; see the file COPYING. If not, write to |
| 23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | * |
| 26 | * libata documentation is available via 'make {ps|pdf}docs', |
| 27 | * as Documentation/DocBook/libata.* |
| 28 | * |
| 29 | * AHCI hardware documentation: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 31 | * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * |
| 33 | */ |
| 34 | |
| 35 | #include <linux/kernel.h> |
| 36 | #include <linux/module.h> |
| 37 | #include <linux/pci.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/blkdev.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/interrupt.h> |
| 42 | #include <linux/sched.h> |
domen@coderock.org | 87507cf | 2005-04-08 09:53:06 +0200 | [diff] [blame] | 43 | #include <linux/dma-mapping.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 44 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | #include <scsi/scsi_host.h> |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 46 | #include <scsi/scsi_cmnd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <linux/libata.h> |
| 48 | #include <asm/io.h> |
| 49 | |
| 50 | #define DRV_NAME "ahci" |
Jeff Garzik | 7bdd720 | 2005-11-16 11:06:59 -0500 | [diff] [blame] | 51 | #define DRV_VERSION "1.2" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | |
| 53 | |
| 54 | enum { |
| 55 | AHCI_PCI_BAR = 5, |
| 56 | AHCI_MAX_SG = 168, /* hardware max is 64K */ |
| 57 | AHCI_DMA_BOUNDARY = 0xffffffff, |
| 58 | AHCI_USE_CLUSTERING = 0, |
| 59 | AHCI_CMD_SLOT_SZ = 32 * 32, |
| 60 | AHCI_RX_FIS_SZ = 256, |
| 61 | AHCI_CMD_TBL_HDR = 0x80, |
Jeff Garzik | a0ea732 | 2005-06-04 01:13:15 -0400 | [diff] [blame] | 62 | AHCI_CMD_TBL_CDB = 0x40, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | AHCI_CMD_TBL_SZ = AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16), |
| 64 | AHCI_PORT_PRIV_DMA_SZ = AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ + |
| 65 | AHCI_RX_FIS_SZ, |
| 66 | AHCI_IRQ_ON_SG = (1 << 31), |
| 67 | AHCI_CMD_ATAPI = (1 << 5), |
| 68 | AHCI_CMD_WRITE = (1 << 6), |
| 69 | |
| 70 | RX_FIS_D2H_REG = 0x40, /* offset of D2H Register FIS data */ |
| 71 | |
| 72 | board_ahci = 0, |
| 73 | |
| 74 | /* global controller registers */ |
| 75 | HOST_CAP = 0x00, /* host capabilities */ |
| 76 | HOST_CTL = 0x04, /* global host control */ |
| 77 | HOST_IRQ_STAT = 0x08, /* interrupt status */ |
| 78 | HOST_PORTS_IMPL = 0x0c, /* bitmap of implemented ports */ |
| 79 | HOST_VERSION = 0x10, /* AHCI spec. version compliancy */ |
| 80 | |
| 81 | /* HOST_CTL bits */ |
| 82 | HOST_RESET = (1 << 0), /* reset controller; self-clear */ |
| 83 | HOST_IRQ_EN = (1 << 1), /* global IRQ enable */ |
| 84 | HOST_AHCI_EN = (1 << 31), /* AHCI enabled */ |
| 85 | |
| 86 | /* HOST_CAP bits */ |
| 87 | HOST_CAP_64 = (1 << 31), /* PCI DAC (64-bit DMA) support */ |
| 88 | |
| 89 | /* registers for each SATA port */ |
| 90 | PORT_LST_ADDR = 0x00, /* command list DMA addr */ |
| 91 | PORT_LST_ADDR_HI = 0x04, /* command list DMA addr hi */ |
| 92 | PORT_FIS_ADDR = 0x08, /* FIS rx buf addr */ |
| 93 | PORT_FIS_ADDR_HI = 0x0c, /* FIS rx buf addr hi */ |
| 94 | PORT_IRQ_STAT = 0x10, /* interrupt status */ |
| 95 | PORT_IRQ_MASK = 0x14, /* interrupt enable/disable mask */ |
| 96 | PORT_CMD = 0x18, /* port command */ |
| 97 | PORT_TFDATA = 0x20, /* taskfile data */ |
| 98 | PORT_SIG = 0x24, /* device TF signature */ |
| 99 | PORT_CMD_ISSUE = 0x38, /* command issue */ |
| 100 | PORT_SCR = 0x28, /* SATA phy register block */ |
| 101 | PORT_SCR_STAT = 0x28, /* SATA phy register: SStatus */ |
| 102 | PORT_SCR_CTL = 0x2c, /* SATA phy register: SControl */ |
| 103 | PORT_SCR_ERR = 0x30, /* SATA phy register: SError */ |
| 104 | PORT_SCR_ACT = 0x34, /* SATA phy register: SActive */ |
| 105 | |
| 106 | /* PORT_IRQ_{STAT,MASK} bits */ |
| 107 | PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */ |
| 108 | PORT_IRQ_TF_ERR = (1 << 30), /* task file error */ |
| 109 | PORT_IRQ_HBUS_ERR = (1 << 29), /* host bus fatal error */ |
| 110 | PORT_IRQ_HBUS_DATA_ERR = (1 << 28), /* host bus data error */ |
| 111 | PORT_IRQ_IF_ERR = (1 << 27), /* interface fatal error */ |
| 112 | PORT_IRQ_IF_NONFATAL = (1 << 26), /* interface non-fatal error */ |
| 113 | PORT_IRQ_OVERFLOW = (1 << 24), /* xfer exhausted available S/G */ |
| 114 | PORT_IRQ_BAD_PMP = (1 << 23), /* incorrect port multiplier */ |
| 115 | |
| 116 | PORT_IRQ_PHYRDY = (1 << 22), /* PhyRdy changed */ |
| 117 | PORT_IRQ_DEV_ILCK = (1 << 7), /* device interlock */ |
| 118 | PORT_IRQ_CONNECT = (1 << 6), /* port connect change status */ |
| 119 | PORT_IRQ_SG_DONE = (1 << 5), /* descriptor processed */ |
| 120 | PORT_IRQ_UNK_FIS = (1 << 4), /* unknown FIS rx'd */ |
| 121 | PORT_IRQ_SDB_FIS = (1 << 3), /* Set Device Bits FIS rx'd */ |
| 122 | PORT_IRQ_DMAS_FIS = (1 << 2), /* DMA Setup FIS rx'd */ |
| 123 | PORT_IRQ_PIOS_FIS = (1 << 1), /* PIO Setup FIS rx'd */ |
| 124 | PORT_IRQ_D2H_REG_FIS = (1 << 0), /* D2H Register FIS rx'd */ |
| 125 | |
| 126 | PORT_IRQ_FATAL = PORT_IRQ_TF_ERR | |
| 127 | PORT_IRQ_HBUS_ERR | |
| 128 | PORT_IRQ_HBUS_DATA_ERR | |
| 129 | PORT_IRQ_IF_ERR, |
| 130 | DEF_PORT_IRQ = PORT_IRQ_FATAL | PORT_IRQ_PHYRDY | |
| 131 | PORT_IRQ_CONNECT | PORT_IRQ_SG_DONE | |
| 132 | PORT_IRQ_UNK_FIS | PORT_IRQ_SDB_FIS | |
| 133 | PORT_IRQ_DMAS_FIS | PORT_IRQ_PIOS_FIS | |
| 134 | PORT_IRQ_D2H_REG_FIS, |
| 135 | |
| 136 | /* PORT_CMD bits */ |
Jeff Garzik | 02eaa66 | 2005-11-12 01:32:19 -0500 | [diff] [blame] | 137 | PORT_CMD_ATAPI = (1 << 24), /* Device is ATAPI */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | PORT_CMD_LIST_ON = (1 << 15), /* cmd list DMA engine running */ |
| 139 | PORT_CMD_FIS_ON = (1 << 14), /* FIS DMA engine running */ |
| 140 | PORT_CMD_FIS_RX = (1 << 4), /* Enable FIS receive DMA engine */ |
| 141 | PORT_CMD_POWER_ON = (1 << 2), /* Power up device */ |
| 142 | PORT_CMD_SPIN_UP = (1 << 1), /* Spin up device */ |
| 143 | PORT_CMD_START = (1 << 0), /* Enable port DMA engine */ |
| 144 | |
| 145 | PORT_CMD_ICC_ACTIVE = (0x1 << 28), /* Put i/f in active state */ |
| 146 | PORT_CMD_ICC_PARTIAL = (0x2 << 28), /* Put i/f in partial state */ |
| 147 | PORT_CMD_ICC_SLUMBER = (0x6 << 28), /* Put i/f in slumber state */ |
Jeff Garzik | 4b0060f | 2005-06-04 00:50:22 -0400 | [diff] [blame] | 148 | |
| 149 | /* hpriv->flags bits */ |
| 150 | AHCI_FLAG_MSI = (1 << 0), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | }; |
| 152 | |
| 153 | struct ahci_cmd_hdr { |
| 154 | u32 opts; |
| 155 | u32 status; |
| 156 | u32 tbl_addr; |
| 157 | u32 tbl_addr_hi; |
| 158 | u32 reserved[4]; |
| 159 | }; |
| 160 | |
| 161 | struct ahci_sg { |
| 162 | u32 addr; |
| 163 | u32 addr_hi; |
| 164 | u32 reserved; |
| 165 | u32 flags_size; |
| 166 | }; |
| 167 | |
| 168 | struct ahci_host_priv { |
| 169 | unsigned long flags; |
| 170 | u32 cap; /* cache of HOST_CAP register */ |
| 171 | u32 port_map; /* cache of HOST_PORTS_IMPL reg */ |
| 172 | }; |
| 173 | |
| 174 | struct ahci_port_priv { |
| 175 | struct ahci_cmd_hdr *cmd_slot; |
| 176 | dma_addr_t cmd_slot_dma; |
| 177 | void *cmd_tbl; |
| 178 | dma_addr_t cmd_tbl_dma; |
| 179 | struct ahci_sg *cmd_tbl_sg; |
| 180 | void *rx_fis; |
| 181 | dma_addr_t rx_fis_dma; |
| 182 | }; |
| 183 | |
| 184 | static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg); |
| 185 | static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); |
| 186 | static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent); |
| 187 | static int ahci_qc_issue(struct ata_queued_cmd *qc); |
| 188 | static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs); |
| 189 | static void ahci_phy_reset(struct ata_port *ap); |
| 190 | static void ahci_irq_clear(struct ata_port *ap); |
| 191 | static void ahci_eng_timeout(struct ata_port *ap); |
| 192 | static int ahci_port_start(struct ata_port *ap); |
| 193 | static void ahci_port_stop(struct ata_port *ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf); |
| 195 | static void ahci_qc_prep(struct ata_queued_cmd *qc); |
| 196 | static u8 ahci_check_status(struct ata_port *ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 198 | static void ahci_remove_one (struct pci_dev *pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 200 | static struct scsi_host_template ahci_sht = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | .module = THIS_MODULE, |
| 202 | .name = DRV_NAME, |
| 203 | .ioctl = ata_scsi_ioctl, |
| 204 | .queuecommand = ata_scsi_queuecmd, |
| 205 | .eh_strategy_handler = ata_scsi_error, |
| 206 | .can_queue = ATA_DEF_QUEUE, |
| 207 | .this_id = ATA_SHT_THIS_ID, |
| 208 | .sg_tablesize = AHCI_MAX_SG, |
| 209 | .max_sectors = ATA_MAX_SECTORS, |
| 210 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 211 | .emulated = ATA_SHT_EMULATED, |
| 212 | .use_clustering = AHCI_USE_CLUSTERING, |
| 213 | .proc_name = DRV_NAME, |
| 214 | .dma_boundary = AHCI_DMA_BOUNDARY, |
| 215 | .slave_configure = ata_scsi_slave_config, |
| 216 | .bios_param = ata_std_bios_param, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | }; |
| 218 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 219 | static const struct ata_port_operations ahci_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | .port_disable = ata_port_disable, |
| 221 | |
| 222 | .check_status = ahci_check_status, |
| 223 | .check_altstatus = ahci_check_status, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | .dev_select = ata_noop_dev_select, |
| 225 | |
| 226 | .tf_read = ahci_tf_read, |
| 227 | |
| 228 | .phy_reset = ahci_phy_reset, |
| 229 | |
| 230 | .qc_prep = ahci_qc_prep, |
| 231 | .qc_issue = ahci_qc_issue, |
| 232 | |
| 233 | .eng_timeout = ahci_eng_timeout, |
| 234 | |
| 235 | .irq_handler = ahci_interrupt, |
| 236 | .irq_clear = ahci_irq_clear, |
| 237 | |
| 238 | .scr_read = ahci_scr_read, |
| 239 | .scr_write = ahci_scr_write, |
| 240 | |
| 241 | .port_start = ahci_port_start, |
| 242 | .port_stop = ahci_port_stop, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | }; |
| 244 | |
Arjan van de Ven | 98ac62d | 2005-11-28 10:06:23 +0100 | [diff] [blame] | 245 | static const struct ata_port_info ahci_port_info[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | /* board_ahci */ |
| 247 | { |
| 248 | .sht = &ahci_sht, |
| 249 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
| 250 | ATA_FLAG_SATA_RESET | ATA_FLAG_MMIO | |
| 251 | ATA_FLAG_PIO_DMA, |
Brett Russ | 7da7931 | 2005-09-01 21:53:34 -0400 | [diff] [blame] | 252 | .pio_mask = 0x1f, /* pio0-4 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | .udma_mask = 0x7f, /* udma0-6 ; FIXME */ |
| 254 | .port_ops = &ahci_ops, |
| 255 | }, |
| 256 | }; |
| 257 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 258 | static const struct pci_device_id ahci_pci_tbl[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | { PCI_VENDOR_ID_INTEL, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 260 | board_ahci }, /* ICH6 */ |
| 261 | { PCI_VENDOR_ID_INTEL, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 262 | board_ahci }, /* ICH6M */ |
| 263 | { PCI_VENDOR_ID_INTEL, 0x27c1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 264 | board_ahci }, /* ICH7 */ |
| 265 | { PCI_VENDOR_ID_INTEL, 0x27c5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 266 | board_ahci }, /* ICH7M */ |
| 267 | { PCI_VENDOR_ID_INTEL, 0x27c3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 268 | board_ahci }, /* ICH7R */ |
| 269 | { PCI_VENDOR_ID_AL, 0x5288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 270 | board_ahci }, /* ULi M5288 */ |
Jason Gaston | 680d323 | 2005-04-16 15:24:45 -0700 | [diff] [blame] | 271 | { PCI_VENDOR_ID_INTEL, 0x2681, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 272 | board_ahci }, /* ESB2 */ |
| 273 | { PCI_VENDOR_ID_INTEL, 0x2682, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 274 | board_ahci }, /* ESB2 */ |
| 275 | { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 276 | board_ahci }, /* ESB2 */ |
Jason Gaston | 3db368f | 2005-08-10 06:18:43 -0700 | [diff] [blame] | 277 | { PCI_VENDOR_ID_INTEL, 0x27c6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 278 | board_ahci }, /* ICH7-M DH */ |
Jason Gaston | f285757 | 2006-01-09 11:09:13 -0800 | [diff] [blame] | 279 | { PCI_VENDOR_ID_INTEL, 0x2821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 280 | board_ahci }, /* ICH8 */ |
| 281 | { PCI_VENDOR_ID_INTEL, 0x2822, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 282 | board_ahci }, /* ICH8 */ |
| 283 | { PCI_VENDOR_ID_INTEL, 0x2824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 284 | board_ahci }, /* ICH8 */ |
| 285 | { PCI_VENDOR_ID_INTEL, 0x2829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 286 | board_ahci }, /* ICH8M */ |
| 287 | { PCI_VENDOR_ID_INTEL, 0x282a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 288 | board_ahci }, /* ICH8M */ |
Jeff Garzik | bd12097 | 2006-01-29 02:47:03 -0500 | [diff] [blame] | 289 | { 0x197b, 0x2360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 290 | board_ahci }, /* JMicron JMB360 */ |
Jeff Garzik | 9220a2d | 2006-01-29 12:40:57 -0500 | [diff] [blame] | 291 | { 0x197b, 0x2363, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
| 292 | board_ahci }, /* JMicron JMB363 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | { } /* terminate list */ |
| 294 | }; |
| 295 | |
| 296 | |
| 297 | static struct pci_driver ahci_pci_driver = { |
| 298 | .name = DRV_NAME, |
| 299 | .id_table = ahci_pci_tbl, |
| 300 | .probe = ahci_init_one, |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 301 | .remove = ahci_remove_one, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | }; |
| 303 | |
| 304 | |
| 305 | static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port) |
| 306 | { |
| 307 | return base + 0x100 + (port * 0x80); |
| 308 | } |
| 309 | |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 310 | static inline void __iomem *ahci_port_base (void __iomem *base, unsigned int port) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | { |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 312 | return (void __iomem *) ahci_port_base_ul((unsigned long)base, port); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | } |
| 314 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | static int ahci_port_start(struct ata_port *ap) |
| 316 | { |
| 317 | struct device *dev = ap->host_set->dev; |
| 318 | struct ahci_host_priv *hpriv = ap->host_set->private_data; |
| 319 | struct ahci_port_priv *pp; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 320 | void __iomem *mmio = ap->host_set->mmio_base; |
| 321 | void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); |
| 322 | void *mem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | dma_addr_t mem_dma; |
Jeff Garzik | 6037d6b | 2005-11-04 22:08:00 -0500 | [diff] [blame] | 324 | int rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 325 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | pp = kmalloc(sizeof(*pp), GFP_KERNEL); |
Tejun Heo | 0a139e7 | 2005-06-26 23:52:50 +0900 | [diff] [blame] | 327 | if (!pp) |
| 328 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | memset(pp, 0, sizeof(*pp)); |
| 330 | |
Jeff Garzik | 6037d6b | 2005-11-04 22:08:00 -0500 | [diff] [blame] | 331 | rc = ata_pad_alloc(ap, dev); |
| 332 | if (rc) { |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 333 | kfree(pp); |
Jeff Garzik | 6037d6b | 2005-11-04 22:08:00 -0500 | [diff] [blame] | 334 | return rc; |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 335 | } |
| 336 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | mem = dma_alloc_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, &mem_dma, GFP_KERNEL); |
| 338 | if (!mem) { |
Jeff Garzik | 6037d6b | 2005-11-04 22:08:00 -0500 | [diff] [blame] | 339 | ata_pad_free(ap, dev); |
Tejun Heo | 0a139e7 | 2005-06-26 23:52:50 +0900 | [diff] [blame] | 340 | kfree(pp); |
| 341 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | } |
| 343 | memset(mem, 0, AHCI_PORT_PRIV_DMA_SZ); |
| 344 | |
| 345 | /* |
| 346 | * First item in chunk of DMA memory: 32-slot command table, |
| 347 | * 32 bytes each in size |
| 348 | */ |
| 349 | pp->cmd_slot = mem; |
| 350 | pp->cmd_slot_dma = mem_dma; |
| 351 | |
| 352 | mem += AHCI_CMD_SLOT_SZ; |
| 353 | mem_dma += AHCI_CMD_SLOT_SZ; |
| 354 | |
| 355 | /* |
| 356 | * Second item: Received-FIS area |
| 357 | */ |
| 358 | pp->rx_fis = mem; |
| 359 | pp->rx_fis_dma = mem_dma; |
| 360 | |
| 361 | mem += AHCI_RX_FIS_SZ; |
| 362 | mem_dma += AHCI_RX_FIS_SZ; |
| 363 | |
| 364 | /* |
| 365 | * Third item: data area for storing a single command |
| 366 | * and its scatter-gather table |
| 367 | */ |
| 368 | pp->cmd_tbl = mem; |
| 369 | pp->cmd_tbl_dma = mem_dma; |
| 370 | |
| 371 | pp->cmd_tbl_sg = mem + AHCI_CMD_TBL_HDR; |
| 372 | |
| 373 | ap->private_data = pp; |
| 374 | |
| 375 | if (hpriv->cap & HOST_CAP_64) |
| 376 | writel((pp->cmd_slot_dma >> 16) >> 16, port_mmio + PORT_LST_ADDR_HI); |
| 377 | writel(pp->cmd_slot_dma & 0xffffffff, port_mmio + PORT_LST_ADDR); |
| 378 | readl(port_mmio + PORT_LST_ADDR); /* flush */ |
| 379 | |
| 380 | if (hpriv->cap & HOST_CAP_64) |
| 381 | writel((pp->rx_fis_dma >> 16) >> 16, port_mmio + PORT_FIS_ADDR_HI); |
| 382 | writel(pp->rx_fis_dma & 0xffffffff, port_mmio + PORT_FIS_ADDR); |
| 383 | readl(port_mmio + PORT_FIS_ADDR); /* flush */ |
| 384 | |
| 385 | writel(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX | |
| 386 | PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP | |
| 387 | PORT_CMD_START, port_mmio + PORT_CMD); |
| 388 | readl(port_mmio + PORT_CMD); /* flush */ |
| 389 | |
| 390 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | |
| 394 | static void ahci_port_stop(struct ata_port *ap) |
| 395 | { |
| 396 | struct device *dev = ap->host_set->dev; |
| 397 | struct ahci_port_priv *pp = ap->private_data; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 398 | void __iomem *mmio = ap->host_set->mmio_base; |
| 399 | void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | u32 tmp; |
| 401 | |
| 402 | tmp = readl(port_mmio + PORT_CMD); |
| 403 | tmp &= ~(PORT_CMD_START | PORT_CMD_FIS_RX); |
| 404 | writel(tmp, port_mmio + PORT_CMD); |
| 405 | readl(port_mmio + PORT_CMD); /* flush */ |
| 406 | |
| 407 | /* spec says 500 msecs for each PORT_CMD_{START,FIS_RX} bit, so |
| 408 | * this is slightly incorrect. |
| 409 | */ |
| 410 | msleep(500); |
| 411 | |
| 412 | ap->private_data = NULL; |
| 413 | dma_free_coherent(dev, AHCI_PORT_PRIV_DMA_SZ, |
| 414 | pp->cmd_slot, pp->cmd_slot_dma); |
Jeff Garzik | 6037d6b | 2005-11-04 22:08:00 -0500 | [diff] [blame] | 415 | ata_pad_free(ap, dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | kfree(pp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | } |
| 418 | |
| 419 | static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg_in) |
| 420 | { |
| 421 | unsigned int sc_reg; |
| 422 | |
| 423 | switch (sc_reg_in) { |
| 424 | case SCR_STATUS: sc_reg = 0; break; |
| 425 | case SCR_CONTROL: sc_reg = 1; break; |
| 426 | case SCR_ERROR: sc_reg = 2; break; |
| 427 | case SCR_ACTIVE: sc_reg = 3; break; |
| 428 | default: |
| 429 | return 0xffffffffU; |
| 430 | } |
| 431 | |
Al Viro | 1e4f2a9 | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 432 | return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | |
| 436 | static void ahci_scr_write (struct ata_port *ap, unsigned int sc_reg_in, |
| 437 | u32 val) |
| 438 | { |
| 439 | unsigned int sc_reg; |
| 440 | |
| 441 | switch (sc_reg_in) { |
| 442 | case SCR_STATUS: sc_reg = 0; break; |
| 443 | case SCR_CONTROL: sc_reg = 1; break; |
| 444 | case SCR_ERROR: sc_reg = 2; break; |
| 445 | case SCR_ACTIVE: sc_reg = 3; break; |
| 446 | default: |
| 447 | return; |
| 448 | } |
| 449 | |
Al Viro | 1e4f2a9 | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 450 | writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | } |
| 452 | |
| 453 | static void ahci_phy_reset(struct ata_port *ap) |
| 454 | { |
| 455 | void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr; |
| 456 | struct ata_taskfile tf; |
| 457 | struct ata_device *dev = &ap->device[0]; |
Jeff Garzik | 02eaa66 | 2005-11-12 01:32:19 -0500 | [diff] [blame] | 458 | u32 new_tmp, tmp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 459 | |
| 460 | __sata_phy_reset(ap); |
| 461 | |
| 462 | if (ap->flags & ATA_FLAG_PORT_DISABLED) |
| 463 | return; |
| 464 | |
| 465 | tmp = readl(port_mmio + PORT_SIG); |
| 466 | tf.lbah = (tmp >> 24) & 0xff; |
| 467 | tf.lbam = (tmp >> 16) & 0xff; |
| 468 | tf.lbal = (tmp >> 8) & 0xff; |
| 469 | tf.nsect = (tmp) & 0xff; |
| 470 | |
| 471 | dev->class = ata_dev_classify(&tf); |
Jeff Garzik | 02eaa66 | 2005-11-12 01:32:19 -0500 | [diff] [blame] | 472 | if (!ata_dev_present(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | ata_port_disable(ap); |
Jeff Garzik | 02eaa66 | 2005-11-12 01:32:19 -0500 | [diff] [blame] | 474 | return; |
| 475 | } |
| 476 | |
| 477 | /* Make sure port's ATAPI bit is set appropriately */ |
| 478 | new_tmp = tmp = readl(port_mmio + PORT_CMD); |
| 479 | if (dev->class == ATA_DEV_ATAPI) |
| 480 | new_tmp |= PORT_CMD_ATAPI; |
| 481 | else |
| 482 | new_tmp &= ~PORT_CMD_ATAPI; |
| 483 | if (new_tmp != tmp) { |
| 484 | writel(new_tmp, port_mmio + PORT_CMD); |
| 485 | readl(port_mmio + PORT_CMD); /* flush */ |
| 486 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | static u8 ahci_check_status(struct ata_port *ap) |
| 490 | { |
Al Viro | 1e4f2a9 | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 491 | void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | |
| 493 | return readl(mmio + PORT_TFDATA) & 0xFF; |
| 494 | } |
| 495 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf) |
| 497 | { |
| 498 | struct ahci_port_priv *pp = ap->private_data; |
| 499 | u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; |
| 500 | |
| 501 | ata_tf_from_fis(d2h_fis, tf); |
| 502 | } |
| 503 | |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 504 | static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | { |
| 506 | struct ahci_port_priv *pp = qc->ap->private_data; |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 507 | struct scatterlist *sg; |
| 508 | struct ahci_sg *ahci_sg; |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 509 | unsigned int n_sg = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | |
| 511 | VPRINTK("ENTER\n"); |
| 512 | |
| 513 | /* |
| 514 | * Next, the S/G list. |
| 515 | */ |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 516 | ahci_sg = pp->cmd_tbl_sg; |
| 517 | ata_for_each_sg(sg, qc) { |
| 518 | dma_addr_t addr = sg_dma_address(sg); |
| 519 | u32 sg_len = sg_dma_len(sg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 521 | ahci_sg->addr = cpu_to_le32(addr & 0xffffffff); |
| 522 | ahci_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16); |
| 523 | ahci_sg->flags_size = cpu_to_le32(sg_len - 1); |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 524 | |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 525 | ahci_sg++; |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 526 | n_sg++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | } |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 528 | |
| 529 | return n_sg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | } |
| 531 | |
| 532 | static void ahci_qc_prep(struct ata_queued_cmd *qc) |
| 533 | { |
Jeff Garzik | a0ea732 | 2005-06-04 01:13:15 -0400 | [diff] [blame] | 534 | struct ata_port *ap = qc->ap; |
| 535 | struct ahci_port_priv *pp = ap->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | u32 opts; |
| 537 | const u32 cmd_fis_len = 5; /* five dwords */ |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 538 | unsigned int n_elem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 539 | |
| 540 | /* |
| 541 | * Fill in command slot information (currently only one slot, |
| 542 | * slot 0, is currently since we don't do queueing) |
| 543 | */ |
| 544 | |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 545 | opts = cmd_fis_len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | if (qc->tf.flags & ATA_TFLAG_WRITE) |
| 547 | opts |= AHCI_CMD_WRITE; |
Jeff Garzik | a0ea732 | 2005-06-04 01:13:15 -0400 | [diff] [blame] | 548 | if (is_atapi_taskfile(&qc->tf)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | opts |= AHCI_CMD_ATAPI; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | |
| 551 | pp->cmd_slot[0].opts = cpu_to_le32(opts); |
| 552 | pp->cmd_slot[0].status = 0; |
| 553 | pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff); |
| 554 | pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16); |
| 555 | |
| 556 | /* |
| 557 | * Fill in command table information. First, the header, |
| 558 | * a SATA Register - Host to Device command FIS. |
| 559 | */ |
| 560 | ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0); |
Jeff Garzik | a0ea732 | 2005-06-04 01:13:15 -0400 | [diff] [blame] | 561 | if (opts & AHCI_CMD_ATAPI) { |
| 562 | memset(pp->cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32); |
| 563 | memcpy(pp->cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, ap->cdb_len); |
| 564 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 565 | |
| 566 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) |
| 567 | return; |
| 568 | |
Jeff Garzik | 828d09d | 2005-11-12 01:27:07 -0500 | [diff] [blame] | 569 | n_elem = ahci_fill_sg(qc); |
| 570 | |
| 571 | pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | } |
| 573 | |
Jeff Garzik | c2cd76f | 2005-11-16 09:23:30 -0500 | [diff] [blame] | 574 | static void ahci_restart_port(struct ata_port *ap, u32 irq_stat) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | { |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 576 | void __iomem *mmio = ap->host_set->mmio_base; |
| 577 | void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | u32 tmp; |
| 579 | int work; |
| 580 | |
Jeff Garzik | c2cd76f | 2005-11-16 09:23:30 -0500 | [diff] [blame] | 581 | if ((ap->device[0].class != ATA_DEV_ATAPI) || |
| 582 | ((irq_stat & PORT_IRQ_TF_ERR) == 0)) |
| 583 | printk(KERN_WARNING "ata%u: port reset, " |
| 584 | "p_is %x is %x pis %x cmd %x tf %x ss %x se %x\n", |
| 585 | ap->id, |
| 586 | irq_stat, |
| 587 | readl(mmio + HOST_IRQ_STAT), |
| 588 | readl(port_mmio + PORT_IRQ_STAT), |
| 589 | readl(port_mmio + PORT_CMD), |
| 590 | readl(port_mmio + PORT_TFDATA), |
| 591 | readl(port_mmio + PORT_SCR_STAT), |
| 592 | readl(port_mmio + PORT_SCR_ERR)); |
Jeff Garzik | 9f68a24 | 2005-11-15 14:03:47 -0500 | [diff] [blame] | 593 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | /* stop DMA */ |
| 595 | tmp = readl(port_mmio + PORT_CMD); |
| 596 | tmp &= ~PORT_CMD_START; |
| 597 | writel(tmp, port_mmio + PORT_CMD); |
| 598 | |
| 599 | /* wait for engine to stop. TODO: this could be |
| 600 | * as long as 500 msec |
| 601 | */ |
| 602 | work = 1000; |
| 603 | while (work-- > 0) { |
| 604 | tmp = readl(port_mmio + PORT_CMD); |
| 605 | if ((tmp & PORT_CMD_LIST_ON) == 0) |
| 606 | break; |
| 607 | udelay(10); |
| 608 | } |
| 609 | |
| 610 | /* clear SATA phy error, if any */ |
| 611 | tmp = readl(port_mmio + PORT_SCR_ERR); |
| 612 | writel(tmp, port_mmio + PORT_SCR_ERR); |
| 613 | |
| 614 | /* if DRQ/BSY is set, device needs to be reset. |
| 615 | * if so, issue COMRESET |
| 616 | */ |
| 617 | tmp = readl(port_mmio + PORT_TFDATA); |
| 618 | if (tmp & (ATA_BUSY | ATA_DRQ)) { |
| 619 | writel(0x301, port_mmio + PORT_SCR_CTL); |
| 620 | readl(port_mmio + PORT_SCR_CTL); /* flush */ |
| 621 | udelay(10); |
| 622 | writel(0x300, port_mmio + PORT_SCR_CTL); |
| 623 | readl(port_mmio + PORT_SCR_CTL); /* flush */ |
| 624 | } |
| 625 | |
| 626 | /* re-start DMA */ |
| 627 | tmp = readl(port_mmio + PORT_CMD); |
| 628 | tmp |= PORT_CMD_START; |
| 629 | writel(tmp, port_mmio + PORT_CMD); |
| 630 | readl(port_mmio + PORT_CMD); /* flush */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | } |
| 632 | |
| 633 | static void ahci_eng_timeout(struct ata_port *ap) |
| 634 | { |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 635 | struct ata_host_set *host_set = ap->host_set; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 636 | void __iomem *mmio = host_set->mmio_base; |
| 637 | void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | struct ata_queued_cmd *qc; |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 639 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | |
Jeff Garzik | 9f68a24 | 2005-11-15 14:03:47 -0500 | [diff] [blame] | 641 | printk(KERN_WARNING "ata%u: handling error/timeout\n", ap->id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 643 | spin_lock_irqsave(&host_set->lock, flags); |
| 644 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | qc = ata_qc_from_tag(ap, ap->active_tag); |
| 646 | if (!qc) { |
| 647 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
| 648 | ap->id); |
| 649 | } else { |
Jeff Garzik | c2cd76f | 2005-11-16 09:23:30 -0500 | [diff] [blame] | 650 | ahci_restart_port(ap, readl(port_mmio + PORT_IRQ_STAT)); |
Jeff Garzik | ad36d1a | 2005-11-14 13:56:37 -0500 | [diff] [blame] | 651 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 652 | /* hack alert! We cannot use the supplied completion |
| 653 | * function from inside the ->eh_strategy_handler() thread. |
| 654 | * libata is the only user of ->eh_strategy_handler() in |
| 655 | * any kernel, so the default scsi_done() assumes it is |
| 656 | * not being called from the SCSI EH. |
| 657 | */ |
| 658 | qc->scsidone = scsi_finish_command; |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 659 | qc->err_mask |= AC_ERR_OTHER; |
| 660 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | } |
| 662 | |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 663 | spin_unlock_irqrestore(&host_set->lock, flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | } |
| 665 | |
| 666 | static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc) |
| 667 | { |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 668 | void __iomem *mmio = ap->host_set->mmio_base; |
| 669 | void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | u32 status, serr, ci; |
| 671 | |
| 672 | serr = readl(port_mmio + PORT_SCR_ERR); |
| 673 | writel(serr, port_mmio + PORT_SCR_ERR); |
| 674 | |
| 675 | status = readl(port_mmio + PORT_IRQ_STAT); |
| 676 | writel(status, port_mmio + PORT_IRQ_STAT); |
| 677 | |
| 678 | ci = readl(port_mmio + PORT_CMD_ISSUE); |
| 679 | if (likely((ci & 0x1) == 0)) { |
| 680 | if (qc) { |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 681 | assert(qc->err_mask == 0); |
| 682 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | qc = NULL; |
| 684 | } |
| 685 | } |
| 686 | |
| 687 | if (status & PORT_IRQ_FATAL) { |
Jeff Garzik | ad36d1a | 2005-11-14 13:56:37 -0500 | [diff] [blame] | 688 | unsigned int err_mask; |
| 689 | if (status & PORT_IRQ_TF_ERR) |
| 690 | err_mask = AC_ERR_DEV; |
| 691 | else if (status & PORT_IRQ_IF_ERR) |
| 692 | err_mask = AC_ERR_ATA_BUS; |
| 693 | else |
| 694 | err_mask = AC_ERR_HOST_BUS; |
| 695 | |
Jeff Garzik | 9f68a24 | 2005-11-15 14:03:47 -0500 | [diff] [blame] | 696 | /* command processing has stopped due to error; restart */ |
Jeff Garzik | c2cd76f | 2005-11-16 09:23:30 -0500 | [diff] [blame] | 697 | ahci_restart_port(ap, status); |
Jeff Garzik | 9f68a24 | 2005-11-15 14:03:47 -0500 | [diff] [blame] | 698 | |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 699 | if (qc) { |
| 700 | qc->err_mask |= AC_ERR_OTHER; |
| 701 | ata_qc_complete(qc); |
| 702 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | } |
| 704 | |
| 705 | return 1; |
| 706 | } |
| 707 | |
| 708 | static void ahci_irq_clear(struct ata_port *ap) |
| 709 | { |
| 710 | /* TODO */ |
| 711 | } |
| 712 | |
| 713 | static irqreturn_t ahci_interrupt (int irq, void *dev_instance, struct pt_regs *regs) |
| 714 | { |
| 715 | struct ata_host_set *host_set = dev_instance; |
| 716 | struct ahci_host_priv *hpriv; |
| 717 | unsigned int i, handled = 0; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 718 | void __iomem *mmio; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | u32 irq_stat, irq_ack = 0; |
| 720 | |
| 721 | VPRINTK("ENTER\n"); |
| 722 | |
| 723 | hpriv = host_set->private_data; |
| 724 | mmio = host_set->mmio_base; |
| 725 | |
| 726 | /* sigh. 0xffffffff is a valid return from h/w */ |
| 727 | irq_stat = readl(mmio + HOST_IRQ_STAT); |
| 728 | irq_stat &= hpriv->port_map; |
| 729 | if (!irq_stat) |
| 730 | return IRQ_NONE; |
| 731 | |
| 732 | spin_lock(&host_set->lock); |
| 733 | |
| 734 | for (i = 0; i < host_set->n_ports; i++) { |
| 735 | struct ata_port *ap; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 737 | if (!(irq_stat & (1 << i))) |
| 738 | continue; |
| 739 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | ap = host_set->ports[i]; |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 741 | if (ap) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | struct ata_queued_cmd *qc; |
| 743 | qc = ata_qc_from_tag(ap, ap->active_tag); |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 744 | if (!ahci_host_intr(ap, qc)) |
| 745 | if (ata_ratelimit()) { |
| 746 | struct pci_dev *pdev = |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 747 | to_pci_dev(ap->host_set->dev); |
| 748 | dev_printk(KERN_WARNING, &pdev->dev, |
| 749 | "unhandled interrupt on port %u\n", |
| 750 | i); |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 751 | } |
| 752 | |
| 753 | VPRINTK("port %u\n", i); |
| 754 | } else { |
| 755 | VPRINTK("port %u (no irq)\n", i); |
| 756 | if (ata_ratelimit()) { |
| 757 | struct pci_dev *pdev = |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 758 | to_pci_dev(ap->host_set->dev); |
| 759 | dev_printk(KERN_WARNING, &pdev->dev, |
| 760 | "interrupt on disabled port %u\n", i); |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 761 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | } |
Jeff Garzik | 67846b3 | 2005-10-05 02:58:32 -0400 | [diff] [blame] | 763 | |
| 764 | irq_ack |= (1 << i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | } |
| 766 | |
| 767 | if (irq_ack) { |
| 768 | writel(irq_ack, mmio + HOST_IRQ_STAT); |
| 769 | handled = 1; |
| 770 | } |
| 771 | |
| 772 | spin_unlock(&host_set->lock); |
| 773 | |
| 774 | VPRINTK("EXIT\n"); |
| 775 | |
| 776 | return IRQ_RETVAL(handled); |
| 777 | } |
| 778 | |
| 779 | static int ahci_qc_issue(struct ata_queued_cmd *qc) |
| 780 | { |
| 781 | struct ata_port *ap = qc->ap; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 782 | void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 783 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | writel(1, port_mmio + PORT_CMD_ISSUE); |
| 785 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ |
| 786 | |
| 787 | return 0; |
| 788 | } |
| 789 | |
| 790 | static void ahci_setup_port(struct ata_ioports *port, unsigned long base, |
| 791 | unsigned int port_idx) |
| 792 | { |
| 793 | VPRINTK("ENTER, base==0x%lx, port_idx %u\n", base, port_idx); |
| 794 | base = ahci_port_base_ul(base, port_idx); |
| 795 | VPRINTK("base now==0x%lx\n", base); |
| 796 | |
| 797 | port->cmd_addr = base; |
| 798 | port->scr_addr = base + PORT_SCR; |
| 799 | |
| 800 | VPRINTK("EXIT\n"); |
| 801 | } |
| 802 | |
| 803 | static int ahci_host_init(struct ata_probe_ent *probe_ent) |
| 804 | { |
| 805 | struct ahci_host_priv *hpriv = probe_ent->private_data; |
| 806 | struct pci_dev *pdev = to_pci_dev(probe_ent->dev); |
| 807 | void __iomem *mmio = probe_ent->mmio_base; |
| 808 | u32 tmp, cap_save; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 809 | unsigned int i, j, using_dac; |
| 810 | int rc; |
| 811 | void __iomem *port_mmio; |
| 812 | |
| 813 | cap_save = readl(mmio + HOST_CAP); |
| 814 | cap_save &= ( (1<<28) | (1<<17) ); |
| 815 | cap_save |= (1 << 27); |
| 816 | |
| 817 | /* global controller reset */ |
| 818 | tmp = readl(mmio + HOST_CTL); |
| 819 | if ((tmp & HOST_RESET) == 0) { |
| 820 | writel(tmp | HOST_RESET, mmio + HOST_CTL); |
| 821 | readl(mmio + HOST_CTL); /* flush */ |
| 822 | } |
| 823 | |
| 824 | /* reset must complete within 1 second, or |
| 825 | * the hardware should be considered fried. |
| 826 | */ |
| 827 | ssleep(1); |
| 828 | |
| 829 | tmp = readl(mmio + HOST_CTL); |
| 830 | if (tmp & HOST_RESET) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 831 | dev_printk(KERN_ERR, &pdev->dev, |
| 832 | "controller reset failed (0x%x)\n", tmp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 833 | return -EIO; |
| 834 | } |
| 835 | |
| 836 | writel(HOST_AHCI_EN, mmio + HOST_CTL); |
| 837 | (void) readl(mmio + HOST_CTL); /* flush */ |
| 838 | writel(cap_save, mmio + HOST_CAP); |
| 839 | writel(0xf, mmio + HOST_PORTS_IMPL); |
| 840 | (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ |
| 841 | |
Jeff Garzik | bd12097 | 2006-01-29 02:47:03 -0500 | [diff] [blame] | 842 | if (pdev->vendor == PCI_VENDOR_ID_INTEL) { |
| 843 | u16 tmp16; |
| 844 | |
| 845 | pci_read_config_word(pdev, 0x92, &tmp16); |
| 846 | tmp16 |= 0xf; |
| 847 | pci_write_config_word(pdev, 0x92, tmp16); |
| 848 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | |
| 850 | hpriv->cap = readl(mmio + HOST_CAP); |
| 851 | hpriv->port_map = readl(mmio + HOST_PORTS_IMPL); |
| 852 | probe_ent->n_ports = (hpriv->cap & 0x1f) + 1; |
| 853 | |
| 854 | VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n", |
| 855 | hpriv->cap, hpriv->port_map, probe_ent->n_ports); |
| 856 | |
| 857 | using_dac = hpriv->cap & HOST_CAP_64; |
| 858 | if (using_dac && |
| 859 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
| 860 | rc = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
| 861 | if (rc) { |
| 862 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
| 863 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 864 | dev_printk(KERN_ERR, &pdev->dev, |
| 865 | "64-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 866 | return rc; |
| 867 | } |
| 868 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | } else { |
| 870 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 871 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 872 | dev_printk(KERN_ERR, &pdev->dev, |
| 873 | "32-bit DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | return rc; |
| 875 | } |
| 876 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
| 877 | if (rc) { |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 878 | dev_printk(KERN_ERR, &pdev->dev, |
| 879 | "32-bit consistent DMA enable failed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | return rc; |
| 881 | } |
| 882 | } |
| 883 | |
| 884 | for (i = 0; i < probe_ent->n_ports; i++) { |
| 885 | #if 0 /* BIOSen initialize this incorrectly */ |
| 886 | if (!(hpriv->port_map & (1 << i))) |
| 887 | continue; |
| 888 | #endif |
| 889 | |
| 890 | port_mmio = ahci_port_base(mmio, i); |
| 891 | VPRINTK("mmio %p port_mmio %p\n", mmio, port_mmio); |
| 892 | |
| 893 | ahci_setup_port(&probe_ent->port[i], |
| 894 | (unsigned long) mmio, i); |
| 895 | |
| 896 | /* make sure port is not active */ |
| 897 | tmp = readl(port_mmio + PORT_CMD); |
| 898 | VPRINTK("PORT_CMD 0x%x\n", tmp); |
| 899 | if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON | |
| 900 | PORT_CMD_FIS_RX | PORT_CMD_START)) { |
| 901 | tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON | |
| 902 | PORT_CMD_FIS_RX | PORT_CMD_START); |
| 903 | writel(tmp, port_mmio + PORT_CMD); |
| 904 | readl(port_mmio + PORT_CMD); /* flush */ |
| 905 | |
| 906 | /* spec says 500 msecs for each bit, so |
| 907 | * this is slightly incorrect. |
| 908 | */ |
| 909 | msleep(500); |
| 910 | } |
| 911 | |
| 912 | writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD); |
| 913 | |
| 914 | j = 0; |
| 915 | while (j < 100) { |
| 916 | msleep(10); |
| 917 | tmp = readl(port_mmio + PORT_SCR_STAT); |
| 918 | if ((tmp & 0xf) == 0x3) |
| 919 | break; |
| 920 | j++; |
| 921 | } |
| 922 | |
| 923 | tmp = readl(port_mmio + PORT_SCR_ERR); |
| 924 | VPRINTK("PORT_SCR_ERR 0x%x\n", tmp); |
| 925 | writel(tmp, port_mmio + PORT_SCR_ERR); |
| 926 | |
| 927 | /* ack any pending irq events for this port */ |
| 928 | tmp = readl(port_mmio + PORT_IRQ_STAT); |
| 929 | VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); |
| 930 | if (tmp) |
| 931 | writel(tmp, port_mmio + PORT_IRQ_STAT); |
| 932 | |
| 933 | writel(1 << i, mmio + HOST_IRQ_STAT); |
| 934 | |
| 935 | /* set irq mask (enables interrupts) */ |
| 936 | writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK); |
| 937 | } |
| 938 | |
| 939 | tmp = readl(mmio + HOST_CTL); |
| 940 | VPRINTK("HOST_CTL 0x%x\n", tmp); |
| 941 | writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL); |
| 942 | tmp = readl(mmio + HOST_CTL); |
| 943 | VPRINTK("HOST_CTL 0x%x\n", tmp); |
| 944 | |
| 945 | pci_set_master(pdev); |
| 946 | |
| 947 | return 0; |
| 948 | } |
| 949 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 950 | static void ahci_print_info(struct ata_probe_ent *probe_ent) |
| 951 | { |
| 952 | struct ahci_host_priv *hpriv = probe_ent->private_data; |
| 953 | struct pci_dev *pdev = to_pci_dev(probe_ent->dev); |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 954 | void __iomem *mmio = probe_ent->mmio_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 955 | u32 vers, cap, impl, speed; |
| 956 | const char *speed_s; |
| 957 | u16 cc; |
| 958 | const char *scc_s; |
| 959 | |
| 960 | vers = readl(mmio + HOST_VERSION); |
| 961 | cap = hpriv->cap; |
| 962 | impl = hpriv->port_map; |
| 963 | |
| 964 | speed = (cap >> 20) & 0xf; |
| 965 | if (speed == 1) |
| 966 | speed_s = "1.5"; |
| 967 | else if (speed == 2) |
| 968 | speed_s = "3"; |
| 969 | else |
| 970 | speed_s = "?"; |
| 971 | |
| 972 | pci_read_config_word(pdev, 0x0a, &cc); |
| 973 | if (cc == 0x0101) |
| 974 | scc_s = "IDE"; |
| 975 | else if (cc == 0x0106) |
| 976 | scc_s = "SATA"; |
| 977 | else if (cc == 0x0104) |
| 978 | scc_s = "RAID"; |
| 979 | else |
| 980 | scc_s = "unknown"; |
| 981 | |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 982 | dev_printk(KERN_INFO, &pdev->dev, |
| 983 | "AHCI %02x%02x.%02x%02x " |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 984 | "%u slots %u ports %s Gbps 0x%x impl %s mode\n" |
| 985 | , |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 986 | |
| 987 | (vers >> 24) & 0xff, |
| 988 | (vers >> 16) & 0xff, |
| 989 | (vers >> 8) & 0xff, |
| 990 | vers & 0xff, |
| 991 | |
| 992 | ((cap >> 8) & 0x1f) + 1, |
| 993 | (cap & 0x1f) + 1, |
| 994 | speed_s, |
| 995 | impl, |
| 996 | scc_s); |
| 997 | |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 998 | dev_printk(KERN_INFO, &pdev->dev, |
| 999 | "flags: " |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1000 | "%s%s%s%s%s%s" |
| 1001 | "%s%s%s%s%s%s%s\n" |
| 1002 | , |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1003 | |
| 1004 | cap & (1 << 31) ? "64bit " : "", |
| 1005 | cap & (1 << 30) ? "ncq " : "", |
| 1006 | cap & (1 << 28) ? "ilck " : "", |
| 1007 | cap & (1 << 27) ? "stag " : "", |
| 1008 | cap & (1 << 26) ? "pm " : "", |
| 1009 | cap & (1 << 25) ? "led " : "", |
| 1010 | |
| 1011 | cap & (1 << 24) ? "clo " : "", |
| 1012 | cap & (1 << 19) ? "nz " : "", |
| 1013 | cap & (1 << 18) ? "only " : "", |
| 1014 | cap & (1 << 17) ? "pmp " : "", |
| 1015 | cap & (1 << 15) ? "pio " : "", |
| 1016 | cap & (1 << 14) ? "slum " : "", |
| 1017 | cap & (1 << 13) ? "part " : "" |
| 1018 | ); |
| 1019 | } |
| 1020 | |
| 1021 | static int ahci_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) |
| 1022 | { |
| 1023 | static int printed_version; |
| 1024 | struct ata_probe_ent *probe_ent = NULL; |
| 1025 | struct ahci_host_priv *hpriv; |
| 1026 | unsigned long base; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 1027 | void __iomem *mmio_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1028 | unsigned int board_idx = (unsigned int) ent->driver_data; |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1029 | int have_msi, pci_dev_busy = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | int rc; |
| 1031 | |
| 1032 | VPRINTK("ENTER\n"); |
| 1033 | |
| 1034 | if (!printed_version++) |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 1035 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | |
| 1037 | rc = pci_enable_device(pdev); |
| 1038 | if (rc) |
| 1039 | return rc; |
| 1040 | |
| 1041 | rc = pci_request_regions(pdev, DRV_NAME); |
| 1042 | if (rc) { |
| 1043 | pci_dev_busy = 1; |
| 1044 | goto err_out; |
| 1045 | } |
| 1046 | |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1047 | if (pci_enable_msi(pdev) == 0) |
| 1048 | have_msi = 1; |
| 1049 | else { |
| 1050 | pci_intx(pdev, 1); |
| 1051 | have_msi = 0; |
| 1052 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | |
| 1054 | probe_ent = kmalloc(sizeof(*probe_ent), GFP_KERNEL); |
| 1055 | if (probe_ent == NULL) { |
| 1056 | rc = -ENOMEM; |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1057 | goto err_out_msi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | } |
| 1059 | |
| 1060 | memset(probe_ent, 0, sizeof(*probe_ent)); |
| 1061 | probe_ent->dev = pci_dev_to_dev(pdev); |
| 1062 | INIT_LIST_HEAD(&probe_ent->node); |
| 1063 | |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 1064 | mmio_base = pci_iomap(pdev, AHCI_PCI_BAR, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | if (mmio_base == NULL) { |
| 1066 | rc = -ENOMEM; |
| 1067 | goto err_out_free_ent; |
| 1068 | } |
| 1069 | base = (unsigned long) mmio_base; |
| 1070 | |
| 1071 | hpriv = kmalloc(sizeof(*hpriv), GFP_KERNEL); |
| 1072 | if (!hpriv) { |
| 1073 | rc = -ENOMEM; |
| 1074 | goto err_out_iounmap; |
| 1075 | } |
| 1076 | memset(hpriv, 0, sizeof(*hpriv)); |
| 1077 | |
| 1078 | probe_ent->sht = ahci_port_info[board_idx].sht; |
| 1079 | probe_ent->host_flags = ahci_port_info[board_idx].host_flags; |
| 1080 | probe_ent->pio_mask = ahci_port_info[board_idx].pio_mask; |
| 1081 | probe_ent->udma_mask = ahci_port_info[board_idx].udma_mask; |
| 1082 | probe_ent->port_ops = ahci_port_info[board_idx].port_ops; |
| 1083 | |
| 1084 | probe_ent->irq = pdev->irq; |
| 1085 | probe_ent->irq_flags = SA_SHIRQ; |
| 1086 | probe_ent->mmio_base = mmio_base; |
| 1087 | probe_ent->private_data = hpriv; |
| 1088 | |
Jeff Garzik | 4b0060f | 2005-06-04 00:50:22 -0400 | [diff] [blame] | 1089 | if (have_msi) |
| 1090 | hpriv->flags |= AHCI_FLAG_MSI; |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1091 | |
Jeff Garzik | bd12097 | 2006-01-29 02:47:03 -0500 | [diff] [blame] | 1092 | /* JMicron-specific fixup: make sure we're in AHCI mode */ |
| 1093 | if (pdev->vendor == 0x197b) |
| 1094 | pci_write_config_byte(pdev, 0x41, 0xa1); |
| 1095 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1096 | /* initialize adapter */ |
| 1097 | rc = ahci_host_init(probe_ent); |
| 1098 | if (rc) |
| 1099 | goto err_out_hpriv; |
| 1100 | |
| 1101 | ahci_print_info(probe_ent); |
| 1102 | |
| 1103 | /* FIXME: check ata_device_add return value */ |
| 1104 | ata_device_add(probe_ent); |
| 1105 | kfree(probe_ent); |
| 1106 | |
| 1107 | return 0; |
| 1108 | |
| 1109 | err_out_hpriv: |
| 1110 | kfree(hpriv); |
| 1111 | err_out_iounmap: |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 1112 | pci_iounmap(pdev, mmio_base); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | err_out_free_ent: |
| 1114 | kfree(probe_ent); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1115 | err_out_msi: |
| 1116 | if (have_msi) |
| 1117 | pci_disable_msi(pdev); |
| 1118 | else |
| 1119 | pci_intx(pdev, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | pci_release_regions(pdev); |
| 1121 | err_out: |
| 1122 | if (!pci_dev_busy) |
| 1123 | pci_disable_device(pdev); |
| 1124 | return rc; |
| 1125 | } |
| 1126 | |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1127 | static void ahci_remove_one (struct pci_dev *pdev) |
| 1128 | { |
| 1129 | struct device *dev = pci_dev_to_dev(pdev); |
| 1130 | struct ata_host_set *host_set = dev_get_drvdata(dev); |
| 1131 | struct ahci_host_priv *hpriv = host_set->private_data; |
| 1132 | struct ata_port *ap; |
| 1133 | unsigned int i; |
| 1134 | int have_msi; |
| 1135 | |
| 1136 | for (i = 0; i < host_set->n_ports; i++) { |
| 1137 | ap = host_set->ports[i]; |
| 1138 | |
| 1139 | scsi_remove_host(ap->host); |
| 1140 | } |
| 1141 | |
Jeff Garzik | 4b0060f | 2005-06-04 00:50:22 -0400 | [diff] [blame] | 1142 | have_msi = hpriv->flags & AHCI_FLAG_MSI; |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1143 | free_irq(host_set->irq, host_set); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1144 | |
| 1145 | for (i = 0; i < host_set->n_ports; i++) { |
| 1146 | ap = host_set->ports[i]; |
| 1147 | |
| 1148 | ata_scsi_release(ap->host); |
| 1149 | scsi_host_put(ap->host); |
| 1150 | } |
| 1151 | |
Jeff Garzik | e005f01 | 2005-08-30 04:18:28 -0400 | [diff] [blame] | 1152 | kfree(hpriv); |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 1153 | pci_iounmap(pdev, host_set->mmio_base); |
Jeff Garzik | ead5de9 | 2005-05-31 11:53:57 -0400 | [diff] [blame] | 1154 | kfree(host_set); |
| 1155 | |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1156 | if (have_msi) |
| 1157 | pci_disable_msi(pdev); |
| 1158 | else |
| 1159 | pci_intx(pdev, 0); |
| 1160 | pci_release_regions(pdev); |
Jeff Garzik | 907f467 | 2005-05-12 15:03:42 -0400 | [diff] [blame] | 1161 | pci_disable_device(pdev); |
| 1162 | dev_set_drvdata(dev, NULL); |
| 1163 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1164 | |
| 1165 | static int __init ahci_init(void) |
| 1166 | { |
| 1167 | return pci_module_init(&ahci_pci_driver); |
| 1168 | } |
| 1169 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1170 | static void __exit ahci_exit(void) |
| 1171 | { |
| 1172 | pci_unregister_driver(&ahci_pci_driver); |
| 1173 | } |
| 1174 | |
| 1175 | |
| 1176 | MODULE_AUTHOR("Jeff Garzik"); |
| 1177 | MODULE_DESCRIPTION("AHCI SATA low-level driver"); |
| 1178 | MODULE_LICENSE("GPL"); |
| 1179 | MODULE_DEVICE_TABLE(pci, ahci_pci_tbl); |
Jeff Garzik | 6885433 | 2005-08-23 02:53:51 -0400 | [diff] [blame] | 1180 | MODULE_VERSION(DRV_VERSION); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1181 | |
| 1182 | module_init(ahci_init); |
| 1183 | module_exit(ahci_exit); |