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R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +00001Kernel driver lm90
2==================
3
4Supported chips:
5 * National Semiconductor LM90
6 Prefix: 'lm90'
7 Addresses scanned: I2C 0x4c
8 Datasheet: Publicly available at the National Semiconductor website
9 http://www.national.com/pf/LM/LM90.html
10 * National Semiconductor LM89
11 Prefix: 'lm99'
12 Addresses scanned: I2C 0x4c and 0x4d
13 Datasheet: Publicly available at the National Semiconductor website
14 http://www.national.com/pf/LM/LM89.html
15 * National Semiconductor LM99
16 Prefix: 'lm99'
17 Addresses scanned: I2C 0x4c and 0x4d
18 Datasheet: Publicly available at the National Semiconductor website
19 http://www.national.com/pf/LM/LM99.html
20 * National Semiconductor LM86
21 Prefix: 'lm86'
22 Addresses scanned: I2C 0x4c
23 Datasheet: Publicly available at the National Semiconductor website
24 http://www.national.com/pf/LM/LM86.html
25 * Analog Devices ADM1032
26 Prefix: 'adm1032'
Jean Delvare90209b42005-10-26 22:20:21 +020027 Addresses scanned: I2C 0x4c and 0x4d
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000028 Datasheet: Publicly available at the Analog Devices website
Jean Delvare90209b42005-10-26 22:20:21 +020029 http://www.analog.com/en/prod/0,2877,ADM1032,00.html
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000030 * Analog Devices ADT7461
31 Prefix: 'adt7461'
Jean Delvare90209b42005-10-26 22:20:21 +020032 Addresses scanned: I2C 0x4c and 0x4d
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000033 Datasheet: Publicly available at the Analog Devices website
Jean Delvare90209b42005-10-26 22:20:21 +020034 http://www.analog.com/en/prod/0,2877,ADT7461,00.html
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000035 Note: Only if in ADM1032 compatibility mode
36 * Maxim MAX6657
37 Prefix: 'max6657'
38 Addresses scanned: I2C 0x4c
39 Datasheet: Publicly available at the Maxim website
40 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
41 * Maxim MAX6658
42 Prefix: 'max6657'
43 Addresses scanned: I2C 0x4c
44 Datasheet: Publicly available at the Maxim website
45 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
46 * Maxim MAX6659
47 Prefix: 'max6657'
48 Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e)
49 Datasheet: Publicly available at the Maxim website
50 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578
Rainer Birkenmaier32c82a92007-06-09 10:11:16 -040051 * Maxim MAX6680
52 Prefix: 'max6680'
53 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
54 0x4c, 0x4d and 0x4e
55 Datasheet: Publicly available at the Maxim website
56 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
57 * Maxim MAX6681
58 Prefix: 'max6680'
59 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
60 0x4c, 0x4d and 0x4e
61 Datasheet: Publicly available at the Maxim website
62 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000063
64
65Author: Jean Delvare <khali@linux-fr.org>
66
67
68Description
69-----------
70
71The LM90 is a digital temperature sensor. It senses its own temperature as
72well as the temperature of up to one external diode. It is compatible
73with many other devices such as the LM86, the LM89, the LM99, the ADM1032,
Rainer Birkenmaier32c82a92007-06-09 10:11:16 -040074the MAX6657, MAX6658, MAX6659, MAX6680 and the MAX6681 all of which are
75supported by this driver.
76
77Note that there is no easy way to differentiate between the MAX6657,
78MAX6658 and MAX6659 variants. The extra address and features of the
79MAX6659 are not supported by this driver. The MAX6680 and MAX6681 only
80differ in their pinout, therefore they obviously can't (and don't need to)
81be distinguished. Additionally, the ADT7461 is supported if found in
82ADM1032 compatibility mode.
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000083
84The specificity of this family of chipsets over the ADM1021/LM84
85family is that it features critical limits with hysteresis, and an
86increased resolution of the remote temperature measurement.
87
88The different chipsets of the family are not strictly identical, although
Jean Delvaref65e1702008-10-17 17:51:09 +020089very similar. For reference, here comes a non-exhaustive list of specific
90features:
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000091
92LM90:
93 * Filter and alert configuration register at 0xBF.
94 * ALERT is triggered by temperatures over critical limits.
95
96LM86 and LM89:
97 * Same as LM90
98 * Better external channel accuracy
99
100LM99:
101 * Same as LM89
102 * External temperature shifted by 16 degrees down
103
104ADM1032:
105 * Consecutive alert register at 0x22.
106 * Conversion averaging.
107 * Up to 64 conversions/s.
108 * ALERT is triggered by open remote sensor.
Jean Delvarec3df5802005-10-26 21:39:40 +0200109 * SMBus PEC support for Write Byte and Receive Byte transactions.
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000110
Rainer Birkenmaier32c82a92007-06-09 10:11:16 -0400111ADT7461:
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000112 * Extended temperature range (breaks compatibility)
113 * Lower resolution for remote temperature
114
115MAX6657 and MAX6658:
Jean Delvaref65e1702008-10-17 17:51:09 +0200116 * Better local resolution
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000117 * Remote sensor type selection
118
Rainer Birkenmaier32c82a92007-06-09 10:11:16 -0400119MAX6659:
Jean Delvaref65e1702008-10-17 17:51:09 +0200120 * Better local resolution
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000121 * Selectable address
122 * Second critical temperature limit
123 * Remote sensor type selection
124
Rainer Birkenmaier32c82a92007-06-09 10:11:16 -0400125MAX6680 and MAX6681:
126 * Selectable address
127 * Remote sensor type selection
128
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000129All temperature values are given in degrees Celsius. Resolution
130is 1.0 degree for the local temperature, 0.125 degree for the remote
Jean Delvaref65e1702008-10-17 17:51:09 +0200131temperature, except for the MAX6657, MAX6658 and MAX6659 which have a
132resolution of 0.125 degree for both temperatures.
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +0000133
134Each sensor has its own high and low limits, plus a critical limit.
135Additionally, there is a relative hysteresis value common to both critical
136values. To make life easier to user-space applications, two absolute values
137are exported, one for each channel, but these values are of course linked.
138Only the local hysteresis can be set from user-space, and the same delta
139applies to the remote hysteresis.
140
141The lm90 driver will not update its values more frequently than every
142other second; reading them more often will do no harm, but will return
143'old' values.
144
Jean Delvarec3df5802005-10-26 21:39:40 +0200145PEC Support
146-----------
147
148The ADM1032 is the only chip of the family which supports PEC. It does
149not support PEC on all transactions though, so some care must be taken.
150
151When reading a register value, the PEC byte is computed and sent by the
152ADM1032 chip. However, in the case of a combined transaction (SMBus Read
153Byte), the ADM1032 computes the CRC value over only the second half of
154the message rather than its entirety, because it thinks the first half
155of the message belongs to a different transaction. As a result, the CRC
156value differs from what the SMBus master expects, and all reads fail.
157
158For this reason, the lm90 driver will enable PEC for the ADM1032 only if
159the bus supports the SMBus Send Byte and Receive Byte transaction types.
160These transactions will be used to read register values, instead of
161SMBus Read Byte, and PEC will work properly.
162
163Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC.
164Instead, it will try to write the PEC value to the register (because the
165SMBus Send Byte transaction with PEC is similar to a Write Byte transaction
Jean Delvare09664152007-06-09 10:11:15 -0400166without PEC), which is not what we want. Thus, PEC is explicitly disabled
Jean Delvarec3df5802005-10-26 21:39:40 +0200167on SMBus Send Byte transactions in the lm90 driver.
168
169PEC on byte data transactions represents a significant increase in bandwidth
170usage (+33% for writes, +25% for reads) in normal conditions. With the need
171to use two SMBus transaction for reads, this overhead jumps to +50%. Worse,
172two transactions will typically mean twice as much delay waiting for
173transaction completion, effectively doubling the register cache refresh time.
174I guess reliability comes at a price, but it's quite expensive this time.
175
176So, as not everyone might enjoy the slowdown, PEC can be disabled through
177sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1
178to that file to enable PEC again.