Lennert Buytenhek | 9dd0b19 | 2008-03-27 14:51:41 -0400 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-orion5x/common.c |
| 3 | * |
| 4 | * Core functions for Marvell Orion 5x SoCs |
| 5 | * |
| 6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> |
| 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public |
| 9 | * License version 2. This program is licensed "as is" without any |
| 10 | * warranty of any kind, whether express or implied. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/serial_8250.h> |
| 17 | #include <linux/mbus.h> |
| 18 | #include <linux/mv643xx_eth.h> |
| 19 | #include <linux/mv643xx_i2c.h> |
| 20 | #include <linux/ata_platform.h> |
| 21 | #include <asm/page.h> |
| 22 | #include <asm/setup.h> |
| 23 | #include <asm/timex.h> |
| 24 | #include <asm/mach/arch.h> |
| 25 | #include <asm/mach/map.h> |
| 26 | #include <asm/mach/time.h> |
| 27 | #include <asm/arch/hardware.h> |
| 28 | #include <asm/arch/orion5x.h> |
| 29 | #include <asm/plat-orion/ehci-orion.h> |
| 30 | #include <asm/plat-orion/orion_nand.h> |
| 31 | #include <asm/plat-orion/time.h> |
| 32 | #include "common.h" |
| 33 | |
| 34 | /***************************************************************************** |
| 35 | * I/O Address Mapping |
| 36 | ****************************************************************************/ |
| 37 | static struct map_desc orion5x_io_desc[] __initdata = { |
| 38 | { |
| 39 | .virtual = ORION5X_REGS_VIRT_BASE, |
| 40 | .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE), |
| 41 | .length = ORION5X_REGS_SIZE, |
| 42 | .type = MT_DEVICE |
| 43 | }, |
| 44 | { |
| 45 | .virtual = ORION5X_PCIE_IO_VIRT_BASE, |
| 46 | .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE), |
| 47 | .length = ORION5X_PCIE_IO_SIZE, |
| 48 | .type = MT_DEVICE |
| 49 | }, |
| 50 | { |
| 51 | .virtual = ORION5X_PCI_IO_VIRT_BASE, |
| 52 | .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE), |
| 53 | .length = ORION5X_PCI_IO_SIZE, |
| 54 | .type = MT_DEVICE |
| 55 | }, |
| 56 | { |
| 57 | .virtual = ORION5X_PCIE_WA_VIRT_BASE, |
| 58 | .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE), |
| 59 | .length = ORION5X_PCIE_WA_SIZE, |
| 60 | .type = MT_DEVICE |
| 61 | }, |
| 62 | }; |
| 63 | |
| 64 | void __init orion5x_map_io(void) |
| 65 | { |
| 66 | iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc)); |
| 67 | } |
| 68 | |
| 69 | /***************************************************************************** |
| 70 | * UART |
| 71 | ****************************************************************************/ |
| 72 | |
| 73 | static struct resource orion5x_uart_resources[] = { |
| 74 | { |
| 75 | .start = UART0_PHYS_BASE, |
| 76 | .end = UART0_PHYS_BASE + 0xff, |
| 77 | .flags = IORESOURCE_MEM, |
| 78 | }, |
| 79 | { |
| 80 | .start = IRQ_ORION5X_UART0, |
| 81 | .end = IRQ_ORION5X_UART0, |
| 82 | .flags = IORESOURCE_IRQ, |
| 83 | }, |
| 84 | { |
| 85 | .start = UART1_PHYS_BASE, |
| 86 | .end = UART1_PHYS_BASE + 0xff, |
| 87 | .flags = IORESOURCE_MEM, |
| 88 | }, |
| 89 | { |
| 90 | .start = IRQ_ORION5X_UART1, |
| 91 | .end = IRQ_ORION5X_UART1, |
| 92 | .flags = IORESOURCE_IRQ, |
| 93 | }, |
| 94 | }; |
| 95 | |
| 96 | static struct plat_serial8250_port orion5x_uart_data[] = { |
| 97 | { |
| 98 | .mapbase = UART0_PHYS_BASE, |
| 99 | .membase = (char *)UART0_VIRT_BASE, |
| 100 | .irq = IRQ_ORION5X_UART0, |
| 101 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
| 102 | .iotype = UPIO_MEM, |
| 103 | .regshift = 2, |
| 104 | .uartclk = ORION5X_TCLK, |
| 105 | }, |
| 106 | { |
| 107 | .mapbase = UART1_PHYS_BASE, |
| 108 | .membase = (char *)UART1_VIRT_BASE, |
| 109 | .irq = IRQ_ORION5X_UART1, |
| 110 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, |
| 111 | .iotype = UPIO_MEM, |
| 112 | .regshift = 2, |
| 113 | .uartclk = ORION5X_TCLK, |
| 114 | }, |
| 115 | { }, |
| 116 | }; |
| 117 | |
| 118 | static struct platform_device orion5x_uart = { |
| 119 | .name = "serial8250", |
| 120 | .id = PLAT8250_DEV_PLATFORM, |
| 121 | .dev = { |
| 122 | .platform_data = orion5x_uart_data, |
| 123 | }, |
| 124 | .resource = orion5x_uart_resources, |
| 125 | .num_resources = ARRAY_SIZE(orion5x_uart_resources), |
| 126 | }; |
| 127 | |
| 128 | /******************************************************************************* |
| 129 | * USB Controller - 2 interfaces |
| 130 | ******************************************************************************/ |
| 131 | |
| 132 | static struct resource orion5x_ehci0_resources[] = { |
| 133 | { |
| 134 | .start = ORION5X_USB0_PHYS_BASE, |
| 135 | .end = ORION5X_USB0_PHYS_BASE + SZ_4K, |
| 136 | .flags = IORESOURCE_MEM, |
| 137 | }, |
| 138 | { |
| 139 | .start = IRQ_ORION5X_USB0_CTRL, |
| 140 | .end = IRQ_ORION5X_USB0_CTRL, |
| 141 | .flags = IORESOURCE_IRQ, |
| 142 | }, |
| 143 | }; |
| 144 | |
| 145 | static struct resource orion5x_ehci1_resources[] = { |
| 146 | { |
| 147 | .start = ORION5X_USB1_PHYS_BASE, |
| 148 | .end = ORION5X_USB1_PHYS_BASE + SZ_4K, |
| 149 | .flags = IORESOURCE_MEM, |
| 150 | }, |
| 151 | { |
| 152 | .start = IRQ_ORION5X_USB1_CTRL, |
| 153 | .end = IRQ_ORION5X_USB1_CTRL, |
| 154 | .flags = IORESOURCE_IRQ, |
| 155 | }, |
| 156 | }; |
| 157 | |
| 158 | static struct orion_ehci_data orion5x_ehci_data = { |
| 159 | .dram = &orion5x_mbus_dram_info, |
| 160 | }; |
| 161 | |
| 162 | static u64 ehci_dmamask = 0xffffffffUL; |
| 163 | |
| 164 | static struct platform_device orion5x_ehci0 = { |
| 165 | .name = "orion-ehci", |
| 166 | .id = 0, |
| 167 | .dev = { |
| 168 | .dma_mask = &ehci_dmamask, |
| 169 | .coherent_dma_mask = 0xffffffff, |
| 170 | .platform_data = &orion5x_ehci_data, |
| 171 | }, |
| 172 | .resource = orion5x_ehci0_resources, |
| 173 | .num_resources = ARRAY_SIZE(orion5x_ehci0_resources), |
| 174 | }; |
| 175 | |
| 176 | static struct platform_device orion5x_ehci1 = { |
| 177 | .name = "orion-ehci", |
| 178 | .id = 1, |
| 179 | .dev = { |
| 180 | .dma_mask = &ehci_dmamask, |
| 181 | .coherent_dma_mask = 0xffffffff, |
| 182 | .platform_data = &orion5x_ehci_data, |
| 183 | }, |
| 184 | .resource = orion5x_ehci1_resources, |
| 185 | .num_resources = ARRAY_SIZE(orion5x_ehci1_resources), |
| 186 | }; |
| 187 | |
| 188 | /***************************************************************************** |
| 189 | * Gigabit Ethernet port |
| 190 | * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) |
| 191 | ****************************************************************************/ |
| 192 | |
| 193 | static struct resource orion5x_eth_shared_resources[] = { |
| 194 | { |
| 195 | .start = ORION5X_ETH_PHYS_BASE + 0x2000, |
| 196 | .end = ORION5X_ETH_PHYS_BASE + 0x3fff, |
| 197 | .flags = IORESOURCE_MEM, |
| 198 | }, |
| 199 | }; |
| 200 | |
| 201 | static struct platform_device orion5x_eth_shared = { |
| 202 | .name = MV643XX_ETH_SHARED_NAME, |
| 203 | .id = 0, |
| 204 | .num_resources = 1, |
| 205 | .resource = orion5x_eth_shared_resources, |
| 206 | }; |
| 207 | |
| 208 | static struct resource orion5x_eth_resources[] = { |
| 209 | { |
| 210 | .name = "eth irq", |
| 211 | .start = IRQ_ORION5X_ETH_SUM, |
| 212 | .end = IRQ_ORION5X_ETH_SUM, |
| 213 | .flags = IORESOURCE_IRQ, |
| 214 | } |
| 215 | }; |
| 216 | |
| 217 | static struct platform_device orion5x_eth = { |
| 218 | .name = MV643XX_ETH_NAME, |
| 219 | .id = 0, |
| 220 | .num_resources = 1, |
| 221 | .resource = orion5x_eth_resources, |
| 222 | }; |
| 223 | |
| 224 | void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) |
| 225 | { |
Lennert Buytenhek | fa3959f | 2008-04-24 01:27:02 +0200 | [diff] [blame^] | 226 | eth_data->shared = &orion5x_eth_shared; |
Lennert Buytenhek | 9dd0b19 | 2008-03-27 14:51:41 -0400 | [diff] [blame] | 227 | orion5x_eth.dev.platform_data = eth_data; |
Lennert Buytenhek | fa3959f | 2008-04-24 01:27:02 +0200 | [diff] [blame^] | 228 | |
Lennert Buytenhek | 9dd0b19 | 2008-03-27 14:51:41 -0400 | [diff] [blame] | 229 | platform_device_register(&orion5x_eth_shared); |
| 230 | platform_device_register(&orion5x_eth); |
| 231 | } |
| 232 | |
| 233 | /***************************************************************************** |
| 234 | * I2C controller |
| 235 | * (The Orion and Discovery (MV643xx) families share the same I2C controller) |
| 236 | ****************************************************************************/ |
| 237 | |
| 238 | static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = { |
| 239 | .freq_m = 8, /* assumes 166 MHz TCLK */ |
| 240 | .freq_n = 3, |
| 241 | .timeout = 1000, /* Default timeout of 1 second */ |
| 242 | }; |
| 243 | |
| 244 | static struct resource orion5x_i2c_resources[] = { |
| 245 | { |
| 246 | .name = "i2c base", |
| 247 | .start = I2C_PHYS_BASE, |
| 248 | .end = I2C_PHYS_BASE + 0x20 -1, |
| 249 | .flags = IORESOURCE_MEM, |
| 250 | }, |
| 251 | { |
| 252 | .name = "i2c irq", |
| 253 | .start = IRQ_ORION5X_I2C, |
| 254 | .end = IRQ_ORION5X_I2C, |
| 255 | .flags = IORESOURCE_IRQ, |
| 256 | }, |
| 257 | }; |
| 258 | |
| 259 | static struct platform_device orion5x_i2c = { |
| 260 | .name = MV64XXX_I2C_CTLR_NAME, |
| 261 | .id = 0, |
| 262 | .num_resources = ARRAY_SIZE(orion5x_i2c_resources), |
| 263 | .resource = orion5x_i2c_resources, |
| 264 | .dev = { |
| 265 | .platform_data = &orion5x_i2c_pdata, |
| 266 | }, |
| 267 | }; |
| 268 | |
| 269 | /***************************************************************************** |
| 270 | * Sata port |
| 271 | ****************************************************************************/ |
| 272 | static struct resource orion5x_sata_resources[] = { |
| 273 | { |
| 274 | .name = "sata base", |
| 275 | .start = ORION5X_SATA_PHYS_BASE, |
| 276 | .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1, |
| 277 | .flags = IORESOURCE_MEM, |
| 278 | }, |
| 279 | { |
| 280 | .name = "sata irq", |
| 281 | .start = IRQ_ORION5X_SATA, |
| 282 | .end = IRQ_ORION5X_SATA, |
| 283 | .flags = IORESOURCE_IRQ, |
| 284 | }, |
| 285 | }; |
| 286 | |
| 287 | static struct platform_device orion5x_sata = { |
| 288 | .name = "sata_mv", |
| 289 | .id = 0, |
| 290 | .dev = { |
| 291 | .coherent_dma_mask = 0xffffffff, |
| 292 | }, |
| 293 | .num_resources = ARRAY_SIZE(orion5x_sata_resources), |
| 294 | .resource = orion5x_sata_resources, |
| 295 | }; |
| 296 | |
| 297 | void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data) |
| 298 | { |
| 299 | sata_data->dram = &orion5x_mbus_dram_info; |
| 300 | orion5x_sata.dev.platform_data = sata_data; |
| 301 | platform_device_register(&orion5x_sata); |
| 302 | } |
| 303 | |
| 304 | /***************************************************************************** |
| 305 | * Time handling |
| 306 | ****************************************************************************/ |
| 307 | |
| 308 | static void orion5x_timer_init(void) |
| 309 | { |
| 310 | orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK); |
| 311 | } |
| 312 | |
| 313 | struct sys_timer orion5x_timer = { |
| 314 | .init = orion5x_timer_init, |
| 315 | }; |
| 316 | |
| 317 | /***************************************************************************** |
| 318 | * General |
| 319 | ****************************************************************************/ |
| 320 | |
| 321 | /* |
| 322 | * Identify device ID and rev from PCIE configuration header space '0'. |
| 323 | */ |
| 324 | static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) |
| 325 | { |
| 326 | orion5x_pcie_id(dev, rev); |
| 327 | |
| 328 | if (*dev == MV88F5281_DEV_ID) { |
| 329 | if (*rev == MV88F5281_REV_D2) { |
| 330 | *dev_name = "MV88F5281-D2"; |
| 331 | } else if (*rev == MV88F5281_REV_D1) { |
| 332 | *dev_name = "MV88F5281-D1"; |
| 333 | } else { |
| 334 | *dev_name = "MV88F5281-Rev-Unsupported"; |
| 335 | } |
| 336 | } else if (*dev == MV88F5182_DEV_ID) { |
| 337 | if (*rev == MV88F5182_REV_A2) { |
| 338 | *dev_name = "MV88F5182-A2"; |
| 339 | } else { |
| 340 | *dev_name = "MV88F5182-Rev-Unsupported"; |
| 341 | } |
| 342 | } else if (*dev == MV88F5181_DEV_ID) { |
| 343 | if (*rev == MV88F5181_REV_B1) { |
| 344 | *dev_name = "MV88F5181-Rev-B1"; |
| 345 | } else { |
| 346 | *dev_name = "MV88F5181-Rev-Unsupported"; |
| 347 | } |
| 348 | } else { |
| 349 | *dev_name = "Device-Unknown"; |
| 350 | } |
| 351 | } |
| 352 | |
| 353 | void __init orion5x_init(void) |
| 354 | { |
| 355 | char *dev_name; |
| 356 | u32 dev, rev; |
| 357 | |
| 358 | orion5x_id(&dev, &rev, &dev_name); |
| 359 | printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK); |
| 360 | |
| 361 | /* |
| 362 | * Setup Orion address map |
| 363 | */ |
| 364 | orion5x_setup_cpu_mbus_bridge(); |
| 365 | orion5x_setup_eth_wins(); |
| 366 | |
| 367 | /* |
| 368 | * Register devices. |
| 369 | */ |
| 370 | platform_device_register(&orion5x_uart); |
| 371 | platform_device_register(&orion5x_ehci0); |
| 372 | if (dev == MV88F5182_DEV_ID) |
| 373 | platform_device_register(&orion5x_ehci1); |
| 374 | platform_device_register(&orion5x_i2c); |
| 375 | } |
| 376 | |
| 377 | /* |
| 378 | * Many orion-based systems have buggy bootloader implementations. |
| 379 | * This is a common fixup for bogus memory tags. |
| 380 | */ |
| 381 | void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t, |
| 382 | char **from, struct meminfo *meminfo) |
| 383 | { |
| 384 | for (; t->hdr.size; t = tag_next(t)) |
| 385 | if (t->hdr.tag == ATAG_MEM && |
| 386 | (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK || |
| 387 | t->u.mem.start & ~PAGE_MASK)) { |
| 388 | printk(KERN_WARNING |
| 389 | "Clearing invalid memory bank %dKB@0x%08x\n", |
| 390 | t->u.mem.size / 1024, t->u.mem.start); |
| 391 | t->hdr.tag = 0; |
| 392 | } |
| 393 | } |