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gerrit-public.fairphone.software / fp2-dev / platform / art / 2d76b041be770102fc912effc398e629a18180d2 / . / src / compiler / dataflow.cc
blob: 03ede70453ff3616d556766e7d4bf788ee1374e9 [file] [log] [blame]
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1/*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
buzbeeeaf09bc2012-11-15 14:51:41 -0800[diff] [blame]17#include "compiler_internals.h"
buzbeeefc63692012-11-14 16:31:52 -0800[diff] [blame]18#include "dataflow.h"
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]19
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]20namespace art {
21
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]22/*
23 * Main table containing data flow attributes for each bytecode. The
24 * first kNumPackedOpcodes entries are for Dalvik bytecode
25 * instructions, where extended opcode at the MIR level are appended
26 * afterwards.
27 *
28 * TODO - many optimization flags are incomplete - they will only limit the
29 * scope of optimizations but will not cause mis-optimizations.
30 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]31const int oat_data_flow_attributes[kMirOpLast] = {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]32 // 00 NOP
33 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]34
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]35 // 01 MOVE vA, vB
36 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]37
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]38 // 02 MOVE_FROM16 vAA, vBBBB
39 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]40
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]41 // 03 MOVE_16 vAAAA, vBBBB
42 DF_DA | DF_UB | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]43
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]44 // 04 MOVE_WIDE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]46
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]47 // 05 MOVE_WIDE_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]49
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]50 // 06 MOVE_WIDE_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]52
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]53 // 07 MOVE_OBJECT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]54 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]55
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]56 // 08 MOVE_OBJECT_FROM16 vAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]57 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]58
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]59 // 09 MOVE_OBJECT_16 vAAAA, vBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]60 DF_DA | DF_UB | DF_NULL_TRANSFER_0 | DF_IS_MOVE | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]61
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]62 // 0A MOVE_RESULT vAA
63 DF_DA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]64
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]65 // 0B MOVE_RESULT_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]66 DF_DA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]67
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]68 // 0C MOVE_RESULT_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]69 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]70
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]71 // 0D MOVE_EXCEPTION vAA
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]72 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]73
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]74 // 0E RETURN_VOID
75 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]76
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]77 // 0F RETURN vAA
78 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]79
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]80 // 10 RETURN_WIDE vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]81 DF_UA | DF_A_WIDE,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]82
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]83 // 11 RETURN_OBJECT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]84 DF_UA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]85
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]86 // 12 CONST_4 vA, #+B
87 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]88
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]89 // 13 CONST_16 vAA, #+BBBB
90 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]91
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]92 // 14 CONST vAA, #+BBBBBBBB
93 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]94
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]95 // 15 CONST_HIGH16 VAA, #+BBBB0000
96 DF_DA | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]97
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]98 // 16 CONST_WIDE_16 vAA, #+BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]99 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]100
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]101 // 17 CONST_WIDE_32 vAA, #+BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]102 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]103
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]104 // 18 CONST_WIDE vAA, #+BBBBBBBBBBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]105 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]106
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]107 // 19 CONST_WIDE_HIGH16 vAA, #+BBBB000000000000
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]108 DF_DA | DF_A_WIDE | DF_SETS_CONST,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]109
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]110 // 1A CONST_STRING vAA, string@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]111 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]112
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]113 // 1B CONST_STRING_JUMBO vAA, string@BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]114 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]115
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]116 // 1C CONST_CLASS vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]117 DF_DA | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]118
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]119 // 1D MONITOR_ENTER vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]120 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]121
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]122 // 1E MONITOR_EXIT vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]123 DF_UA | DF_NULL_CHK_0 | DF_REF_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]124
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]125 // 1F CHK_CAST vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]126 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]127
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]128 // 20 INSTANCE_OF vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]129 DF_DA | DF_UB | DF_CORE_A | DF_REF_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]130
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]131 // 21 ARRAY_LENGTH vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]132 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_CORE_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]133
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]134 // 22 NEW_INSTANCE vAA, type@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]135 DF_DA | DF_NON_NULL_DST | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]136
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]137 // 23 NEW_ARRAY vA, vB, type@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]138 DF_DA | DF_UB | DF_NON_NULL_DST | DF_REF_A | DF_CORE_B | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]139
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]140 // 24 FILLED_NEW_ARRAY {vD, vE, vF, vG, vA}
141 DF_FORMAT_35C | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]142
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]143 // 25 FILLED_NEW_ARRAY_RANGE {vCCCC .. vNNNN}, type@BBBB
144 DF_FORMAT_3RC | DF_NON_NULL_RET | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]145
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]146 // 26 FILL_ARRAY_DATA vAA, +BBBBBBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]147 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]148
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]149 // 27 THROW vAA
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]150 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]151
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]152 // 28 GOTO
153 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]154
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]155 // 29 GOTO_16
156 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]157
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]158 // 2A GOTO_32
159 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]160
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]161 // 2B PACKED_SWITCH vAA, +BBBBBBBB
162 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]163
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]164 // 2C SPARSE_SWITCH vAA, +BBBBBBBB
165 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]166
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]167 // 2D CMPL_FLOAT vAA, vBB, vCC
168 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]169
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]170 // 2E CMPG_FLOAT vAA, vBB, vCC
171 DF_DA | DF_UB | DF_UC | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]172
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]173 // 2F CMPL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]175
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]176 // 30 CMPG_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]179 // 31 CMP_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]181
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]182 // 32 IF_EQ vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]183 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]184
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]185 // 33 IF_NE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]186 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]187
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]188 // 34 IF_LT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]189 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]190
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]191 // 35 IF_GE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]192 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]193
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]194 // 36 IF_GT vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]195 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]196
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]197 // 37 IF_LE vA, vB, +CCCC
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]198 DF_UA | DF_UB,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]199
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]200 // 38 IF_EQZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]201 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]202
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]203 // 39 IF_NEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]204 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]205
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]206 // 3A IF_LTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]207 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]208
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]209 // 3B IF_GEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]210 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]211
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]212 // 3C IF_GTZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]213 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]214
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]215 // 3D IF_LEZ vAA, +BBBB
buzbee2a83e8f2012-07-13 16:42:30 -0700[diff] [blame]216 DF_UA,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]217
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]218 // 3E UNUSED_3E
219 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]220
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]221 // 3F UNUSED_3F
222 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]223
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]224 // 40 UNUSED_40
225 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]226
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]227 // 41 UNUSED_41
228 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]229
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]230 // 42 UNUSED_42
231 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]232
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]233 // 43 UNUSED_43
234 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]235
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]236 // 44 AGET vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]237 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]238
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]239 // 45 AGET_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]240 DF_DA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]241
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]242 // 46 AGET_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]243 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]244
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]245 // 47 AGET_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]246 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]247
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]248 // 48 AGET_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]249 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]250
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]251 // 49 AGET_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]252 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]253
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]254 // 4A AGET_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]255 DF_DA | DF_UB | DF_UC | DF_NULL_CHK_0 | DF_RANGE_CHK_1 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]256
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]257 // 4B APUT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]258 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]259
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]260 // 4C APUT_WIDE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]261 DF_UA | DF_A_WIDE | DF_UB | DF_UC | DF_NULL_CHK_2 | DF_RANGE_CHK_3 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]262
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]263 // 4D APUT_OBJECT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]264 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_A | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]265
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]266 // 4E APUT_BOOLEAN vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]267 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]268
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]269 // 4F APUT_BYTE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]270 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]271
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]272 // 50 APUT_CHAR vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]273 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]274
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]275 // 51 APUT_SHORT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]276 DF_UA | DF_UB | DF_UC | DF_NULL_CHK_1 | DF_RANGE_CHK_2 | DF_REF_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]277
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]278 // 52 IGET vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]279 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]280
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]281 // 53 IGET_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]282 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]283
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]284 // 54 IGET_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]285 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]286
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]287 // 55 IGET_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]288 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]289
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]290 // 56 IGET_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]291 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]292
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]293 // 57 IGET_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]294 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]295
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]296 // 58 IGET_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]297 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]298
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]299 // 59 IPUT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]300 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]301
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]302 // 5A IPUT_WIDE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]303 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]304
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]305 // 5B IPUT_OBJECT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]306 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]307
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]308 // 5C IPUT_BOOLEAN vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]309 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]310
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]311 // 5D IPUT_BYTE vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]312 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]313
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]314 // 5E IPUT_CHAR vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]315 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]316
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]317 // 5F IPUT_SHORT vA, vB, field@CCCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]318 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]320 // 60 SGET vAA, field@BBBB
321 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]322
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]323 // 61 SGET_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]324 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]325
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]326 // 62 SGET_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]327 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]328
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]329 // 63 SGET_BOOLEAN vAA, field@BBBB
330 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]331
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]332 // 64 SGET_BYTE vAA, field@BBBB
333 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]334
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]335 // 65 SGET_CHAR vAA, field@BBBB
336 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]337
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]338 // 66 SGET_SHORT vAA, field@BBBB
339 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]340
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]341 // 67 SPUT vAA, field@BBBB
342 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]343
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]344 // 68 SPUT_WIDE vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]345 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]346
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]347 // 69 SPUT_OBJECT vAA, field@BBBB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]348 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]349
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]350 // 6A SPUT_BOOLEAN vAA, field@BBBB
351 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]352
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]353 // 6B SPUT_BYTE vAA, field@BBBB
354 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]355
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]356 // 6C SPUT_CHAR vAA, field@BBBB
357 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]358
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]359 // 6D SPUT_SHORT vAA, field@BBBB
360 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]361
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]362 // 6E INVOKE_VIRTUAL {vD, vE, vF, vG, vA}
363 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]364
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]365 // 6F INVOKE_SUPER {vD, vE, vF, vG, vA}
366 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]367
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]368 // 70 INVOKE_DIRECT {vD, vE, vF, vG, vA}
369 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]370
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]371 // 71 INVOKE_STATIC {vD, vE, vF, vG, vA}
372 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]373
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]374 // 72 INVOKE_INTERFACE {vD, vE, vF, vG, vA}
375 DF_FORMAT_35C | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]376
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]377 // 73 UNUSED_73
378 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]379
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]380 // 74 INVOKE_VIRTUAL_RANGE {vCCCC .. vNNNN}
381 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]382
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]383 // 75 INVOKE_SUPER_RANGE {vCCCC .. vNNNN}
384 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]385
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]386 // 76 INVOKE_DIRECT_RANGE {vCCCC .. vNNNN}
387 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]388
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]389 // 77 INVOKE_STATIC_RANGE {vCCCC .. vNNNN}
390 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]391
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]392 // 78 INVOKE_INTERFACE_RANGE {vCCCC .. vNNNN}
393 DF_FORMAT_3RC | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]394
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]395 // 79 UNUSED_79
396 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]397
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]398 // 7A UNUSED_7A
399 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]400
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]401 // 7B NEG_INT vA, vB
402 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]403
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]404 // 7C NOT_INT vA, vB
405 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]406
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]407 // 7D NEG_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]409
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]410 // 7E NOT_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]413 // 7F NEG_FLOAT vA, vB
414 DF_DA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]415
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]416 // 80 NEG_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]418
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]419 // 81 INT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]420 DF_DA | DF_A_WIDE | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]421
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]422 // 82 INT_TO_FLOAT vA, vB
423 DF_DA | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]424
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]425 // 83 INT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]426 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]428 // 84 LONG_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]431 // 85 LONG_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]432 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]433
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]434 // 86 LONG_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]435 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]436
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]437 // 87 FLOAT_TO_INT vA, vB
438 DF_DA | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]439
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]440 // 88 FLOAT_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]441 DF_DA | DF_A_WIDE | DF_UB | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]442
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]443 // 89 FLOAT_TO_DOUBLE vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]444 DF_DA | DF_A_WIDE | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]445
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]446 // 8A DOUBLE_TO_INT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]447 DF_DA | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]448
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]449 // 8B DOUBLE_TO_LONG vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]450 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_B | DF_CORE_A,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]451
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]452 // 8C DOUBLE_TO_FLOAT vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]453 DF_DA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]454
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]455 // 8D INT_TO_BYTE vA, vB
456 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]457
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]458 // 8E INT_TO_CHAR vA, vB
459 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]460
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]461 // 8F INT_TO_SHORT vA, vB
462 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]463
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]464 // 90 ADD_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]465 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]466
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]467 // 91 SUB_INT vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]468 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]469
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]470 // 92 MUL_INT vAA, vBB, vCC
471 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]472
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]473 // 93 DIV_INT vAA, vBB, vCC
474 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]475
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]476 // 94 REM_INT vAA, vBB, vCC
477 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]478
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]479 // 95 AND_INT vAA, vBB, vCC
480 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]481
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]482 // 96 OR_INT vAA, vBB, vCC
483 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]484
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]485 // 97 XOR_INT vAA, vBB, vCC
486 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]487
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]488 // 98 SHL_INT vAA, vBB, vCC
489 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]490
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]491 // 99 SHR_INT vAA, vBB, vCC
492 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]493
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]494 // 9A USHR_INT vAA, vBB, vCC
495 DF_DA | DF_UB | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]496
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]497 // 9B ADD_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]498 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]499
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]500 // 9C SUB_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]501 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]502
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]503 // 9D MUL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]504 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]505
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]506 // 9E DIV_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]507 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]508
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]509 // 9F REM_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]510 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]511
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]512 // A0 AND_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]513 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]514
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]515 // A1 OR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]516 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]517
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]518 // A2 XOR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]519 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]520
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]521 // A3 SHL_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]522 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]523
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]524 // A4 SHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]525 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]526
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]527 // A5 USHR_LONG vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]528 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_CORE_A | DF_CORE_B | DF_CORE_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]529
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]530 // A6 ADD_FLOAT vAA, vBB, vCC
531 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]532
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]533 // A7 SUB_FLOAT vAA, vBB, vCC
534 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]535
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]536 // A8 MUL_FLOAT vAA, vBB, vCC
537 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]538
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]539 // A9 DIV_FLOAT vAA, vBB, vCC
540 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]541
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]542 // AA REM_FLOAT vAA, vBB, vCC
543 DF_DA | DF_UB | DF_UC | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]544
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]545 // AB ADD_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]546 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]547
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]548 // AC SUB_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]549 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]550
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]551 // AD MUL_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]552 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]553
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]554 // AE DIV_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]555 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]556
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]557 // AF REM_DOUBLE vAA, vBB, vCC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]558 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_A | DF_FP_B | DF_FP_C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]559
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]560 // B0 ADD_INT_2ADDR vA, vB
561 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]562
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]563 // B1 SUB_INT_2ADDR vA, vB
564 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]565
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]566 // B2 MUL_INT_2ADDR vA, vB
567 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]568
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]569 // B3 DIV_INT_2ADDR vA, vB
570 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]571
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]572 // B4 REM_INT_2ADDR vA, vB
573 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]574
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]575 // B5 AND_INT_2ADDR vA, vB
576 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]577
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]578 // B6 OR_INT_2ADDR vA, vB
579 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]580
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]581 // B7 XOR_INT_2ADDR vA, vB
582 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]583
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]584 // B8 SHL_INT_2ADDR vA, vB
585 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]586
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]587 // B9 SHR_INT_2ADDR vA, vB
588 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]589
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]590 // BA USHR_INT_2ADDR vA, vB
591 DF_DA | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]592
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]593 // BB ADD_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]594 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]595
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]596 // BC SUB_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]597 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]598
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]599 // BD MUL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]600 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]601
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]602 // BE DIV_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]603 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]604
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]605 // BF REM_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]606 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]607
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]608 // C0 AND_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]609 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]610
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]611 // C1 OR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]612 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]613
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]614 // C2 XOR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]615 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]616
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]617 // C3 SHL_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]618 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]619
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]620 // C4 SHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]621 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]622
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]623 // C5 USHR_LONG_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]624 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]625
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]626 // C6 ADD_FLOAT_2ADDR vA, vB
627 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]628
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]629 // C7 SUB_FLOAT_2ADDR vA, vB
630 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]631
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]632 // C8 MUL_FLOAT_2ADDR vA, vB
633 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]634
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]635 // C9 DIV_FLOAT_2ADDR vA, vB
636 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]637
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]638 // CA REM_FLOAT_2ADDR vA, vB
639 DF_DA | DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]640
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]641 // CB ADD_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]642 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]643
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]644 // CC SUB_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]645 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]646
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]647 // CD MUL_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]648 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]649
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]650 // CE DIV_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]651 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]652
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]653 // CF REM_DOUBLE_2ADDR vA, vB
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]654 DF_DA | DF_A_WIDE | DF_UA | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]655
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]656 // D0 ADD_INT_LIT16 vA, vB, #+CCCC
657 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]658
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]659 // D1 RSUB_INT vA, vB, #+CCCC
660 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]661
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]662 // D2 MUL_INT_LIT16 vA, vB, #+CCCC
663 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]664
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]665 // D3 DIV_INT_LIT16 vA, vB, #+CCCC
666 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]667
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]668 // D4 REM_INT_LIT16 vA, vB, #+CCCC
669 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]670
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]671 // D5 AND_INT_LIT16 vA, vB, #+CCCC
672 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]673
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]674 // D6 OR_INT_LIT16 vA, vB, #+CCCC
675 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]676
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]677 // D7 XOR_INT_LIT16 vA, vB, #+CCCC
678 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]679
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]680 // D8 ADD_INT_LIT8 vAA, vBB, #+CC
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]681 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]682
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]683 // D9 RSUB_INT_LIT8 vAA, vBB, #+CC
684 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]685
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]686 // DA MUL_INT_LIT8 vAA, vBB, #+CC
687 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]688
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]689 // DB DIV_INT_LIT8 vAA, vBB, #+CC
690 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]691
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]692 // DC REM_INT_LIT8 vAA, vBB, #+CC
693 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]694
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]695 // DD AND_INT_LIT8 vAA, vBB, #+CC
696 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]697
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]698 // DE OR_INT_LIT8 vAA, vBB, #+CC
699 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]700
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]701 // DF XOR_INT_LIT8 vAA, vBB, #+CC
702 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]703
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]704 // E0 SHL_INT_LIT8 vAA, vBB, #+CC
705 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]706
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]707 // E1 SHR_INT_LIT8 vAA, vBB, #+CC
708 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]709
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]710 // E2 USHR_INT_LIT8 vAA, vBB, #+CC
711 DF_DA | DF_UB | DF_CORE_A | DF_CORE_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]712
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]713 // E3 IGET_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]714 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]715
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]716 // E4 IPUT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]717 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]718
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]719 // E5 SGET_VOLATILE
720 DF_DA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]721
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]722 // E6 SPUT_VOLATILE
723 DF_UA | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]724
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]725 // E7 IGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]726 DF_DA | DF_UB | DF_NULL_CHK_0 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]727
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]728 // E8 IGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]729 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]730
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]731 // E9 IPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]732 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2 | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]733
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]734 // EA SGET_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]735 DF_DA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]736
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]737 // EB SPUT_WIDE_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]738 DF_UA | DF_A_WIDE | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]739
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]740 // EC BREAKPOINT
741 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]742
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]743 // ED THROW_VERIFICATION_ERROR
744 DF_NOP | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]745
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]746 // EE EXECUTE_INLINE
747 DF_FORMAT_35C,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]748
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]749 // EF EXECUTE_INLINE_RANGE
750 DF_FORMAT_3RC,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]751
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]752 // F0 INVOKE_OBJECT_INIT_RANGE
753 DF_NOP | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]754
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]755 // F1 RETURN_VOID_BARRIER
756 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]757
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]758 // F2 IGET_QUICK
759 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]760
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]761 // F3 IGET_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]762 DF_DA | DF_A_WIDE | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]763
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]764 // F4 IGET_OBJECT_QUICK
765 DF_DA | DF_UB | DF_NULL_CHK_0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]766
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]767 // F5 IPUT_QUICK
768 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]769
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]770 // F6 IPUT_WIDE_QUICK
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]771 DF_UA | DF_A_WIDE | DF_UB | DF_NULL_CHK_2,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]772
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]773 // F7 IPUT_OBJECT_QUICK
774 DF_UA | DF_UB | DF_NULL_CHK_1,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]775
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]776 // F8 INVOKE_VIRTUAL_QUICK
777 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]778
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]779 // F9 INVOKE_VIRTUAL_QUICK_RANGE
780 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]781
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]782 // FA INVOKE_SUPER_QUICK
783 DF_FORMAT_35C | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]784
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]785 // FB INVOKE_SUPER_QUICK_RANGE
786 DF_FORMAT_3RC | DF_NULL_CHK_OUT0 | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]787
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]788 // FC IPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]789 DF_UA | DF_UB | DF_NULL_CHK_1 | DF_REF_A | DF_REF_B,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]790
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]791 // FD SGET_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]792 DF_DA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]793
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]794 // FE SPUT_OBJECT_VOLATILE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]795 DF_UA | DF_REF_A | DF_UMS,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]796
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]797 // FF UNUSED_FF
798 DF_NOP,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]799
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]800 // Beginning of extended MIR opcodes
801 // 100 MIR_PHI
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]802 DF_DA | DF_NULL_TRANSFER_N,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]803
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]804 // 101 MIR_COPY
805 DF_DA | DF_UB | DF_IS_MOVE,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]806
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]807 // 102 MIR_FUSED_CMPL_FLOAT
808 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]809
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]810 // 103 MIR_FUSED_CMPG_FLOAT
811 DF_UA | DF_UB | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]812
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]813 // 104 MIR_FUSED_CMPL_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]814 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]815
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]816 // 105 MIR_FUSED_CMPG_DOUBLE
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]817 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]818
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]819 // 106 MIR_FUSED_CMP_LONG
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]820 DF_UA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]821
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]822 // 107 MIR_NOP
823 DF_NOP,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]824
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]825 // 108 MIR_NULL_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]826 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]827
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]828 // 109 MIR_RANGE_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]829 0,
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]830
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]831 // 110 MIR_DIV_ZERO_CHECK
832 0,
833
834 // 111 MIR_CHECK
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]835 0,
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]836};
837
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]838/* Return the base virtual register for a SSA name */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]839int SRegToVReg(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]840{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]841 DCHECK_LT(ssa_reg, static_cast<int>(cu->ssa_base_vregs->num_used));
842 return GET_ELEM_N(cu->ssa_base_vregs, int, ssa_reg);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]843}
844
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]845int SRegToSubscript(const CompilationUnit* cu, int ssa_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]846{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]847 DCHECK(ssa_reg < static_cast<int>(cu->ssa_subscripts->num_used));
848 return GET_ELEM_N(cu->ssa_subscripts, int, ssa_reg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]849}
850
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]851static int GetSSAUseCount(CompilationUnit* cu, int s_reg)
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]852{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]853 DCHECK(s_reg < static_cast<int>(cu->raw_use_counts.num_used));
854 return cu->raw_use_counts.elem_list[s_reg];
buzbee84fd6932012-03-29 16:44:16 -0700[diff] [blame]855}
856
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]857static std::string GetSSAName(const CompilationUnit* cu, int ssa_reg)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]858{
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]859 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
860}
861
862// Similar to GetSSAName, but if ssa name represents an immediate show that as well.
863static std::string GetSSANameWithConst(const CompilationUnit* cu, int ssa_reg, bool singles_only)
864{
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]865 if (cu->reg_location == NULL) {
866 // Pre-SSA - just use the Dalvik vreg
867 return StringPrintf("v%d", ssa_reg);
868 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]869 if (cu->reg_location[ssa_reg].is_const) {
870 if (!singles_only && cu->reg_location[ssa_reg].wide) {
871 int64_t immval = cu->constant_values[ssa_reg + 1];
872 immval = (immval << 32) | cu->constant_values[ssa_reg];
873 return StringPrintf("v%d_%d#0x%llx", SRegToVReg(cu, ssa_reg),
874 SRegToSubscript(cu, ssa_reg), immval);
875 } else {
876 int32_t immval = cu->constant_values[ssa_reg];
877 return StringPrintf("v%d_%d#0x%x", SRegToVReg(cu, ssa_reg),
878 SRegToSubscript(cu, ssa_reg), immval);
879 }
880 } else {
881 return StringPrintf("v%d_%d", SRegToVReg(cu, ssa_reg), SRegToSubscript(cu, ssa_reg));
882 }
883}
884
885
886char* GetDalvikDisassembly(CompilationUnit* cu, const MIR* mir)
887{
888 DecodedInstruction insn = mir->dalvikInsn;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]889 std::string str;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]890 int flags = 0;
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]891 int opcode = insn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]892 char* ret;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]893 bool nop = false;
894 SSARepresentation* ssa_rep = mir->ssa_rep;
895 Instruction::Format dalvik_format = Instruction::k10x; // Default to no-operand format
896 int defs = (ssa_rep != NULL) ? ssa_rep->num_defs : 0;
897 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0;
898
899 // Handle special cases.
900 if ((opcode == kMirOpCheck) || (opcode == kMirOpCheckPart2)) {
901 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
902 str.append(": ");
903 // Recover the original Dex instruction
904 insn = mir->meta.throw_insn->dalvikInsn;
905 ssa_rep = mir->meta.throw_insn->ssa_rep;
906 defs = ssa_rep->num_defs;
907 uses = ssa_rep->num_uses;
908 opcode = insn.opcode;
909 } else if (opcode == kMirOpNop) {
910 str.append("[");
911 insn.opcode = mir->meta.original_opcode;
912 opcode = mir->meta.original_opcode;
913 nop = true;
914 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]915
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]916 if (opcode >= kMirOpFirst) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]917 str.append(extended_mir_op_names[opcode - kMirOpFirst]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]918 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]919 dalvik_format = Instruction::FormatOf(insn.opcode);
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]920 flags = Instruction::FlagsOf(insn.opcode);
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]921 str.append(Instruction::Name(insn.opcode));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]922 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]923
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]924 if (opcode == kMirOpPhi) {
925 int* incoming = reinterpret_cast<int*>(insn.vB);
926 str.append(StringPrintf(" %s = (%s",
927 GetSSANameWithConst(cu, ssa_rep->defs[0], true).c_str(),
928 GetSSANameWithConst(cu, ssa_rep->uses[0], true).c_str()));
929 str.append(StringPrintf(":%d",incoming[0]));
930 int i;
931 for (i = 1; i < uses; i++) {
932 str.append(StringPrintf(", %s:%d",
933 GetSSANameWithConst(cu, ssa_rep->uses[i], true).c_str(),
934 incoming[i]));
935 }
936 str.append(")");
937 } else if (flags & Instruction::kBranch) {
938 // For branches, decode the instructions to print out the branch targets.
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]939 int offset = 0;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]940 switch (dalvik_format) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]941 case Instruction::k21t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]942 str.append(StringPrintf(" %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]943 offset = insn.vB;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]944 break;
945 case Instruction::k22t:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]946 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(cu, ssa_rep->uses[0], false).c_str(),
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]947 GetSSANameWithConst(cu, ssa_rep->uses[1], false).c_str()));
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]948 offset = insn.vC;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]949 break;
950 case Instruction::k10t:
951 case Instruction::k20t:
952 case Instruction::k30t:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]953 offset = insn.vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]954 break;
955 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]956 LOG(FATAL) << "Unexpected branch format " << dalvik_format << " from " << insn.opcode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]957 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]958 str.append(StringPrintf(" 0x%x (%c%x)", mir->offset + offset,
959 offset > 0 ? '+' : '-', offset > 0 ? offset : -offset));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]960 } else {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]961 // For invokes-style formats, treat wide regs as a pair of singles
962 bool show_singles = ((dalvik_format == Instruction::k35c) ||
963 (dalvik_format == Instruction::k3rc));
964 if (defs != 0) {
965 str.append(StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->defs[0], false).c_str()));
966 if (uses != 0) {
967 str.append(", ");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]968 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]969 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]970 for (int i = 0; i < uses; i++) {
971 str.append(
972 StringPrintf(" %s", GetSSANameWithConst(cu, ssa_rep->uses[i], show_singles).c_str()));
buzbeed8506212012-12-20 14:15:05 -0800[diff] [blame]973 if (!show_singles && (cu->reg_location != NULL) && cu->reg_location[i].wide) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]974 // For the listing, skip the high sreg.
975 i++;
976 }
977 if (i != (uses -1)) {
978 str.append(",");
979 }
980 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]981 switch (dalvik_format) {
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]982 case Instruction::k11n: // Add one immediate from vB
983 case Instruction::k21s:
984 case Instruction::k31i:
985 case Instruction::k21h:
986 str.append(StringPrintf(", #%d", insn.vB));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]987 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]988 case Instruction::k51l: // Add one wide immediate
989 str.append(StringPrintf(", #%lld", insn.vB_wide));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]990 break;
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]991 case Instruction::k21c: // One register, one string/type/method index
992 case Instruction::k31c:
993 str.append(StringPrintf(", index #%d", insn.vB));
994 break;
995 case Instruction::k22c: // Two registers, one string/type/method index
996 str.append(StringPrintf(", index #%d", insn.vC));
997 break;
998 case Instruction::k22s: // Add one immediate from vC
999 case Instruction::k22b:
1000 str.append(StringPrintf(", #%d", insn.vC));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1001 break;
1002 default:
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1003 ; // Nothing left to print
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1004 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1005 }
buzbeea169e1d2012-12-05 14:26:44 -0800[diff] [blame]1006 if (nop) {
1007 str.append("]--optimized away");
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1008 }
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1009 int length = str.length() + 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1010 ret = static_cast<char*>(NewMem(cu, length, false, kAllocDFInfo));
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1011 strncpy(ret, str.c_str(), length);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1012 return ret;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1013}
1014
1015/* Any register that is used before being defined is considered live-in */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1016static void HandleLiveInUse(CompilationUnit* cu, ArenaBitVector* use_v, ArenaBitVector* def_v,
1017 ArenaBitVector* live_in_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1018{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1019 SetBit(cu, use_v, dalvik_reg_id);
1020 if (!IsBitSet(def_v, dalvik_reg_id)) {
1021 SetBit(cu, live_in_v, dalvik_reg_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1022 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1023}
1024
1025/* Mark a reg as being defined */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1026static void HandleDef(CompilationUnit* cu, ArenaBitVector* def_v, int dalvik_reg_id)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1027{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1028 SetBit(cu, def_v, dalvik_reg_id);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1029}
1030
1031/*
1032 * Find out live-in variables for natural loops. Variables that are live-in in
1033 * the main loop body are considered to be defined in the entry block.
1034 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1035bool FindLocalLiveIn(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1036{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1037 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1038 ArenaBitVector *use_v, *def_v, *live_in_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1039
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1040 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1041
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1042 use_v = bb->data_flow_info->use_v =
1043 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapUse);
1044 def_v = bb->data_flow_info->def_v =
1045 AllocBitVector(cu, cu->num_dalvik_registers, false, kBitMapDef);
1046 live_in_v = bb->data_flow_info->live_in_v =
1047 AllocBitVector(cu, cu->num_dalvik_registers, false,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1048 kBitMapLiveIn);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1049
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1050 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1051 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1052 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1053
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1054 if (df_attributes & DF_HAS_USES) {
1055 if (df_attributes & DF_UA) {
1056 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA);
1057 if (df_attributes & DF_A_WIDE) {
1058 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vA+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1059 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1060 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1061 if (df_attributes & DF_UB) {
1062 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB);
1063 if (df_attributes & DF_B_WIDE) {
1064 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vB+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1065 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1066 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1067 if (df_attributes & DF_UC) {
1068 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC);
1069 if (df_attributes & DF_C_WIDE) {
1070 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+1);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1071 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1072 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1073 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1074 if (df_attributes & DF_FORMAT_35C) {
1075 for (unsigned int i = 0; i < d_insn->vA; i++) {
1076 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->arg[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1077 }
1078 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1079 if (df_attributes & DF_FORMAT_3RC) {
1080 for (unsigned int i = 0; i < d_insn->vA; i++) {
1081 HandleLiveInUse(cu, use_v, def_v, live_in_v, d_insn->vC+i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1082 }
1083 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1084 if (df_attributes & DF_HAS_DEFS) {
1085 HandleDef(cu, def_v, d_insn->vA);
1086 if (df_attributes & DF_A_WIDE) {
1087 HandleDef(cu, def_v, d_insn->vA+1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1088 }
1089 }
1090 }
1091 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1092}
1093
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1094static int AddNewSReg(CompilationUnit* cu, int v_reg)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1095{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1096 // Compiler temps always have a subscript of 0
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1097 int subscript = (v_reg < 0) ? 0 : ++cu->ssa_last_defs[v_reg];
1098 int ssa_reg = cu->num_ssa_regs++;
1099 InsertGrowableList(cu, cu->ssa_base_vregs, v_reg);
1100 InsertGrowableList(cu, cu->ssa_subscripts, subscript);
1101 std::string ssa_name = GetSSAName(cu, ssa_reg);
1102 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, false, kAllocDFInfo));
1103 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1104 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
1105 DCHECK_EQ(cu->ssa_base_vregs->num_used, cu->ssa_subscripts->num_used);
1106 return ssa_reg;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1107}
1108
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1109/* Find out the latest SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1110static void HandleSSAUse(CompilationUnit* cu, int* uses, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1111{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1112 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1113 uses[reg_index] = cu->vreg_to_ssa_map[dalvik_reg];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1114}
1115
1116/* Setup a new SSA register for a given Dalvik register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1117static void HandleSSADef(CompilationUnit* cu, int* defs, int dalvik_reg, int reg_index)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1118{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1119 DCHECK((dalvik_reg >= 0) && (dalvik_reg < cu->num_dalvik_registers));
1120 int ssa_reg = AddNewSReg(cu, dalvik_reg);
1121 cu->vreg_to_ssa_map[dalvik_reg] = ssa_reg;
1122 defs[reg_index] = ssa_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1123}
1124
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1125/* Look up new SSA names for format_35c instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1126static void DataFlowSSAFormat35C(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1127{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1128 DecodedInstruction *d_insn = &mir->dalvikInsn;
1129 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1130 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1131
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1132 mir->ssa_rep->num_uses = num_uses;
1133 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1134 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1135 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1136 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1137
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1138 for (i = 0; i < num_uses; i++) {
1139 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->arg[i], i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1140 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1141}
1142
buzbeeec5adf32011-09-11 15:25:43 -0700[diff] [blame]1143/* Look up new SSA names for format_3rc instructions */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1144static void DataFlowSSAFormat3RC(CompilationUnit* cu, MIR* mir)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1145{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1146 DecodedInstruction *d_insn = &mir->dalvikInsn;
1147 int num_uses = d_insn->vA;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1148 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1149
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1150 mir->ssa_rep->num_uses = num_uses;
1151 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1152 // NOTE: will be filled in during type & size inference pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1153 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, true,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1154 kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1155
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1156 for (i = 0; i < num_uses; i++) {
1157 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+i, i);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1158 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1159}
1160
1161/* Entry function to convert a block into SSA representation */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1162bool DoSSAConversion(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1163{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1164 MIR* mir;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1165
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1166 if (bb->data_flow_info == NULL) return false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1167
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1168 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1169 mir->ssa_rep = static_cast<struct SSARepresentation *>(NewMem(cu, sizeof(SSARepresentation),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1170 true, kAllocDFInfo));
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1171
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1172 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1173
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1174 // If not a pseudo-op, note non-leaf or can throw
1175 if (static_cast<int>(mir->dalvikInsn.opcode) <
1176 static_cast<int>(kNumPackedOpcodes)) {
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]1177 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1178
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1179 if (flags & Instruction::kThrow) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1180 cu->attrs &= ~METHOD_IS_THROW_FREE;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1181 }
buzbeecefd1872011-09-09 09:59:52 -0700[diff] [blame]1182
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1183 if (flags & Instruction::kInvoke) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1184 cu->attrs &= ~METHOD_IS_LEAF;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1185 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1186 }
1187
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1188 int num_uses = 0;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1189
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1190 if (df_attributes & DF_FORMAT_35C) {
1191 DataFlowSSAFormat35C(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1192 continue;
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]1193 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1194
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1195 if (df_attributes & DF_FORMAT_3RC) {
1196 DataFlowSSAFormat3RC(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1197 continue;
1198 }
1199
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1200 if (df_attributes & DF_HAS_USES) {
1201 if (df_attributes & DF_UA) {
1202 num_uses++;
1203 if (df_attributes & DF_A_WIDE) {
1204 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1205 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1206 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1207 if (df_attributes & DF_UB) {
1208 num_uses++;
1209 if (df_attributes & DF_B_WIDE) {
1210 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1211 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1212 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1213 if (df_attributes & DF_UC) {
1214 num_uses++;
1215 if (df_attributes & DF_C_WIDE) {
1216 num_uses ++;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1217 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1218 }
1219 }
1220
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1221 if (num_uses) {
1222 mir->ssa_rep->num_uses = num_uses;
1223 mir->ssa_rep->uses = static_cast<int*>(NewMem(cu, sizeof(int) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1224 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1225 mir->ssa_rep->fp_use = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_uses, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1226 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1227 }
1228
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1229 int num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1230
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1231 if (df_attributes & DF_HAS_DEFS) {
1232 num_defs++;
1233 if (df_attributes & DF_A_WIDE) {
1234 num_defs++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1235 }
1236 }
1237
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1238 if (num_defs) {
1239 mir->ssa_rep->num_defs = num_defs;
1240 mir->ssa_rep->defs = static_cast<int*>(NewMem(cu, sizeof(int) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1241 kAllocDFInfo));
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1242 mir->ssa_rep->fp_def = static_cast<bool*>(NewMem(cu, sizeof(bool) * num_defs, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1243 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1244 }
1245
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1246 DecodedInstruction *d_insn = &mir->dalvikInsn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1247
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1248 if (df_attributes & DF_HAS_USES) {
1249 num_uses = 0;
1250 if (df_attributes & DF_UA) {
1251 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1252 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA, num_uses++);
1253 if (df_attributes & DF_A_WIDE) {
1254 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_A;
1255 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1256 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1257 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1258 if (df_attributes & DF_UB) {
1259 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1260 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB, num_uses++);
1261 if (df_attributes & DF_B_WIDE) {
1262 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_B;
1263 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vB+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1264 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1265 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1266 if (df_attributes & DF_UC) {
1267 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1268 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC, num_uses++);
1269 if (df_attributes & DF_C_WIDE) {
1270 mir->ssa_rep->fp_use[num_uses] = df_attributes & DF_FP_C;
1271 HandleSSAUse(cu, mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1272 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1273 }
1274 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1275 if (df_attributes & DF_HAS_DEFS) {
1276 mir->ssa_rep->fp_def[0] = df_attributes & DF_FP_A;
1277 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA, 0);
1278 if (df_attributes & DF_A_WIDE) {
1279 mir->ssa_rep->fp_def[1] = df_attributes & DF_FP_A;
1280 HandleSSADef(cu, mir->ssa_rep->defs, d_insn->vA+1, 1);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1281 }
1282 }
1283 }
1284
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1285 if (!cu->disable_dataflow) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1286 /*
1287 * Take a snapshot of Dalvik->SSA mapping at the end of each block. The
1288 * input to PHI nodes can be derived from the snapshot of all
1289 * predecessor blocks.
1290 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1291 bb->data_flow_info->vreg_to_ssa_map =
1292 static_cast<int*>(NewMem(cu, sizeof(int) * cu->num_dalvik_registers, false,
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1293 kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1294
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1295 memcpy(bb->data_flow_info->vreg_to_ssa_map, cu->vreg_to_ssa_map,
1296 sizeof(int) * cu->num_dalvik_registers);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1297 }
1298 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1299}
1300
1301/* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1302static void SetConstant(CompilationUnit* cu, int ssa_reg, int value)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1303{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1304 SetBit(cu, cu->is_constant_v, ssa_reg);
1305 cu->constant_values[ssa_reg] = value;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1306}
1307
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1308bool DoConstantPropogation(CompilationUnit* cu, BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1309{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1310 MIR* mir;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1311 ArenaBitVector *is_constant_v = cu->is_constant_v;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1312
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1313 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1314 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1315
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1316 DecodedInstruction *d_insn = &mir->dalvikInsn;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1317
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1318 if (!(df_attributes & DF_HAS_DEFS)) continue;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1319
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1320 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1321 if (df_attributes & DF_SETS_CONST) {
1322 if (df_attributes & DF_DA) {
1323 switch (d_insn->opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1324 case Instruction::CONST_4:
1325 case Instruction::CONST_16:
1326 case Instruction::CONST:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1327 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1328 break;
1329 case Instruction::CONST_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1330 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB << 16);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1331 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1332 case Instruction::CONST_WIDE_16:
1333 case Instruction::CONST_WIDE_32:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1334 SetConstant(cu, mir->ssa_rep->defs[0], d_insn->vB);
1335 SetConstant(cu, mir->ssa_rep->defs[1], 0);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1336 break;
1337 case Instruction::CONST_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1338 SetConstant(cu, mir->ssa_rep->defs[0], static_cast<int>(d_insn->vB_wide));
1339 SetConstant(cu, mir->ssa_rep->defs[1], static_cast<int>(d_insn->vB_wide >> 32));
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1340 break;
1341 case Instruction::CONST_WIDE_HIGH16:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1342 SetConstant(cu, mir->ssa_rep->defs[0], 0);
1343 SetConstant(cu, mir->ssa_rep->defs[1], d_insn->vB << 16);
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1344 break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1345 default:
1346 break;
buzbeebff24652012-05-06 16:22:05 -0700[diff] [blame]1347 }
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1348 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1349 /* Handle instructions that set up constants directly */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1350 } else if (df_attributes & DF_IS_MOVE) {
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1351 int i;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1352
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1353 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
1354 if (!IsBitSet(is_constant_v, mir->ssa_rep->uses[i])) break;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1355 }
1356 /* Move a register holding a constant to another register */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1357 if (i == mir->ssa_rep->num_uses) {
1358 SetConstant(cu, mir->ssa_rep->defs[0],
1359 cu->constant_values[mir->ssa_rep->uses[0]]);
1360 if (df_attributes & DF_A_WIDE) {
1361 SetConstant(cu, mir->ssa_rep->defs[1],
1362 cu->constant_values[mir->ssa_rep->uses[1]]);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1363 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1364 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1365 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1366 }
1367 /* TODO: implement code to handle arithmetic operations */
1368 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1369}
1370
1371/* Setup the basic data structures for SSA conversion */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1372void CompilerInitializeSSAConversion(CompilationUnit* cu)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1373{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1374 int i;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1375 int num_dalvik_reg = cu->num_dalvik_registers;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1376
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1377 cu->ssa_base_vregs =
1378 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1379 cu->ssa_subscripts =
1380 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
1381 cu->ssa_strings =
1382 static_cast<GrowableList*>(NewMem(cu, sizeof(GrowableList), false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1383 // Create the ssa mappings, estimating the max size
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1384 CompilerInitGrowableList(cu, cu->ssa_base_vregs,
1385 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1386 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1387 CompilerInitGrowableList(cu, cu->ssa_subscripts,
1388 num_dalvik_reg + cu->def_count + 128,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1389 kListSSAtoDalvikMap);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1390 CompilerInitGrowableList(cu, cu->ssa_strings,
1391 num_dalvik_reg + cu->def_count + 128,
buzbee2cfc6392012-05-07 14:51:40 -0700[diff] [blame]1392 kListSSAtoDalvikMap);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1393 /*
1394 * Initial number of SSA registers is equal to the number of Dalvik
1395 * registers.
1396 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1397 cu->num_ssa_regs = num_dalvik_reg;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1398
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1399 /*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1400 * Initialize the SSA2Dalvik map list. For the first num_dalvik_reg elements,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1401 * the subscript is 0 so we use the ENCODE_REG_SUB macro to encode the value
1402 * into "(0 << 16) | i"
1403 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1404 for (i = 0; i < num_dalvik_reg; i++) {
1405 InsertGrowableList(cu, cu->ssa_base_vregs, i);
1406 InsertGrowableList(cu, cu->ssa_subscripts, 0);
1407 std::string ssa_name = GetSSAName(cu, i);
1408 char* name = static_cast<char*>(NewMem(cu, ssa_name.length() + 1, true, kAllocDFInfo));
1409 strncpy(name, ssa_name.c_str(), ssa_name.length() + 1);
1410 InsertGrowableList(cu, cu->ssa_strings, reinterpret_cast<uintptr_t>(name));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1411 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1412
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1413 /*
1414 * Initialize the DalvikToSSAMap map. There is one entry for each
1415 * Dalvik register, and the SSA names for those are the same.
1416 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1417 cu->vreg_to_ssa_map =
1418 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1419 /* Keep track of the higest def for each dalvik reg */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1420 cu->ssa_last_defs =
1421 static_cast<int*>(NewMem(cu, sizeof(int) * num_dalvik_reg, false, kAllocDFInfo));
buzbeef0cde542011-09-13 14:55:02 -0700[diff] [blame]1422
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1423 for (i = 0; i < num_dalvik_reg; i++) {
1424 cu->vreg_to_ssa_map[i] = i;
1425 cu->ssa_last_defs[i] = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1426 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1427
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1428 /* Add ssa reg for Method* */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1429 cu->method_sreg = AddNewSReg(cu, SSA_METHOD_BASEREG);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1430
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1431 /*
1432 * Allocate the BasicBlockDataFlow structure for the entry and code blocks
1433 */
1434 GrowableListIterator iterator;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1435
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1436 GrowableListIteratorInit(&cu->block_list, &iterator);
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1437
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1438 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1439 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1440 if (bb == NULL) break;
1441 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1442 if (bb->block_type == kDalvikByteCode ||
1443 bb->block_type == kEntryBlock ||
1444 bb->block_type == kExitBlock) {
1445 bb->data_flow_info = static_cast<BasicBlockDataFlow*>(NewMem(cu, sizeof(BasicBlockDataFlow),
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1446 true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1447 }
1448 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1449}
1450
1451/* Clear the visited flag for each BB */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1452bool ClearVisitedFlag(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1453{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1454 bb->visited = false;
1455 return true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1456}
1457
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1458void DataFlowAnalysisDispatcher(CompilationUnit* cu,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1459 bool (*func)(CompilationUnit*, BasicBlock*),
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1460 DataFlowAnalysisMode dfa_mode,
1461 bool is_iterative)
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1462{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1463 bool change = true;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1464
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1465 while (change) {
1466 change = false;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1467
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1468 switch (dfa_mode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1469 /* Scan all blocks and perform the operations specified in func */
1470 case kAllNodes:
1471 {
1472 GrowableListIterator iterator;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1473 GrowableListIteratorInit(&cu->block_list, &iterator);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1474 while (true) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1475 BasicBlock* bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iterator));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1476 if (bb == NULL) break;
1477 if (bb->hidden == true) continue;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1478 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1479 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1480 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1481 break;
1482 /* Scan reachable blocks and perform the ops specified in func. */
1483 case kReachableNodes:
1484 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1485 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1486 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1487 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1488
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1489 for (idx = 0; idx < num_reachable_blocks; idx++) {
1490 int block_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1491 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1492 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, block_idx));
1493 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1494 }
1495 }
1496 break;
1497
1498 /* Scan reachable blocks by pre-order dfs and invoke func on each. */
1499 case kPreOrderDFSTraversal:
1500 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1501 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1502 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1503 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1504
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1505 for (idx = 0; idx < num_reachable_blocks; idx++) {
1506 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1507 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1508 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, dfs_idx));
1509 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1510 }
1511 }
1512 break;
1513 /* Scan reachable blocks post-order dfs and invoke func on each. */
1514 case kPostOrderDFSTraversal:
1515 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1516 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1517 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1518 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1519
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1520 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1521 int dfs_idx = cu->dfs_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1522 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1523 reinterpret_cast<BasicBlock *>( GrowableListGetElement(block_list, dfs_idx));
1524 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1525 }
1526 }
1527 break;
1528 /* Scan reachable post-order dom tree and invoke func on each. */
1529 case kPostOrderDOMTraversal:
1530 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1531 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1532 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1533 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1534
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1535 for (idx = 0; idx < num_reachable_blocks; idx++) {
1536 int dom_idx = cu->dom_post_order_traversal.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1537 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1538 reinterpret_cast<BasicBlock*>( GrowableListGetElement(block_list, dom_idx));
1539 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1540 }
1541 }
1542 break;
1543 /* Scan reachable blocks reverse post-order dfs, invoke func on each */
1544 case kReversePostOrderTraversal:
1545 {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1546 int num_reachable_blocks = cu->num_reachable_blocks;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1547 int idx;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1548 const GrowableList *block_list = &cu->block_list;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1549
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1550 for (idx = num_reachable_blocks - 1; idx >= 0; idx--) {
1551 int rev_idx = cu->dfs_post_order.elem_list[idx];
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1552 BasicBlock* bb =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1553 reinterpret_cast<BasicBlock*>(GrowableListGetElement(block_list, rev_idx));
1554 change |= (*func)(cu, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1555 }
1556 }
1557 break;
1558 default:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1559 LOG(FATAL) << "Unknown traversal mode: " << dfa_mode;
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1560 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1561 /* If is_iterative is false, exit the loop after the first iteration */
1562 change &= is_iterative;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1563 }
buzbee67bf8852011-08-17 17:51:35 -0700[diff] [blame]1564}
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1565
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1566/* Advance to next strictly dominated MIR node in an extended basic block */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1567static MIR* AdvanceMIR(CompilationUnit* cu, BasicBlock** p_bb, MIR* mir,
1568 ArenaBitVector* bv, bool clear_mark) {
1569 BasicBlock* bb = *p_bb;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1570 if (mir != NULL) {
1571 mir = mir->next;
1572 if (mir == NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1573 bb = bb->fall_through;
1574 if ((bb == NULL) || bb->predecessors->num_used != 1) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1575 mir = NULL;
1576 } else {
1577 if (bv) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1578 SetBit(cu, bv, bb->id);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1579 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1580 *p_bb = bb;
1581 mir = bb->first_mir_insn;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1582 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1583 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1584 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1585 if (mir && clear_mark) {
1586 mir->optimization_flags &= ~MIR_MARK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1587 }
1588 return mir;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1589}
1590
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1591/*
1592 * To be used at an invoke mir. If the logically next mir node represents
1593 * a move-result, return it. Else, return NULL. If a move-result exists,
1594 * it is required to immediately follow the invoke with no intervening
1595 * opcodes or incoming arcs. However, if the result of the invoke is not
1596 * used, a move-result may not be present.
1597 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1598MIR* FindMoveResult(CompilationUnit* cu, BasicBlock* bb, MIR* mir)
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1599{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1600 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1601 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1602 while (mir != NULL) {
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1603 int opcode = mir->dalvikInsn.opcode;
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1604 if ((mir->dalvikInsn.opcode == Instruction::MOVE_RESULT) ||
buzbee52ed7762012-06-13 23:43:14 -0700[diff] [blame]1605 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) ||
buzbee15bf9802012-06-12 17:49:27 -0700[diff] [blame]1606 (mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_WIDE)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1607 break;
1608 }
1609 // Keep going if pseudo op, otherwise terminate
Bill Buzbeec9f40dd2012-08-15 11:35:25 -0700[diff] [blame]1610 if (opcode < kNumPackedOpcodes) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1611 mir = NULL;
1612 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1613 mir = AdvanceMIR(cu, &tbb, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1614 }
1615 }
1616 return mir;
buzbeefc9e6fa2012-03-23 15:14:29 -0700[diff] [blame]1617}
1618
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1619static void SquashDupRangeChecks(CompilationUnit* cu, BasicBlock** p_bp, MIR* mir,
1620 int array_sreg, int index_sreg)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1621{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1622 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1623 mir = AdvanceMIR(cu, p_bp, mir, NULL, false);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1624 if (!mir) {
1625 break;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1626 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1627 if ((mir->ssa_rep == NULL) ||
1628 (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1629 continue;
1630 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1631 int check_array = INVALID_SREG;
1632 int check_index = INVALID_SREG;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1633 switch (mir->dalvikInsn.opcode) {
1634 case Instruction::AGET:
1635 case Instruction::AGET_OBJECT:
1636 case Instruction::AGET_BOOLEAN:
1637 case Instruction::AGET_BYTE:
1638 case Instruction::AGET_CHAR:
1639 case Instruction::AGET_SHORT:
1640 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1641 check_array = mir->ssa_rep->uses[0];
1642 check_index = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1643 break;
1644 case Instruction::APUT:
1645 case Instruction::APUT_OBJECT:
1646 case Instruction::APUT_SHORT:
1647 case Instruction::APUT_CHAR:
1648 case Instruction::APUT_BYTE:
1649 case Instruction::APUT_BOOLEAN:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1650 check_array = mir->ssa_rep->uses[1];
1651 check_index = mir->ssa_rep->uses[2];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1652 break;
1653 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1654 check_array = mir->ssa_rep->uses[2];
1655 check_index = mir->ssa_rep->uses[3];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1656 default:
1657 break;
1658 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1659 if (check_array == INVALID_SREG) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1660 continue;
1661 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1662 if ((array_sreg == check_array) && (index_sreg == check_index)) {
1663 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1664 LOG(INFO) << "Squashing range check @ 0x" << std::hex << mir->offset;
1665 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1666 mir->optimization_flags |= MIR_IGNORE_RANGE_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1667 }
1668 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]1669}
1670
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1671/* Do some MIR-level basic block optimizations */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1672static bool BasicBlockOpt(CompilationUnit* cu, BasicBlock* bb)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1673{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1674 int num_temps = 0;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1675
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1676 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1677 // Look for interesting opcodes, skip otherwise
1678 Instruction::Code opcode = mir->dalvikInsn.opcode;
1679 switch (opcode) {
1680 case Instruction::AGET:
1681 case Instruction::AGET_OBJECT:
1682 case Instruction::AGET_BOOLEAN:
1683 case Instruction::AGET_BYTE:
1684 case Instruction::AGET_CHAR:
1685 case Instruction::AGET_SHORT:
1686 case Instruction::AGET_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1687 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
1688 int arr_sreg = mir->ssa_rep->uses[0];
1689 int idx_sreg = mir->ssa_rep->uses[1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1690 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1691 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1692 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1693 break;
1694 case Instruction::APUT:
1695 case Instruction::APUT_OBJECT:
1696 case Instruction::APUT_SHORT:
1697 case Instruction::APUT_CHAR:
1698 case Instruction::APUT_BYTE:
1699 case Instruction::APUT_BOOLEAN:
1700 case Instruction::APUT_WIDE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1701 if (!(mir->optimization_flags & MIR_IGNORE_RANGE_CHECK)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1702 int start = (opcode == Instruction::APUT_WIDE) ? 2 : 1;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1703 int arr_sreg = mir->ssa_rep->uses[start];
1704 int idx_sreg = mir->ssa_rep->uses[start + 1];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1705 BasicBlock* tbb = bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1706 SquashDupRangeChecks(cu, &tbb, mir, arr_sreg, idx_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1707 }
1708 break;
1709 case Instruction::CMPL_FLOAT:
1710 case Instruction::CMPL_DOUBLE:
1711 case Instruction::CMPG_FLOAT:
1712 case Instruction::CMPG_DOUBLE:
1713 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1714 if (cu->gen_bitcode) {
buzbeeca7a5e42012-08-20 11:12:18 -0700[diff] [blame]1715 // Bitcode doesn't allow this optimization.
1716 break;
1717 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1718 if (mir->next != NULL) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1719 MIR* mir_next = mir->next;
1720 Instruction::Code br_opcode = mir_next->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1721 ConditionCode ccode = kCondNv;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1722 switch(br_opcode) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1723 case Instruction::IF_EQZ:
1724 ccode = kCondEq;
1725 break;
1726 case Instruction::IF_NEZ:
1727 ccode = kCondNe;
1728 break;
1729 case Instruction::IF_LTZ:
1730 ccode = kCondLt;
1731 break;
1732 case Instruction::IF_GEZ:
1733 ccode = kCondGe;
1734 break;
1735 case Instruction::IF_GTZ:
1736 ccode = kCondGt;
1737 break;
1738 case Instruction::IF_LEZ:
1739 ccode = kCondLe;
1740 break;
1741 default:
1742 break;
1743 }
1744 // Make sure result of cmp is used by next insn and nowhere else
1745 if ((ccode != kCondNv) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1746 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
1747 (GetSSAUseCount(cu, mir->ssa_rep->defs[0]) == 1)) {
1748 mir_next->dalvikInsn.arg[0] = ccode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1749 switch(opcode) {
1750 case Instruction::CMPL_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1751 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1752 static_cast<Instruction::Code>(kMirOpFusedCmplFloat);
1753 break;
1754 case Instruction::CMPL_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1755 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1756 static_cast<Instruction::Code>(kMirOpFusedCmplDouble);
1757 break;
1758 case Instruction::CMPG_FLOAT:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1759 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1760 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat);
1761 break;
1762 case Instruction::CMPG_DOUBLE:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1763 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1764 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble);
1765 break;
1766 case Instruction::CMP_LONG:
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1767 mir_next->dalvikInsn.opcode =
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1768 static_cast<Instruction::Code>(kMirOpFusedCmpLong);
1769 break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1770 default: LOG(ERROR) << "Unexpected opcode: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1771 }
1772 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1773 mir_next->ssa_rep->num_uses = mir->ssa_rep->num_uses;
1774 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
1775 mir_next->ssa_rep->fp_use = mir->ssa_rep->fp_use;
1776 mir_next->ssa_rep->num_defs = 0;
1777 mir->ssa_rep->num_uses = 0;
1778 mir->ssa_rep->num_defs = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1779 }
1780 }
1781 break;
1782 default:
1783 break;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1784 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1785 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1786
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1787 if (num_temps > cu->num_compiler_temps) {
1788 cu->num_compiler_temps = num_temps;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1789 }
1790 return true;
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]1791}
1792
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1793static bool NullCheckEliminationInit(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1794{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1795 if (bb->data_flow_info == NULL) return false;
1796 bb->data_flow_info->ending_null_check_v =
1797 AllocBitVector(cu, cu->num_ssa_regs, false, kBitMapNullCheck);
1798 ClearAllBits(bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1799 return true;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1800}
1801
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1802/* Collect stats on number of checks removed */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1803static bool CountChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1804{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1805 if (bb->data_flow_info == NULL) return false;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1806 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1807 if (mir->ssa_rep == NULL) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1808 continue;
1809 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1810 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
1811 if (df_attributes & DF_HAS_NULL_CHKS) {
1812 cu->checkstats->null_checks++;
1813 if (mir->optimization_flags & MIR_IGNORE_NULL_CHECK) {
1814 cu->checkstats->null_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1815 }
1816 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1817 if (df_attributes & DF_HAS_RANGE_CHKS) {
1818 cu->checkstats->range_checks++;
1819 if (mir->optimization_flags & MIR_IGNORE_RANGE_CHECK) {
1820 cu->checkstats->range_checks_eliminated++;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1821 }
1822 }
1823 }
1824 return false;
1825}
1826
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1827/* Try to make common case the fallthrough path */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1828static bool LayoutBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1829{
1830 // TODO: For now, just looking for direct throws. Consider generalizing for profile feedback
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1831 if (!bb->explicit_throw) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1832 return false;
1833 }
1834 BasicBlock* walker = bb;
1835 while (true) {
1836 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1837 if ((walker->block_type == kEntryBlock) || (walker->predecessors->num_used != 1)) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1838 break;
1839 }
1840 BasicBlock* prev = GET_ELEM_N(walker->predecessors, BasicBlock*, 0);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1841 if (prev->conditional_branch) {
1842 if (prev->fall_through == walker) {
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1843 // Already done - return
1844 break;
1845 }
1846 DCHECK_EQ(walker, prev->taken);
1847 // Got one. Flip it and exit
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1848 Instruction::Code opcode = prev->last_mir_insn->dalvikInsn.opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1849 switch (opcode) {
1850 case Instruction::IF_EQ: opcode = Instruction::IF_NE; break;
1851 case Instruction::IF_NE: opcode = Instruction::IF_EQ; break;
1852 case Instruction::IF_LT: opcode = Instruction::IF_GE; break;
1853 case Instruction::IF_GE: opcode = Instruction::IF_LT; break;
1854 case Instruction::IF_GT: opcode = Instruction::IF_LE; break;
1855 case Instruction::IF_LE: opcode = Instruction::IF_GT; break;
1856 case Instruction::IF_EQZ: opcode = Instruction::IF_NEZ; break;
1857 case Instruction::IF_NEZ: opcode = Instruction::IF_EQZ; break;
1858 case Instruction::IF_LTZ: opcode = Instruction::IF_GEZ; break;
1859 case Instruction::IF_GEZ: opcode = Instruction::IF_LTZ; break;
1860 case Instruction::IF_GTZ: opcode = Instruction::IF_LEZ; break;
1861 case Instruction::IF_LEZ: opcode = Instruction::IF_GTZ; break;
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]1862 default: LOG(FATAL) << "Unexpected opcode " << opcode;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1863 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1864 prev->last_mir_insn->dalvikInsn.opcode = opcode;
1865 BasicBlock* t_bb = prev->taken;
1866 prev->taken = prev->fall_through;
1867 prev->fall_through = t_bb;
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1868 break;
1869 }
1870 walker = prev;
1871 }
1872 return false;
1873}
1874
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1875/* Combine any basic blocks terminated by instructions that we now know can't throw */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1876static bool CombineBlocks(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1877{
1878 // Loop here to allow combining a sequence of blocks
1879 while (true) {
1880 // Check termination conditions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1881 if ((bb->first_mir_insn == NULL)
1882 || (bb->data_flow_info == NULL)
1883 || (bb->block_type == kExceptionHandling)
1884 || (bb->block_type == kExitBlock)
1885 || (bb->block_type == kDead)
1886 || ((bb->taken == NULL) || (bb->taken->block_type != kExceptionHandling))
1887 || (bb->successor_block_list.block_list_type != kNotUsed)
1888 || (static_cast<int>(bb->last_mir_insn->dalvikInsn.opcode) != kMirOpCheck)) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1889 break;
1890 }
1891
1892 // Test the kMirOpCheck instruction
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1893 MIR* mir = bb->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1894 // Grab the attributes from the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1895 MIR* throw_insn = mir->meta.throw_insn;
1896 int df_attributes = oat_data_flow_attributes[throw_insn->dalvikInsn.opcode];
1897 bool can_combine = true;
1898 if (df_attributes & DF_HAS_NULL_CHKS) {
1899 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_NULL_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1900 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1901 if (df_attributes & DF_HAS_RANGE_CHKS) {
1902 can_combine &= ((throw_insn->optimization_flags & MIR_IGNORE_RANGE_CHECK) != 0);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]1903 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1904 if (!can_combine) {
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1905 break;
1906 }
1907 // OK - got one. Combine
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1908 BasicBlock* bb_next = bb->fall_through;
1909 DCHECK(!bb_next->catch_entry);
1910 DCHECK_EQ(bb_next->predecessors->num_used, 1U);
1911 MIR* t_mir = bb->last_mir_insn->prev;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1912 // Overwrite the kOpCheck insn with the paired opcode
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1913 DCHECK_EQ(bb_next->first_mir_insn, throw_insn);
1914 *bb->last_mir_insn = *throw_insn;
1915 bb->last_mir_insn->prev = t_mir;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1916 // Use the successor info from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1917 bb->successor_block_list = bb_next->successor_block_list;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1918 // Use the ending block linkage from the next block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1919 bb->fall_through = bb_next->fall_through;
1920 bb->taken->block_type = kDead; // Kill the unused exception block
1921 bb->taken = bb_next->taken;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1922 // Include the rest of the instructions
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1923 bb->last_mir_insn = bb_next->last_mir_insn;
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1924
1925 /*
1926 * NOTE: we aren't updating all dataflow info here. Should either make sure this pass
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1927 * happens after uses of i_dominated, dom_frontier or update the dataflow info here.
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1928 */
1929
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1930 // Kill bb_next and remap now-dead id to parent
1931 bb_next->block_type = kDead;
1932 cu->block_id_map.Overwrite(bb_next->id, bb->id);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]1933
1934 // Now, loop back and see if we can keep going
1935 }
1936 return false;
1937}
1938
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1939/* Eliminate unnecessary null checks for a basic block. */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1940static bool EliminateNullChecks( struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]1941{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1942 if (bb->data_flow_info == NULL) return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1943
1944 /*
1945 * Set initial state. Be conservative with catch
1946 * blocks and start with no assumptions about null check
1947 * status (except for "this").
1948 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1949 if ((bb->block_type == kEntryBlock) | bb->catch_entry) {
1950 ClearAllBits(cu->temp_ssa_register_v);
1951 if ((cu->access_flags & kAccStatic) == 0) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1952 // If non-static method, mark "this" as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1953 int this_reg = cu->num_dalvik_registers - cu->num_ins;
1954 SetBit(cu, cu->temp_ssa_register_v, this_reg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1955 }
1956 } else {
1957 // Starting state is intesection of all incoming arcs
1958 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]1959 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1960 BasicBlock* pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1961 DCHECK(pred_bb != NULL);
1962 CopyBitVector(cu->temp_ssa_register_v,
1963 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1964 while (true) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1965 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter));
1966 if (!pred_bb) break;
1967 if ((pred_bb->data_flow_info == NULL) ||
1968 (pred_bb->data_flow_info->ending_null_check_v == NULL)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1969 continue;
1970 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1971 IntersectBitVectors(cu->temp_ssa_register_v,
1972 cu->temp_ssa_register_v,
1973 pred_bb->data_flow_info->ending_null_check_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1974 }
1975 }
1976
1977 // Walk through the instruction in the block, updating as necessary
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]1978 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1979 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1980 continue;
1981 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1982 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1983
1984 // Mark target of NEW* as non-null
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1985 if (df_attributes & DF_NON_NULL_DST) {
1986 SetBit(cu, cu->temp_ssa_register_v, mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1987 }
1988
1989 // Mark non-null returns from invoke-style NEW*
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1990 if (df_attributes & DF_NON_NULL_RET) {
1991 MIR* next_mir = mir->next;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1992 // Next should be an MOVE_RESULT_OBJECT
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1993 if (next_mir &&
1994 next_mir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1995 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1996 SetBit(cu, cu->temp_ssa_register_v, next_mir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]1997 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]1998 if (next_mir) {
1999 LOG(WARNING) << "Unexpected opcode following new: " << next_mir->dalvikInsn.opcode;
2000 } else if (bb->fall_through) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2001 // Look in next basic block
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2002 struct BasicBlock* next_bb = bb->fall_through;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2003 for (MIR* tmir = next_bb->first_mir_insn; tmir != NULL;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2004 tmir =tmir->next) {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2005 if (static_cast<int>(tmir->dalvikInsn.opcode) >= static_cast<int>(kMirOpFirst)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2006 continue;
2007 }
2008 // First non-pseudo should be MOVE_RESULT_OBJECT
2009 if (tmir->dalvikInsn.opcode == Instruction::MOVE_RESULT_OBJECT) {
2010 // Mark as null checked
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2011 SetBit(cu, cu->temp_ssa_register_v, tmir->ssa_rep->defs[0]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2012 } else {
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2013 LOG(WARNING) << "Unexpected op after new: " << tmir->dalvikInsn.opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2014 }
2015 break;
2016 }
2017 }
2018 }
2019 }
buzbee5abfa3e2012-01-31 17:01:43 -0800[diff] [blame]2020
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2021 /*
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2022 * Propagate nullcheck state on register copies (including
2023 * Phi pseudo copies. For the latter, nullcheck state is
2024 * the "and" of all the Phi's operands.
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2025 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2026 if (df_attributes & (DF_NULL_TRANSFER_0 | DF_NULL_TRANSFER_N)) {
2027 int tgt_sreg = mir->ssa_rep->defs[0];
2028 int operands = (df_attributes & DF_NULL_TRANSFER_0) ? 1 :
2029 mir->ssa_rep->num_uses;
2030 bool null_checked = true;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2031 for (int i = 0; i < operands; i++) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2032 null_checked &= IsBitSet(cu->temp_ssa_register_v,
2033 mir->ssa_rep->uses[i]);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2034 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2035 if (null_checked) {
2036 SetBit(cu, cu->temp_ssa_register_v, tgt_sreg);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2037 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2038 }
2039
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2040 // Already nullchecked?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2041 if ((df_attributes & DF_HAS_NULL_CHKS) && !(mir->optimization_flags & MIR_IGNORE_NULL_CHECK)) {
2042 int src_idx;
2043 if (df_attributes & DF_NULL_CHK_1) {
2044 src_idx = 1;
2045 } else if (df_attributes & DF_NULL_CHK_2) {
2046 src_idx = 2;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2047 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2048 src_idx = 0;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2049 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2050 int src_sreg = mir->ssa_rep->uses[src_idx];
2051 if (IsBitSet(cu->temp_ssa_register_v, src_sreg)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2052 // Eliminate the null check
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2053 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2054 } else {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2055 // Mark s_reg as null-checked
2056 SetBit(cu, cu->temp_ssa_register_v, src_sreg);
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2057 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2058 }
2059 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2060
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2061 // Did anything change?
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2062 bool res = CompareBitVectors(bb->data_flow_info->ending_null_check_v,
2063 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2064 if (res) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2065 CopyBitVector(bb->data_flow_info->ending_null_check_v,
2066 cu->temp_ssa_register_v);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2067 }
2068 return res;
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2069}
2070
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2071void NullCheckElimination(CompilationUnit *cu)
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2072{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2073 if (!(cu->disable_opt & (1 << kNullCheckElimination))) {
2074 DCHECK(cu->temp_ssa_register_v != NULL);
2075 DataFlowAnalysisDispatcher(cu, NullCheckEliminationInit, kAllNodes,
2076 false /* is_iterative */);
2077 DataFlowAnalysisDispatcher(cu, EliminateNullChecks,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2078 kPreOrderDFSTraversal,
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2079 true /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2080 }
buzbee43a36422011-09-14 14:00:13 -0700[diff] [blame]2081}
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2082
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2083void BasicBlockCombine(CompilationUnit* cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2084{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2085 DataFlowAnalysisDispatcher(cu, CombineBlocks, kPreOrderDFSTraversal, false);
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2086}
2087
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2088void CodeLayout(CompilationUnit* cu)
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2089{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2090 DataFlowAnalysisDispatcher(cu, LayoutBlocks, kAllNodes, false);
buzbee0967a252012-09-14 10:43:54 -0700[diff] [blame]2091}
2092
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2093void DumpCheckStats(CompilationUnit *cu)
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2094{
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2095 Checkstats* stats =
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2096 static_cast<Checkstats*>(NewMem(cu, sizeof(Checkstats), true, kAllocDFInfo));
2097 cu->checkstats = stats;
2098 DataFlowAnalysisDispatcher(cu, CountChecks, kAllNodes, false /* is_iterative */);
2099 if (stats->null_checks > 0) {
2100 float eliminated = static_cast<float>(stats->null_checks_eliminated);
2101 float checks = static_cast<float>(stats->null_checks);
2102 LOG(INFO) << "Null Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2103 << stats->null_checks_eliminated << " of " << stats->null_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2104 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2105 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2106 if (stats->range_checks > 0) {
2107 float eliminated = static_cast<float>(stats->range_checks_eliminated);
2108 float checks = static_cast<float>(stats->range_checks);
2109 LOG(INFO) << "Range Checks: " << PrettyMethod(cu->method_idx, *cu->dex_file) << " "
2110 << stats->range_checks_eliminated << " of " << stats->range_checks << " -> "
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2111 << (eliminated/checks) * 100.0 << "%";
buzbeed1643e42012-09-05 14:06:51 -0700[diff] [blame]2112 }
2113}
2114
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2115void BasicBlockOptimization(CompilationUnit *cu)
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2116{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2117 if (!(cu->disable_opt & (1 << kBBOpt))) {
2118 CompilerInitGrowableList(cu, &cu->compiler_temps, 6, kListMisc);
2119 DCHECK_EQ(cu->num_compiler_temps, 0);
2120 DataFlowAnalysisDispatcher(cu, BasicBlockOpt,
2121 kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2122 }
buzbeee1965672012-03-11 18:39:19 -0700[diff] [blame]2123}
2124
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2125static void AddLoopHeader(CompilationUnit* cu, BasicBlock* header,
2126 BasicBlock* back_edge)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2127{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2128 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2129 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2130 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2131 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2132 if (loop->header == header) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2133 InsertGrowableList(cu, &loop->incoming_back_edges,
2134 reinterpret_cast<uintptr_t>(back_edge));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2135 return;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2136 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2137 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2138 LoopInfo* info = static_cast<LoopInfo*>(NewMem(cu, sizeof(LoopInfo), true, kAllocDFInfo));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2139 info->header = header;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2140 CompilerInitGrowableList(cu, &info->incoming_back_edges, 2, kListMisc);
2141 InsertGrowableList(cu, &info->incoming_back_edges, reinterpret_cast<uintptr_t>(back_edge));
2142 InsertGrowableList(cu, &cu->loop_headers, reinterpret_cast<uintptr_t>(info));
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2143}
2144
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2145static bool FindBackEdges(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2146{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2147 if ((bb->data_flow_info == NULL) || (bb->last_mir_insn == NULL)) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2148 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2149 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2150 Instruction::Code opcode = bb->last_mir_insn->dalvikInsn.opcode;
Ian Rogersa75a0132012-09-28 11:41:42 -0700[diff] [blame]2151 if (Instruction::FlagsOf(opcode) & Instruction::kBranch) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2152 if (bb->taken && (bb->taken->start_offset <= bb->start_offset)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2153 DCHECK(bb->dominators != NULL);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2154 if (IsBitSet(bb->dominators, bb->taken->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2155 if (cu->verbose) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2156 LOG(INFO) << "Loop backedge from 0x"
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2157 << std::hex << bb->last_mir_insn->offset
2158 << " to 0x" << std::hex << bb->taken->start_offset;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2159 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2160 AddLoopHeader(cu, bb->taken, bb);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2161 }
2162 }
2163 }
2164 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2165}
2166
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2167static void AddBlocksToLoop(CompilationUnit* cu, ArenaBitVector* blocks,
2168 BasicBlock* bb, int head_id)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2169{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2170 if (!IsBitSet(bb->dominators, head_id) ||
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2171 IsBitSet(blocks, bb->id)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2172 return;
2173 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2174 SetBit(cu, blocks, bb->id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2175 GrowableListIterator iter;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2176 GrowableListIteratorInit(bb->predecessors, &iter);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2177 BasicBlock* pred_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2178 for (pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); pred_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2179 pred_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2180 AddBlocksToLoop(cu, blocks, pred_bb, head_id);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2181 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2182}
2183
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2184static void DumpLoops(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2185{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2186 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2187 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2188 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2189 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2190 LOG(INFO) << "Loop head block id " << loop->header->id
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2191 << ", offset 0x" << std::hex << loop->header->start_offset
2192 << ", Depth: " << loop->header->nesting_depth;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2193 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2194 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2195 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2196 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2197 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2198 LOG(INFO) << " Backedge block id " << edge_bb->id
2199 << ", offset 0x" << std::hex << edge_bb->start_offset;
2200 ArenaBitVectorIterator b_iter;
2201 BitVectorIteratorInit(loop->blocks, &b_iter);
2202 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2203 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2204 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2205 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2206 LOG(INFO) << " (" << bb->id << ", 0x" << std::hex
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2207 << bb->start_offset << ")";
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2208 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2209 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2210 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2211}
2212
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2213void LoopDetection(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2214{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2215 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2216 return;
2217 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2218 CompilerInitGrowableList(cu, &cu->loop_headers, 6, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2219 // Find the loop headers
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2220 DataFlowAnalysisDispatcher(cu, FindBackEdges, kAllNodes, false /* is_iterative */);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2221 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2222 GrowableListIteratorInit(&cu->loop_headers, &iter);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2223 // Add blocks to each header
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2224 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2225 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2226 loop->blocks = AllocBitVector(cu, cu->num_blocks, true,
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2227 kBitMapMisc);
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2228 SetBit(cu, loop->blocks, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2229 GrowableListIterator iter;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2230 GrowableListIteratorInit(&loop->incoming_back_edges, &iter);
2231 BasicBlock* edge_bb;
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2232 for (edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter)); edge_bb != NULL;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2233 edge_bb = reinterpret_cast<BasicBlock*>(GrowableListIteratorNext(&iter))) {
2234 AddBlocksToLoop(cu, loop->blocks, edge_bb, loop->header->id);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2235 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2236 }
2237 // Compute the nesting depth of each header
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2238 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2239 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2240 loop != NULL; loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2241 GrowableListIterator iter2;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2242 GrowableListIteratorInit(&cu->loop_headers, &iter2);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2243 LoopInfo* loop2;
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2244 for (loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2));
buzbee28c9a832012-11-21 15:39:13 -0800[diff] [blame]2245 loop2 != NULL; loop2 = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter2))) {
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2246 if (IsBitSet(loop2->blocks, loop->header->id)) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2247 loop->header->nesting_depth++;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2248 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2249 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2250 }
2251 // Assign nesting depth to each block in all loops
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2252 GrowableListIteratorInit(&cu->loop_headers, &iter);
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2253 for (LoopInfo* loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter));
2254 (loop != NULL); loop = reinterpret_cast<LoopInfo*>(GrowableListIteratorNext(&iter))) {
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2255 ArenaBitVectorIterator b_iter;
2256 BitVectorIteratorInit(loop->blocks, &b_iter);
2257 for (int bb_id = BitVectorIteratorNext(&b_iter); bb_id != -1;
2258 bb_id = BitVectorIteratorNext(&b_iter)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2259 BasicBlock *bb;
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2260 bb = reinterpret_cast<BasicBlock*>(GrowableListGetElement(&cu->block_list, bb_id));
2261 bb->nesting_depth = std::max(bb->nesting_depth,
2262 loop->header->nesting_depth);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2263 }
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2264 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2265 if (cu->verbose) {
2266 DumpLoops(cu);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2267 }
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2268}
2269
2270/*
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2271 * This function will make a best guess at whether the invoke will
2272 * end up using Method*. It isn't critical to get it exactly right,
2273 * and attempting to do would involve more complexity than it's
2274 * worth.
2275 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2276static bool InvokeUsesMethodStar(CompilationUnit* cu, MIR* mir)
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2277{
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2278 InvokeType type;
2279 Instruction::Code opcode = mir->dalvikInsn.opcode;
2280 switch (opcode) {
2281 case Instruction::INVOKE_STATIC:
2282 case Instruction::INVOKE_STATIC_RANGE:
2283 type = kStatic;
2284 break;
2285 case Instruction::INVOKE_DIRECT:
2286 case Instruction::INVOKE_DIRECT_RANGE:
2287 type = kDirect;
2288 break;
2289 case Instruction::INVOKE_VIRTUAL:
2290 case Instruction::INVOKE_VIRTUAL_RANGE:
2291 type = kVirtual;
2292 break;
2293 case Instruction::INVOKE_INTERFACE:
2294 case Instruction::INVOKE_INTERFACE_RANGE:
2295 return false;
2296 case Instruction::INVOKE_SUPER_RANGE:
2297 case Instruction::INVOKE_SUPER:
2298 type = kSuper;
2299 break;
2300 default:
buzbeecbd6d442012-11-17 14:11:25 -0800[diff] [blame]2301 LOG(WARNING) << "Unexpected invoke op: " << opcode;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2302 return false;
2303 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2304 OatCompilationUnit m_unit(cu->class_loader, cu->class_linker,
2305 *cu->dex_file,
2306 cu->code_item, cu->method_idx,
2307 cu->access_flags);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2308 // TODO: add a flag so we don't counts the stats for this twice
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2309 uint32_t dex_method_idx = mir->dalvikInsn.vB;
2310 int vtable_idx;
2311 uintptr_t direct_code;
2312 uintptr_t direct_method;
2313 bool fast_path =
2314 cu->compiler->ComputeInvokeInfo(dex_method_idx, &m_unit, type,
2315 vtable_idx, direct_code,
2316 direct_method) &&
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2317 !SLOW_INVOKE_PATH;
2318 return (((type == kDirect) || (type == kStatic)) &&
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2319 fast_path && ((direct_code == 0) || (direct_method == 0)));
buzbee9c044ce2012-03-18 13:24:07 -0700[diff] [blame]2320}
2321
2322/*
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2323 * Count uses, weighting by loop nesting depth. This code only
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2324 * counts explicitly used s_regs. A later phase will add implicit
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2325 * counts for things such as Method*, null-checked references, etc.
2326 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2327static bool CountUses(struct CompilationUnit* cu, struct BasicBlock* bb)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2328{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2329 if (bb->block_type != kDalvikByteCode) {
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2330 return false;
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2331 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2332 for (MIR* mir = bb->first_mir_insn; (mir != NULL); mir = mir->next) {
2333 if (mir->ssa_rep == NULL) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2334 continue;
2335 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2336 uint32_t weight = std::min(16U, static_cast<uint32_t>(bb->nesting_depth));
2337 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
2338 int s_reg = mir->ssa_rep->uses[i];
2339 DCHECK_LT(s_reg, static_cast<int>(cu->use_counts.num_used));
2340 cu->raw_use_counts.elem_list[s_reg]++;
2341 cu->use_counts.elem_list[s_reg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2342 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2343 if (!(cu->disable_opt & (1 << kPromoteCompilerTemps))) {
2344 int df_attributes = oat_data_flow_attributes[mir->dalvikInsn.opcode];
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2345 // Implicit use of Method* ? */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2346 if (df_attributes & DF_UMS) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2347 /*
2348 * Some invokes will not use Method* - need to perform test similar
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2349 * to that found in GenInvoke() to decide whether to count refs
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2350 * for Method* on invoke-class opcodes.
buzbee52a77fc2012-11-20 19:50:46 -0800[diff] [blame]2351 * TODO: refactor for common test here, save results for GenInvoke
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2352 */
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2353 int uses_method_star = true;
2354 if ((df_attributes & (DF_FORMAT_35C | DF_FORMAT_3RC)) &&
2355 !(df_attributes & DF_NON_NULL_RET)) {
2356 uses_method_star &= InvokeUsesMethodStar(cu, mir);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2357 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2358 if (uses_method_star) {
2359 cu->raw_use_counts.elem_list[cu->method_sreg]++;
2360 cu->use_counts.elem_list[cu->method_sreg] += (1 << weight);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2361 }
2362 }
2363 }
2364 }
2365 return false;
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2366}
2367
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2368void MethodUseCount(CompilationUnit *cu)
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2369{
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2370 CompilerInitGrowableList(cu, &cu->use_counts, cu->num_ssa_regs + 32, kListMisc);
2371 CompilerInitGrowableList(cu, &cu->raw_use_counts, cu->num_ssa_regs + 32, kListMisc);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2372 // Initialize list
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2373 for (int i = 0; i < cu->num_ssa_regs; i++) {
2374 InsertGrowableList(cu, &cu->use_counts, 0);
2375 InsertGrowableList(cu, &cu->raw_use_counts, 0);
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2376 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2377 if (cu->disable_opt & (1 << kPromoteRegs)) {
Bill Buzbeea114add2012-05-03 15:00:40 -0700[diff] [blame]2378 return;
2379 }
buzbeefa57c472012-11-21 12:06:18 -0800[diff] [blame]2380 DataFlowAnalysisDispatcher(cu, CountUses,
2381 kAllNodes, false /* is_iterative */);
buzbee239c4e72012-03-16 08:42:29 -0700[diff] [blame]2382}
2383
Elliott Hughes11d1b0c2012-01-23 16:57:47 -0800[diff] [blame]2384} // namespace art