Don't treat dvmJitToPatchPredictedChain as a Jit-to-Interp entry point.
It is just a native callout helper function.
Change-Id: I6398b6876f5ba579b76e732107157a4c99337796
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index 273cef1..02c39f6 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1111,7 +1111,7 @@
* 0x426a99b8 : ldr r0, [r7, #44] --> r0 <- this->class->vtable[methodIdx]
* 0x426a99ba : cmp r1, #0 --> compare r1 (rechain count) against 0
* 0x426a99bc : bgt 0x426a99c2 --> >=0? don't rechain
- * 0x426a99be : ldr r7, [r6, #96] --+ dvmJitToPatchPredictedChain
+ * 0x426a99be : ldr r7, [pc, #off]--+ dvmJitToPatchPredictedChain
* 0x426a99c0 : blx r7 --+
* 0x426a99c2 : add r1, pc, #12 --> r1 <- &retChainingCell
* 0x426a99c4 : blx_1 0x426a9098 --+ TEMPLATE_INVOKE_METHOD_NO_OPT
@@ -1182,8 +1182,7 @@
/* Check if rechain limit is reached */
ArmLIR *bypassRechaining = genCmpImmBranch(cUnit, kArmCondGt, r1, 0);
- loadWordDisp(cUnit, rGLUE, offsetof(InterpState,
- jitToInterpEntries.dvmJitToPatchPredictedChain), r7);
+ LOAD_FUNC_ADDR(cUnit, r7, (int) dvmJitToPatchPredictedChain);
genRegCopy(cUnit, r1, rGLUE);
@@ -2929,7 +2928,7 @@
* 0x47357e6e : mov r1, r8 --> r1 <- &retChainingCell
* 0x47357e70 : cmp r1, #0 --> compare against 0
* 0x47357e72 : bgt 0x47357e7c --> >=0? don't rechain
- * 0x47357e74 : ldr r7, [r6, #108] --+
+ * 0x47357e74 : ldr r7, [pc, #off] --+
* 0x47357e76 : mov r2, r9 | dvmJitToPatchPredictedChain
* 0x47357e78 : mov r3, r10 |
* 0x47357e7a : blx r7 --+
@@ -3071,8 +3070,7 @@
ArmLIR *bypassRechaining = genCmpImmBranch(cUnit, kArmCondGt,
r1, 0);
- loadWordDisp(cUnit, rGLUE, offsetof(InterpState,
- jitToInterpEntries.dvmJitToPatchPredictedChain), r7);
+ LOAD_FUNC_ADDR(cUnit, r7, (int) dvmJitToPatchPredictedChain);
genRegCopy(cUnit, r1, rGLUE);
genRegCopy(cUnit, r2, r9);