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Ben Chengba4fc8b2009-06-01 13:00:29 -07001/*
2 * Copyright (C) 2009 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#ifndef _DALVIK_VM_COMPILER_IR
18#define _DALVIK_VM_COMPILER_IR
19
Ben Cheng4238ec22009-08-24 16:32:22 -070020#include "codegen/Optimizer.h"
21
Bill Buzbee1465db52009-09-23 17:17:35 -070022typedef enum RegisterClass {
23 kCoreReg,
24 kFPReg,
25 kAnyReg,
26} RegisterClass;
27
28typedef enum RegLocationType {
29 kLocDalvikFrame = 0,
30 kLocPhysReg,
31 kLocRetval, // Return region in interpState
32 kLocSpill,
33} RegLocationType;
34
35typedef struct RegLocation {
36 RegLocationType location:2;
37 unsigned wide:1;
38 unsigned fp:1; // Hint for float/double
39 u1 lowReg:6; // First physical register
40 u1 highReg:6; // 2nd physical register (if wide)
41 s2 sRegLow; // SSA name for low Dalvik word
42} RegLocation;
43
44#define INVALID_SREG (-1)
45#define INVALID_REG (-1)
46
Ben Chengba4fc8b2009-06-01 13:00:29 -070047typedef enum BBType {
48 /* For coding convenience reasons chaining cell types should appear first */
Bill Buzbee1465db52009-09-23 17:17:35 -070049 kChainingCellNormal = 0,
50 kChainingCellHot,
51 kChainingCellInvokeSingleton,
52 kChainingCellInvokePredicted,
53 kChainingCellBackwardBranch,
Ben Chengcec26f62010-01-15 15:29:33 -080054 kChainingCellGap,
55 /* Don't insert new fields between Gap and Last */
56 kChainingCellLast = kChainingCellGap + 1,
Bill Buzbee1465db52009-09-23 17:17:35 -070057 kEntryBlock,
58 kDalvikByteCode,
59 kExitBlock,
60 kPCReconstruction,
61 kExceptionHandling,
Ben Chengba4fc8b2009-06-01 13:00:29 -070062} BBType;
63
Bill Buzbee46cd5b62009-06-05 15:36:06 -070064typedef struct ChainCellCounts {
65 union {
Ben Chengcec26f62010-01-15 15:29:33 -080066 u1 count[kChainingCellLast]; /* include one more space for the gap # */
Bill Buzbee46cd5b62009-06-05 15:36:06 -070067 u4 dummyForAlignment;
68 } u;
69} ChainCellCounts;
70
Ben Chengba4fc8b2009-06-01 13:00:29 -070071typedef struct LIR {
72 int offset;
73 struct LIR *next;
74 struct LIR *prev;
75 struct LIR *target;
76} LIR;
77
Ben Cheng4238ec22009-08-24 16:32:22 -070078enum ExtendedMIROpcode {
Bill Buzbee1465db52009-09-23 17:17:35 -070079 kMirOpFirst = 256,
80 kMirOpPhi = kMirOpFirst,
81 kMirOpNullNRangeUpCheck,
82 kMirOpNullNRangeDownCheck,
83 kMirOpLowerBound,
84 kMirOpPunt,
85 kMirOpLast,
Ben Cheng4238ec22009-08-24 16:32:22 -070086};
87
88struct SSARepresentation;
89
90typedef enum {
91 kMIRIgnoreNullCheck = 0,
92 kMIRNullCheckOnly,
93 kMIRIgnoreRangeCheck,
94 kMIRRangeCheckOnly,
95} MIROptimizationFlagPositons;
96
97#define MIR_IGNORE_NULL_CHECK (1 << kMIRIgnoreNullCheck)
98#define MIR_NULL_CHECK_ONLY (1 << kMIRNullCheckOnly)
99#define MIR_IGNORE_RANGE_CHECK (1 << kMIRIgnoreRangeCheck)
100#define MIR_RANGE_CHECK_ONLY (1 << kMIRRangeCheckOnly)
101
Ben Chengba4fc8b2009-06-01 13:00:29 -0700102typedef struct MIR {
103 DecodedInstruction dalvikInsn;
104 unsigned int width;
105 unsigned int offset;
106 struct MIR *prev;
107 struct MIR *next;
Ben Cheng4238ec22009-08-24 16:32:22 -0700108 struct SSARepresentation *ssaRep;
109 int OptimizationFlags;
Bill Buzbee1465db52009-09-23 17:17:35 -0700110 int seqNum;
Ben Chengba4fc8b2009-06-01 13:00:29 -0700111} MIR;
112
Ben Cheng4238ec22009-08-24 16:32:22 -0700113struct BasicBlockDataFlow;
114
Ben Chengba4fc8b2009-06-01 13:00:29 -0700115typedef struct BasicBlock {
116 int id;
117 int visited;
118 unsigned int startOffset;
119 const Method *containingMethod; // For blocks from the callee
120 BBType blockType;
Ben Cheng1efc9c52009-06-08 18:25:27 -0700121 bool needFallThroughBranch; // For blocks ended due to length limit
Ben Chengba4fc8b2009-06-01 13:00:29 -0700122 MIR *firstMIRInsn;
123 MIR *lastMIRInsn;
124 struct BasicBlock *fallThrough;
125 struct BasicBlock *taken;
126 struct BasicBlock *next; // Serial link for book keeping purposes
Ben Cheng4238ec22009-08-24 16:32:22 -0700127 struct BasicBlockDataFlow *dataFlowInfo;
Ben Chengba4fc8b2009-06-01 13:00:29 -0700128} BasicBlock;
129
Ben Cheng4238ec22009-08-24 16:32:22 -0700130struct LoopAnalysis;
Bill Buzbee1465db52009-09-23 17:17:35 -0700131struct RegisterPool;
Ben Cheng4238ec22009-08-24 16:32:22 -0700132
Ben Chengba4fc8b2009-06-01 13:00:29 -0700133typedef struct CompilationUnit {
Ben Cheng1efc9c52009-06-08 18:25:27 -0700134 int numInsts;
Ben Chengba4fc8b2009-06-01 13:00:29 -0700135 int numBlocks;
136 BasicBlock **blockList;
137 const Method *method;
138 const JitTraceDescription *traceDesc;
139 LIR *firstLIRInsn;
140 LIR *lastLIRInsn;
141 LIR *wordList;
Bill Buzbee6e963e12009-06-17 16:56:19 -0700142 LIR *chainCellOffsetLIR;
Ben Chengba4fc8b2009-06-01 13:00:29 -0700143 GrowableList pcReconstructionList;
Ben Cheng1efc9c52009-06-08 18:25:27 -0700144 int headerSize; // bytes before the first code ptr
145 int dataOffset; // starting offset of literal pool
146 int totalSize; // header + code size
Ben Chengba4fc8b2009-06-01 13:00:29 -0700147 unsigned char *codeBuffer;
148 void *baseAddr;
149 bool printMe;
150 bool allSingleStep;
Ben Cheng1efc9c52009-06-08 18:25:27 -0700151 bool halveInstCount;
Bill Buzbee6e963e12009-06-17 16:56:19 -0700152 bool executionCount; // Add code to count trace executions
Ben Cheng4238ec22009-08-24 16:32:22 -0700153 bool hasLoop;
jeffhao9e45c0b2010-02-03 10:24:05 -0800154 bool heapMemOp; // Mark mem ops for self verification
Ben Chengcec26f62010-01-15 15:29:33 -0800155 int numChainingCells[kChainingCellGap];
156 LIR *firstChainingLIR[kChainingCellGap];
157 LIR *chainingCellBottom;
Bill Buzbee1465db52009-09-23 17:17:35 -0700158 struct RegisterPool *regPool;
Ben Chenge9695e52009-06-16 16:11:47 -0700159 int optRound; // round number to tell an LIR's age
Bill Buzbeefc519dc2010-03-06 23:30:57 -0800160 jmp_buf *bailPtr;
Bill Buzbee716f1202009-07-23 13:22:09 -0700161 JitInstructionSetType instructionSet;
Ben Cheng4238ec22009-08-24 16:32:22 -0700162 /* Number of total regs used in the whole cUnit after SSA transformation */
163 int numSSARegs;
164 /* Map SSA reg i to the Dalvik[15..0]/Sub[31..16] pair. */
165 GrowableList *ssaToDalvikMap;
166
167 /* The following are new data structures to support SSA representations */
168 /* Map original Dalvik reg i to the SSA[15..0]/Sub[31..16] pair */
169 int *dalvikToSSAMap; // length == method->registersSize
170 BitVector *isConstantV; // length == numSSAReg
171 int *constantValues; // length == numSSAReg
172
173 /* Data structure for loop analysis and optimizations */
174 struct LoopAnalysis *loopAnalysis;
Bill Buzbee1465db52009-09-23 17:17:35 -0700175
176 /* Map SSA names to location */
177 RegLocation *regLocation;
178 int sequenceNumber;
Ben Cheng6c10a972009-10-29 14:39:18 -0700179
180 /*
181 * Set to the Dalvik PC of the switch instruction if it has more than
182 * MAX_CHAINED_SWITCH_CASES cases.
183 */
184 const u2 *switchOverflowPad;
Ben Chengba4fc8b2009-06-01 13:00:29 -0700185} CompilationUnit;
186
Ben Cheng11d8f142010-03-24 15:24:19 -0700187#if defined(WITH_SELF_VERIFICATION)
188#define HEAP_ACCESS_SHADOW(_state) cUnit->heapMemOp = _state
189#else
190#define HEAP_ACCESS_SHADOW(_state)
191#endif
192
Ben Chengba4fc8b2009-06-01 13:00:29 -0700193BasicBlock *dvmCompilerNewBB(BBType blockType);
194
195void dvmCompilerAppendMIR(BasicBlock *bb, MIR *mir);
196
Ben Cheng4238ec22009-08-24 16:32:22 -0700197void dvmCompilerPrependMIR(BasicBlock *bb, MIR *mir);
198
Ben Chengba4fc8b2009-06-01 13:00:29 -0700199void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir);
200
Ben Chenge9695e52009-06-16 16:11:47 -0700201void dvmCompilerInsertLIRBefore(LIR *currentLIR, LIR *newLIR);
202
Ben Chengdcf3e5d2009-09-11 13:42:05 -0700203void dvmCompilerInsertLIRAfter(LIR *currentLIR, LIR *newLIR);
204
Bill Buzbeefc519dc2010-03-06 23:30:57 -0800205void dvmCompilerAbort(CompilationUnit *cUnit);
206
Ben Chengba4fc8b2009-06-01 13:00:29 -0700207/* Debug Utilities */
208void dvmCompilerDumpCompilationUnit(CompilationUnit *cUnit);
209
210#endif /* _DALVIK_VM_COMPILER_IR */