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5<head>
6<title>Bytecode for the Dalvik VM</title>
7<link rel=stylesheet href="dalvik-bytecode.css">
8</head>
9
10<body>
11
12<h1>Bytecode for the Dalvik VM</h1>
13<p>Copyright &copy; 2007 The Android Open Source Project
14
15<h2>General Design</h2>
16
17<ul>
18<li>The machine model and calling conventions are meant to approximately
19 imitate common real architectures and C-style calling conventions:
20 <ul>
21 <li>The VM is register-based, and frames are fixed in size upon creation.
22 Each frame consists of a particular number of registers (specified by
23 the method) as well as any adjunct data needed to execute the method,
24 such as (but not limited to) the program counter and a reference to the
25 <code>.dex</code> file that contains the method.
26 </li>
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]27 <li>When used for bit values (such as integers and floating point
28 numbers), registers are considered 32 bits wide. Adjacent register
29 pairs are used for 64-bit values. There is no alignment requirement
30 for register pairs.
31 </li>
32 <li>When used for object references, registers are considered wide enough
33 to hold exactly one such reference.
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]34 </li>
35 <li>In terms of bitwise representation, <code>(Object) null == (int)
36 0</code>.
37 </li>
38 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers
39 of the method's invocation frame, in order. Wide arguments consume
40 two registers. Instance methods are passed a <code>this</code> reference
41 as their first argument.
42 </li>
43 </ul>
44<li>The storage unit in the instruction stream is a 16-bit unsigned quantity.
45 Some bits in some instructions are ignored / must-be-zero.
46</li>
47<li>Instructions aren't gratuitously limited to a particular type. For
48 example, instructions that move 32-bit register values without interpretation
49 don't have to specify whether they are moving ints or floats.
50</li>
51<li>There are separately enumerated and indexed constant pools for
52 references to strings, types, fields, and methods.
53</li>
54<li>Bitwise literal data is represented in-line in the instruction stream.</li>
55<li>Because, in practice, it is uncommon for a method to need more than
56 16 registers, and because needing more than eight registers <i>is</i>
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]57 reasonably common, many instructions are limited to only addressing
58 the first 16
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]59 registers. When reasonably possible, instructions allow references to
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]60 up to the first 256 registers. In addition, some instructions have variants
61 that allow for much larger register counts, including a pair of catch-all
62 <code>move</code> instructions that can address registers in the range
63 <code>v0</code> &ndash; <code>v65535</code>.
64 In cases where an instruction variant isn't
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]65 available to address a desired register, it is expected that the register
66 contents get moved from the original register to a low register (before the
67 operation) and/or moved from a low result register to a high register
68 (after the operation).
69</li>
70<li>There are several "pseudo-instructions" that are used to hold
71 variable-length data referred to by regular instructions (for example,
72 <code>fill-array-data</code>). Such instructions must never be
73 encountered during the normal flow of execution. In addition, the
74 instructions must be located on even-numbered bytecode offsets (that is,
75 4-byte aligned). In order to meet this requirement, dex generation tools
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]76 must emit an extra <code>nop</code> instruction as a spacer if such an
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]77 instruction would otherwise be unaligned. Finally, though not required,
78 it is expected that most tools will choose to emit these instructions at
79 the ends of methods, since otherwise it would likely be the case that
80 additional instructions would be needed to branch around them.
81</li>
82<li>When installed on a running system, some instructions may be altered,
83 changing their format, as an install-time static linking optimization.
84 This is to allow for faster execution once linkage is known.
85 See the associated
86 <a href="instruction-formats.html">instruction formats document</a>
87 for the suggested variants. The word "suggested" is used advisedly;
88 it is not mandatory to implement these.
89</li>
90<li>Human-syntax and mnemonics:
91 <ul>
92 <li>Dest-then-source ordering for arguments.</li>
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]93 <li>Some opcodes have a disambiguating name suffix to indicate the type(s)
94 they operate on:
95 <ul>
96 <li>Type-general 32-bit opcodes are unmarked.</li>
97 <li>Type-general 64-bit opcodes are suffixed with <code>-wide</code>.</li>
98 <li>Type-specific opcodes are suffixed with their type (or a
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]99 straightforward abbreviation), one of: <code>-boolean</code>
100 <code>-byte</code> <code>-char</code> <code>-short</code>
101 <code>-int</code> <code>-long</code> <code>-float</code>
102 <code>-double</code> <code>-object</code> <code>-string</code>
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]103 <code>-class</code> <code>-void</code>.</li>
104 </ul>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]105 </li>
106 <li>Some opcodes have a disambiguating suffix to distinguish
107 otherwise-identical operations that have different instruction layouts
108 or options. These suffixes are separated from the main names with a slash
109 ("<code>/</code>") and mainly exist at all to make there be a one-to-one
110 mapping with static constants in the code that generates and interprets
111 executables (that is, to reduce ambiguity for humans).
112 </li>
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]113 <li>In the descriptions here, the width of a value (indicating, e.g., the
114 range of a constant or the number of registers possibly addressed) is
115 emphasized by the use of a character per four bits of width.
116 </li>
117 <li>For example, in the instruction
118 "<code>move-wide/from16 vAA, vBBBB</code>":
119 <ul>
120 <li>"<code>move</code>" is the base opcode, indicating the base operation
121 (move a register's value).</li>
122 <li>"<code>wide</code>" is the name suffix, indicating that it operates
123 on wide (64 bit) data.</li>
124 <li>"<code>from16</code>" is the opcode suffix, indicating a variant
125 that has a 16-bit register reference as a source.</li>
126 <li>"<code>vAA</code>" is the destination register (implied by the
127 operation; again, the rule is that destination arguments always come
128 first), which must be in the range <code>v0</code> &ndash;
129 <code>v255</code>.</li>
130 <li>"<code>vBBBB</code>" is the source register, which must be in the
131 range <code>v0</code> &ndash; <code>v65535</code>.</li>
132 </ul>
133 </li>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]134 </ul>
135</li>
136<li>See the <a href="instruction-formats.html">instruction formats
137 document</a> for more details about the various instruction formats
138 (listed under "Op &amp; Format") as well as details about the opcode
139 syntax.
140</li>
141</ul>
142
143<h2>Summary of Instruction Set</h2>
144
145<table class="instruc">
146<thead>
147<tr>
148 <th>Op &amp; Format</th>
149 <th>Mnemonic / Syntax</th>
150 <th>Arguments</th>
151 <th>Description</th>
152</tr>
153</thead>
154<tbody>
155<tr>
156 <td>00 10x</td>
157 <td>nop</td>
158 <td>&nbsp;</td>
159 <td>Waste cycles.</td>
160</tr>
161<tr>
162 <td>01 12x</td>
163 <td>move vA, vB</td>
164 <td><code>A:</code> destination register (4 bits)<br/>
165 <code>B:</code> source register (4 bits)</td>
166 <td>Move the contents of one non-object register to another.</td>
167</tr>
168<tr>
169 <td>02 22x</td>
170 <td>move/from16 vAA, vBBBB</td>
171 <td><code>A:</code> destination register (8 bits)<br/>
172 <code>B:</code> source register (16 bits)</td>
173 <td>Move the contents of one non-object register to another.</td>
174</tr>
175<tr>
176 <td>03 32x</td>
177 <td>move/16 vAAAA, vBBBB</td>
178 <td><code>A:</code> destination register (16 bits)<br/>
179 <code>B:</code> source register (16 bits)</td>
180 <td>Move the contents of one non-object register to another.</td>
181</tr>
182<tr>
183 <td>04 12x</td>
184 <td>move-wide vA, vB</td>
185 <td><code>A:</code> destination register pair (4 bits)<br/>
186 <code>B:</code> source register pair (4 bits)</td>
187 <td>Move the contents of one register-pair to another.
188 <p><b>Note:</b>
189 It is legal to move from <code>v<i>N</i></code> to either
190 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations
191 must arrange for both halves of a register pair to be read before
192 anything is written.</p>
193 </td>
194</tr>
195<tr>
196 <td>05 22x</td>
197 <td>move-wide/from16 vAA, vBBBB</td>
198 <td><code>A:</code> destination register pair (8 bits)<br/>
199 <code>B:</code> source register pair (16 bits)</td>
200 <td>Move the contents of one register-pair to another.
201 <p><b>Note:</b>
202 Implementation considerations are the same as <code>move-wide</code>,
203 above.</p>
204 </td>
205</tr>
206<tr>
207 <td>06 32x</td>
208 <td>move-wide/16 vAAAA, vBBBB</td>
209 <td><code>A:</code> destination register pair (16 bits)<br/>
210 <code>B:</code> source register pair (16 bits)</td>
211 <td>Move the contents of one register-pair to another.
212 <p><b>Note:</b>
213 Implementation considerations are the same as <code>move-wide</code>,
214 above.</p>
215 </td>
216</tr>
217<tr>
218 <td>07 12x</td>
219 <td>move-object vA, vB</td>
220 <td><code>A:</code> destination register (4 bits)<br/>
221 <code>B:</code> source register (4 bits)</td>
222 <td>Move the contents of one object-bearing register to another.</td>
223</tr>
224<tr>
225 <td>08 22x</td>
226 <td>move-object/from16 vAA, vBBBB</td>
227 <td><code>A:</code> destination register (8 bits)<br/>
228 <code>B:</code> source register (16 bits)</td>
229 <td>Move the contents of one object-bearing register to another.</td>
230</tr>
231<tr>
232 <td>09 32x</td>
233 <td>move-object/16 vAAAA, vBBBB</td>
234 <td><code>A:</code> destination register (16 bits)<br/>
235 <code>B:</code> source register (16 bits)</td>
236 <td>Move the contents of one object-bearing register to another.</td>
237</tr>
238<tr>
239 <td>0a 11x</td>
240 <td>move-result vAA</td>
241 <td><code>A:</code> destination register (8 bits)</td>
242 <td>Move the single-word non-object result of the most recent
243 <code>invoke-<i>kind</i></code> into the indicated register.
244 This must be done as the instruction immediately after an
245 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result
246 is not to be ignored; anywhere else is invalid.</td>
247</tr>
248<tr>
249 <td>0b 11x</td>
250 <td>move-result-wide vAA</td>
251 <td><code>A:</code> destination register pair (8 bits)</td>
252 <td>Move the double-word result of the most recent
253 <code>invoke-<i>kind</i></code> into the indicated register pair.
254 This must be done as the instruction immediately after an
255 <code>invoke-<i>kind</i></code> whose (double-word) result
256 is not to be ignored; anywhere else is invalid.</td>
257</tr>
258<tr>
259 <td>0c 11x</td>
260 <td>move-result-object vAA</td>
261 <td><code>A:</code> destination register (8 bits)</td>
262 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code>
263 into the indicated register. This must be done as the instruction
264 immediately after an <code>invoke-<i>kind</i></code> or
265 <code>filled-new-array</code>
266 whose (object) result is not to be ignored; anywhere else is invalid.</td>
267</tr>
268<tr>
269 <td>0d 11x</td>
270 <td>move-exception vAA</td>
271 <td><code>A:</code> destination register (8 bits)</td>
Dan Bornstein2572eae2010-10-21 14:55:56 -0700[diff] [blame^]272 <td>Save a just-caught exception into the given register. This must
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]273 be the first instruction of any exception handler whose caught
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]274 exception is not to be ignored, and this instruction must <i>only</i>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]275 ever occur as the first instruction of an exception handler; anywhere
276 else is invalid.</td>
277</tr>
278<tr>
279 <td>0e 10x</td>
280 <td>return-void</td>
281 <td>&nbsp;</td>
282 <td>Return from a <code>void</code> method.</td>
283</tr>
284<tr>
285 <td>0f 11x</td>
286 <td>return vAA</td>
287 <td><code>A:</code> return value register (8 bits)</td>
288 <td>Return from a single-width (32-bit) non-object value-returning
289 method.
290 </td>
291</tr>
292<tr>
293 <td>10 11x</td>
294 <td>return-wide vAA</td>
295 <td><code>A:</code> return value register-pair (8 bits)</td>
296 <td>Return from a double-width (64-bit) value-returning method.</td>
297</tr>
298<tr>
299 <td>11 11x</td>
300 <td>return-object vAA</td>
301 <td><code>A:</code> return value register (8 bits)</td>
302 <td>Return from an object-returning method.</td>
303</tr>
304<tr>
305 <td>12 11n</td>
306 <td>const/4 vA, #+B</td>
307 <td><code>A:</code> destination register (4 bits)<br/>
308 <code>B:</code> signed int (4 bits)</td>
309 <td>Move the given literal value (sign-extended to 32 bits) into
310 the specified register.</td>
311</tr>
312<tr>
313 <td>13 21s</td>
314 <td>const/16 vAA, #+BBBB</td>
315 <td><code>A:</code> destination register (8 bits)<br/>
316 <code>B:</code> signed int (16 bits)</td>
317 <td>Move the given literal value (sign-extended to 32 bits) into
318 the specified register.</td>
319</tr>
320<tr>
321 <td>14 31i</td>
322 <td>const vAA, #+BBBBBBBB</td>
323 <td><code>A:</code> destination register (8 bits)<br/>
324 <code>B:</code> arbitrary 32-bit constant</td>
325 <td>Move the given literal value into the specified register.</td>
326</tr>
327<tr>
328 <td>15 21h</td>
329 <td>const/high16 vAA, #+BBBB0000</td>
330 <td><code>A:</code> destination register (8 bits)<br/>
331 <code>B:</code> signed int (16 bits)</td>
332 <td>Move the given literal value (right-zero-extended to 32 bits) into
333 the specified register.</td>
334</tr>
335<tr>
336 <td>16 21s</td>
337 <td>const-wide/16 vAA, #+BBBB</td>
338 <td><code>A:</code> destination register (8 bits)<br/>
339 <code>B:</code> signed int (16 bits)</td>
340 <td>Move the given literal value (sign-extended to 64 bits) into
341 the specified register-pair.</td>
342</tr>
343<tr>
344 <td>17 31i</td>
345 <td>const-wide/32 vAA, #+BBBBBBBB</td>
346 <td><code>A:</code> destination register (8 bits)<br/>
347 <code>B:</code> signed int (32 bits)</td>
348 <td>Move the given literal value (sign-extended to 64 bits) into
349 the specified register-pair.</td>
350</tr>
351<tr>
352 <td>18 51l</td>
353 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td>
354 <td><code>A:</code> destination register (8 bits)<br/>
355 <code>B:</code> arbitrary double-width (64-bit) constant</td>
356 <td>Move the given literal value into
357 the specified register-pair.</td>
358</tr>
359<tr>
360 <td>19 21h</td>
361 <td>const-wide/high16 vAA, #+BBBB000000000000</td>
362 <td><code>A:</code> destination register (8 bits)<br/>
363 <code>B:</code> signed int (16 bits)</td>
364 <td>Move the given literal value (right-zero-extended to 64 bits) into
365 the specified register-pair.</td>
366</tr>
367<tr>
368 <td>1a 21c</td>
369 <td>const-string vAA, string@BBBB</td>
370 <td><code>A:</code> destination register (8 bits)<br/>
371 <code>B:</code> string index</td>
372 <td>Move a reference to the string specified by the given index into the
373 specified register.</td>
374</tr>
375<tr>
376 <td>1b 31c</td>
377 <td>const-string/jumbo vAA, string@BBBBBBBB</td>
378 <td><code>A:</code> destination register (8 bits)<br/>
379 <code>B:</code> string index</td>
380 <td>Move a reference to the string specified by the given index into the
381 specified register.</td>
382</tr>
383<tr>
384 <td>1c 21c</td>
385 <td>const-class vAA, type@BBBB</td>
386 <td><code>A:</code> destination register (8 bits)<br/>
387 <code>B:</code> type index</td>
388 <td>Move a reference to the class specified by the given index into the
389 specified register. In the case where the indicated type is primitive,
390 this will store a reference to the primitive type's degenerate
391 class.</td>
392</tr>
393<tr>
394 <td>1d 11x</td>
395 <td>monitor-enter vAA</td>
396 <td><code>A:</code> reference-bearing register (8 bits)</td>
397 <td>Acquire the monitor for the indicated object.</td>
398</tr>
399<tr>
400 <td>1e 11x</td>
401 <td>monitor-exit vAA</td>
402 <td><code>A:</code> reference-bearing register (8 bits)</td>
403 <td>Release the monitor for the indicated object.
404 <p><b>Note:</b>
405 If this instruction needs to throw an exception, it must do
406 so as if the pc has already advanced past the instruction.
407 It may be useful to think of this as the instruction successfully
408 executing (in a sense), and the exception getting thrown <i>after</i>
409 the instruction but <i>before</i> the next one gets a chance to
410 run. This definition makes it possible for a method to use
411 a monitor cleanup catch-all (e.g., <code>finally</code>) block as
412 the monitor cleanup for that block itself, as a way to handle the
413 arbitrary exceptions that might get thrown due to the historical
414 implementation of <code>Thread.stop()</code>, while still managing
415 to have proper monitor hygiene.</p>
416 </td>
417</tr>
418<tr>
419 <td>1f 21c</td>
420 <td>check-cast vAA, type@BBBB</td>
421 <td><code>A:</code> reference-bearing register (8 bits)<br/>
422 <code>B:</code> type index (16 bits)</td>
423 <td>Throw a <code>ClassCastException</code> if the reference in the
424 given register cannot be cast to the indicated type.
425 <p><b>Note:</b> Since <code>A</code> must always be a reference
426 (and not a primitive value), this will necessarily fail at runtime
427 (that is, it will throw an exception) if <code>B</code> refers to a
428 primitive type.</p>
429 </td>
430</tr>
431<tr>
432 <td>20 22c</td>
433 <td>instance-of vA, vB, type@CCCC</td>
434 <td><code>A:</code> destination register (4 bits)<br/>
435 <code>B:</code> reference-bearing register (4 bits)<br/>
436 <code>C:</code> type index (16 bits)</td>
437 <td>Store in the given destination register <code>1</code>
438 if the indicated reference is an instance of the given type,
439 or <code>0</code> if not.
440 <p><b>Note:</b> Since <code>B</code> must always be a reference
441 (and not a primitive value), this will always result
442 in <code>0</code> being stored if <code>C</code> refers to a primitive
443 type.</td>
444</tr>
445<tr>
446 <td>21 12x</td>
447 <td>array-length vA, vB</td>
448 <td><code>A:</code> destination register (4 bits)<br/>
449 <code>B:</code> array reference-bearing register (4 bits)</td>
450 <td>Store in the given destination register the length of the indicated
451 array, in entries</td>
452</tr>
453<tr>
454 <td>22 21c</td>
455 <td>new-instance vAA, type@BBBB</td>
456 <td><code>A:</code> destination register (8 bits)<br/>
457 <code>B:</code> type index</td>
458 <td>Construct a new instance of the indicated type, storing a
459 reference to it in the destination. The type must refer to a
460 non-array class.</td>
461</tr>
462<tr>
463 <td>23 22c</td>
464 <td>new-array vA, vB, type@CCCC</td>
465 <td><code>A:</code> destination register (8 bits)<br/>
466 <code>B:</code> size register<br/>
467 <code>C:</code> type index</td>
468 <td>Construct a new array of the indicated type and size. The type
469 must be an array type.</td>
470</tr>
471<tr>
472 <td>24 35c</td>
473 <td>filled-new-array {vD, vE, vF, vG, vA}, type@CCCC</td>
474 <td><code>B:</code> array size and argument word count (4 bits)<br/>
475 <code>C:</code> type index (16 bits)<br/>
476 <code>D..G, A:</code> argument registers (4 bits each)</td>
477 <td>Construct an array of the given type and size, filling it with the
478 supplied contents. The type must be an array type. The array's
479 contents must be single-word (that is,
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]480 no arrays of <code>long</code> or <code>double</code>, but reference
481 types are acceptable). The constructed
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]482 instance is stored as a "result" in the same way that the method invocation
Carl Shapirode750892010-06-08 16:37:12 -0700[diff] [blame]483 instructions store their results, so the constructed instance must
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]484 be moved to a register with an immediately subsequent
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]485 <code>move-result-object</code> instruction (if it is to be used).</td>
486</tr>
487<tr>
488 <td>25 3rc</td>
489 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td>
490 <td><code>A:</code> array size and argument word count (8 bits)<br/>
491 <code>B:</code> type index (16 bits)<br/>
492 <code>C:</code> first argument register (16 bits)<br/>
493 <code>N = A + C - 1</code></td>
494 <td>Construct an array of the given type and size, filling it with
495 the supplied contents. Clarifications and restrictions are the same
496 as <code>filled-new-array</code>, described above.</td>
497</tr>
498<tr>
499 <td>26 31t</td>
500 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified
501 below in "<code>fill-array-data</code> Format")</i></td>
502 <td><code>A:</code> array reference (8 bits)<br/>
503 <code>B:</code> signed "branch" offset to table data pseudo-instruction
504 (32 bits)
505 </td>
506 <td>Fill the given array with the indicated data. The reference must be
507 to an array of primitives, and the data table must match it in type and
508 must contain no more elements than will fit in the array. That is,
509 the array may be larger than the table, and if so, only the initial
510 elements of the array are set, leaving the remainder alone.
511 </td>
512</tr>
513<tr>
514 <td>27 11x</td>
515 <td>throw vAA</td>
516 <td><code>A:</code> exception-bearing register (8 bits)<br/></td>
517 <td>Throw the indicated exception.</td>
518</tr>
519<tr>
520 <td>28 10t</td>
521 <td>goto +AA</td>
522 <td><code>A:</code> signed branch offset (8 bits)</td>
523 <td>Unconditionally jump to the indicated instruction.
524 <p><b>Note:</b>
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]525 The branch offset must not be <code>0</code>. (A spin
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]526 loop may be legally constructed either with <code>goto/32</code> or
527 by including a <code>nop</code> as a target before the branch.)</p>
528 </td>
529</tr>
530<tr>
531 <td>29 20t</td>
532 <td>goto/16 +AAAA</td>
533 <td><code>A:</code> signed branch offset (16 bits)<br/></td>
534 <td>Unconditionally jump to the indicated instruction.
535 <p><b>Note:</b>
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]536 The branch offset must not be <code>0</code>. (A spin
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]537 loop may be legally constructed either with <code>goto/32</code> or
538 by including a <code>nop</code> as a target before the branch.)</p>
539 </td>
540</tr>
541<tr>
542 <td>2a 30t</td>
543 <td>goto/32 +AAAAAAAA</td>
544 <td><code>A:</code> signed branch offset (32 bits)<br/></td>
545 <td>Unconditionally jump to the indicated instruction.</td>
546</tr>
547<tr>
548 <td>2b 31t</td>
549 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as
550 specified below in "<code>packed-switch</code> Format")</i></td>
551 <td><code>A:</code> register to test<br/>
552 <code>B:</code> signed "branch" offset to table data pseudo-instruction
553 (32 bits)
554 </td>
555 <td>Jump to a new instruction based on the value in the
556 given register, using a table of offsets corresponding to each value
557 in a particular integral range, or fall through to the next
558 instruction if there is no match.
559 </td>
560</tr>
561<tr>
562 <td>2c 31t</td>
563 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
564 specified below in "<code>sparse-switch</code> Format")</i></td>
565 <td><code>A:</code> register to test<br/>
566 <code>B:</code> signed "branch" offset to table data pseudo-instruction
567 (32 bits)
568 </td>
569 <td>Jump to a new instruction based on the value in the given
570 register, using an ordered table of value-offset pairs, or fall
571 through to the next instruction if there is no match.
572 </td>
573</tr>
574<tr>
575 <td>2d..31 23x</td>
576 <td>cmp<i>kind</i> vAA, vBB, vCC<br/>
577 2d: cmpl-float <i>(lt bias)</i><br/>
578 2e: cmpg-float <i>(gt bias)</i><br/>
579 2f: cmpl-double <i>(lt bias)</i><br/>
580 30: cmpg-double <i>(gt bias)</i><br/>
581 31: cmp-long
582 </td>
583 <td><code>A:</code> destination register (8 bits)<br/>
584 <code>B:</code> first source register or pair<br/>
585 <code>C:</code> second source register or pair</td>
586 <td>Perform the indicated floating point or <code>long</code> comparison,
587 storing <code>0</code> if the two arguments are equal, <code>1</code>
588 if the second argument is larger, or <code>-1</code> if the first
589 argument is larger. The "bias" listed for the floating point operations
590 indicates how <code>NaN</code> comparisons are treated: "Gt bias"
591 instructions return <code>1</code> for <code>NaN</code> comparisons,
592 and "lt bias" instructions return
593 <code>-1</code>.
594 <p>For example, to check to see if floating point
595 <code>a &lt; b</code>, then it is advisable to use
596 <code>cmpg-float</code>; a result of <code>-1</code> indicates that
597 the test was true, and the other values indicate it was false either
598 due to a valid comparison or because one or the other values was
599 <code>NaN</code>.</p>
600 </td>
601</tr>
602<tr>
603 <td>32..37 22t</td>
604 <td>if-<i>test</i> vA, vB, +CCCC<br/>
605 32: if-eq<br/>
606 33: if-ne<br/>
607 34: if-lt<br/>
608 35: if-ge<br/>
609 36: if-gt<br/>
610 37: if-le<br/>
611 </td>
612 <td><code>A:</code> first register to test (4 bits)<br/>
613 <code>B:</code> second register to test (4 bits)<br/>
614 <code>C:</code> signed branch offset (16 bits)</td>
615 <td>Branch to the given destination if the given two registers' values
616 compare as specified.
617 <p><b>Note:</b>
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]618 The branch offset must not be <code>0</code>. (A spin
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]619 loop may be legally constructed either by branching around a
620 backward <code>goto</code> or by including a <code>nop</code> as
621 a target before the branch.)</p>
622 </td>
623</tr>
624<tr>
625 <td>38..3d 21t</td>
626 <td>if-<i>test</i>z vAA, +BBBB<br/>
627 38: if-eqz<br/>
628 39: if-nez<br/>
629 3a: if-ltz<br/>
630 3b: if-gez<br/>
631 3c: if-gtz<br/>
632 3d: if-lez<br/>
633 </td>
634 <td><code>A:</code> register to test (8 bits)<br/>
635 <code>B:</code> signed branch offset (16 bits)</td>
636 <td>Branch to the given destination if the given register's value compares
637 with 0 as specified.
638 <p><b>Note:</b>
Dan Bornstein11834962010-02-24 10:54:08 -0800[diff] [blame]639 The branch offset must not be <code>0</code>. (A spin
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]640 loop may be legally constructed either by branching around a
641 backward <code>goto</code> or by including a <code>nop</code> as
642 a target before the branch.)</p>
643 </td>
644</tr>
645<tr>
646 <td>3e..43 10x</td>
647 <td><i>(unused)</i></td>
648 <td>&nbsp;</td>
649 <td><i>(unused)</i></td>
650</tr>
651<tr>
652 <td>44..51 23x</td>
653 <td><i>arrayop</i> vAA, vBB, vCC<br/>
654 44: aget<br/>
655 45: aget-wide<br/>
656 46: aget-object<br/>
657 47: aget-boolean<br/>
658 48: aget-byte<br/>
659 49: aget-char<br/>
660 4a: aget-short<br/>
661 4b: aput<br/>
662 4c: aput-wide<br/>
663 4d: aput-object<br/>
664 4e: aput-boolean<br/>
665 4f: aput-byte<br/>
666 50: aput-char<br/>
667 51: aput-short
668 </td>
669 <td><code>A:</code> value register or pair; may be source or dest
670 (8 bits)<br/>
671 <code>B:</code> array register (8 bits)<br/>
672 <code>C:</code> index register (8 bits)</td>
673 <td>Perform the identified array operation at the identified index of
674 the given array, loading or storing into the value register.</td>
675</tr>
676<tr>
677 <td>52..5f 22c</td>
678 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
679 52: iget<br/>
680 53: iget-wide<br/>
681 54: iget-object<br/>
682 55: iget-boolean<br/>
683 56: iget-byte<br/>
684 57: iget-char<br/>
685 58: iget-short<br/>
686 59: iput<br/>
687 5a: iput-wide<br/>
688 5b: iput-object<br/>
689 5c: iput-boolean<br/>
690 5d: iput-byte<br/>
691 5e: iput-char<br/>
692 5f: iput-short
693 </td>
694 <td><code>A:</code> value register or pair; may be source or dest
695 (4 bits)<br/>
696 <code>B:</code> object register (4 bits)<br/>
697 <code>C:</code> instance field reference index (16 bits)</td>
698 <td>Perform the identified object instance field operation with
699 the identified field, loading or storing into the value register.
700 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
701 altering the field argument to be a more direct offset.</p>
702 </td>
703</tr>
704<tr>
705 <td>60..6d 21c</td>
706 <td>s<i>staticop</i> vAA, field@BBBB<br/>
707 60: sget<br/>
708 61: sget-wide<br/>
709 62: sget-object<br/>
710 63: sget-boolean<br/>
711 64: sget-byte<br/>
712 65: sget-char<br/>
713 66: sget-short<br/>
714 67: sput<br/>
715 68: sput-wide<br/>
716 69: sput-object<br/>
717 6a: sput-boolean<br/>
718 6b: sput-byte<br/>
719 6c: sput-char<br/>
720 6d: sput-short
721 </td>
722 <td><code>A:</code> value register or pair; may be source or dest
723 (8 bits)<br/>
724 <code>B:</code> static field reference index (16 bits)</td>
725 <td>Perform the identified object static field operation with the identified
726 static field, loading or storing into the value register.
727 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
728 altering the field argument to be a more direct offset.</p>
729 </td>
730</tr>
731<tr>
732 <td>6e..72 35c</td>
733 <td>invoke-<i>kind</i> {vD, vE, vF, vG, vA}, meth@CCCC<br/>
734 6e: invoke-virtual<br/>
735 6f: invoke-super<br/>
736 70: invoke-direct<br/>
737 71: invoke-static<br/>
738 72: invoke-interface
739 </td>
740 <td><code>B:</code> argument word count (4 bits)<br/>
Dan Bornstein7f01b332010-10-20 17:32:39 -0700[diff] [blame]741 <code>C:</code> method reference index (16 bits)<br/>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]742 <code>D..G, A:</code> argument registers (4 bits each)</td>
743 <td>Call the indicated method. The result (if any) may be stored
744 with an appropriate <code>move-result*</code> variant as the immediately
745 subsequent instruction.
746 <p><code>invoke-virtual</code> is used to invoke a normal virtual
Dan Bornstein9be25d02010-10-10 12:29:07 -0700[diff] [blame]747 method (a method that is not <code>private</code>, <code>static</code>,
748 or <code>final</code>, and is also not a constructor).</p>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]749 <p><code>invoke-super</code> is used to invoke the closest superclass's
750 virtual method (as opposed to the one with the same <code>method_id</code>
Dan Bornstein9be25d02010-10-10 12:29:07 -0700[diff] [blame]751 in the calling class). The same method restrictions hold as for
752 <code>invoke-virtual</code>.</p>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]753 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code>
754 direct method (that is, an instance method that is by its nature
755 non-overridable, namely either a <code>private</code> instance method
756 or a constructor).</p>
757 <p><code>invoke-static</code> is used to invoke a <code>static</code>
758 method (which is always considered a direct method).</p>
759 <p><code>invoke-interface</code> is used to invoke an
760 <code>interface</code> method, that is, on an object whose concrete
761 class isn't known, using a <code>method_id</code> that refers to
762 an <code>interface</code>.</p>
763 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
764 altering the method argument to be a more direct offset
765 (or pair thereof).</p>
766 </td>
767</tr>
768<tr>
769 <td>73 10x</td>
770 <td><i>(unused)</i></td>
771 <td>&nbsp;</td>
772 <td><i>(unused)</i></td>
773</tr>
774<tr>
775 <td>74..78 3rc</td>
776 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/>
777 74: invoke-virtual/range<br/>
778 75: invoke-super/range<br/>
779 76: invoke-direct/range<br/>
780 77: invoke-static/range<br/>
781 78: invoke-interface/range
782 </td>
783 <td><code>A:</code> argument word count (8 bits)<br/>
Dan Bornstein7f01b332010-10-20 17:32:39 -0700[diff] [blame]784 <code>B:</code> method reference index (16 bits)<br/>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]785 <code>C:</code> first argument register (16 bits)<br/>
786 <code>N = A + C - 1</code></td>
787 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
788 description above for details, caveats, and suggestions.
789 </td>
790</tr>
791<tr>
792 <td>79..7a 10x</td>
793 <td><i>(unused)</i></td>
794 <td>&nbsp;</td>
795 <td><i>(unused)</i></td>
796</tr>
797<tr>
798 <td>7b..8f 12x</td>
799 <td><i>unop</i> vA, vB<br/>
800 7b: neg-int<br/>
801 7c: not-int<br/>
802 7d: neg-long<br/>
803 7e: not-long<br/>
804 7f: neg-float<br/>
805 80: neg-double<br/>
806 81: int-to-long<br/>
807 82: int-to-float<br/>
808 83: int-to-double<br/>
809 84: long-to-int<br/>
810 85: long-to-float<br/>
811 86: long-to-double<br/>
812 87: float-to-int<br/>
813 88: float-to-long<br/>
814 89: float-to-double<br/>
815 8a: double-to-int<br/>
816 8b: double-to-long<br/>
817 8c: double-to-float<br/>
818 8d: int-to-byte<br/>
819 8e: int-to-char<br/>
820 8f: int-to-short
821 </td>
822 <td><code>A:</code> destination register or pair (4 bits)<br/>
823 <code>B:</code> source register or pair (4 bits)</td>
824 <td>Perform the identified unary operation on the source register,
825 storing the result in the destination register.</td>
826</tr>
827
828<tr>
829 <td>90..af 23x</td>
830 <td><i>binop</i> vAA, vBB, vCC<br/>
831 90: add-int<br/>
832 91: sub-int<br/>
833 92: mul-int<br/>
834 93: div-int<br/>
835 94: rem-int<br/>
836 95: and-int<br/>
837 96: or-int<br/>
838 97: xor-int<br/>
839 98: shl-int<br/>
840 99: shr-int<br/>
841 9a: ushr-int<br/>
842 9b: add-long<br/>
843 9c: sub-long<br/>
844 9d: mul-long<br/>
845 9e: div-long<br/>
846 9f: rem-long<br/>
847 a0: and-long<br/>
848 a1: or-long<br/>
849 a2: xor-long<br/>
850 a3: shl-long<br/>
851 a4: shr-long<br/>
852 a5: ushr-long<br/>
853 a6: add-float<br/>
854 a7: sub-float<br/>
855 a8: mul-float<br/>
856 a9: div-float<br/>
857 aa: rem-float<br/>
858 ab: add-double<br/>
859 ac: sub-double<br/>
860 ad: mul-double<br/>
861 ae: div-double<br/>
862 af: rem-double
863 </td>
864 <td><code>A:</code> destination register or pair (8 bits)<br/>
865 <code>B:</code> first source register or pair (8 bits)<br/>
866 <code>C:</code> second source register or pair (8 bits)</td>
867 <td>Perform the identified binary operation on the two source registers,
868 storing the result in the first source register.</td>
869</tr>
870<tr>
871 <td>b0..cf 12x</td>
872 <td><i>binop</i>/2addr vA, vB<br/>
873 b0: add-int/2addr<br/>
874 b1: sub-int/2addr<br/>
875 b2: mul-int/2addr<br/>
876 b3: div-int/2addr<br/>
877 b4: rem-int/2addr<br/>
878 b5: and-int/2addr<br/>
879 b6: or-int/2addr<br/>
880 b7: xor-int/2addr<br/>
881 b8: shl-int/2addr<br/>
882 b9: shr-int/2addr<br/>
883 ba: ushr-int/2addr<br/>
884 bb: add-long/2addr<br/>
885 bc: sub-long/2addr<br/>
886 bd: mul-long/2addr<br/>
887 be: div-long/2addr<br/>
888 bf: rem-long/2addr<br/>
889 c0: and-long/2addr<br/>
890 c1: or-long/2addr<br/>
891 c2: xor-long/2addr<br/>
892 c3: shl-long/2addr<br/>
893 c4: shr-long/2addr<br/>
894 c5: ushr-long/2addr<br/>
895 c6: add-float/2addr<br/>
896 c7: sub-float/2addr<br/>
897 c8: mul-float/2addr<br/>
898 c9: div-float/2addr<br/>
899 ca: rem-float/2addr<br/>
900 cb: add-double/2addr<br/>
901 cc: sub-double/2addr<br/>
902 cd: mul-double/2addr<br/>
903 ce: div-double/2addr<br/>
904 cf: rem-double/2addr
905 </td>
906 <td><code>A:</code> destination and first source register or pair
907 (4 bits)<br/>
908 <code>B:</code> second source register or pair (4 bits)</td>
909 <td>Perform the identified binary operation on the two source registers,
910 storing the result in the first source register.</td>
911</tr>
912<tr>
913 <td>d0..d7 22s</td>
914 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/>
915 d0: add-int/lit16<br/>
916 d1: rsub-int (reverse subtract)<br/>
917 d2: mul-int/lit16<br/>
918 d3: div-int/lit16<br/>
919 d4: rem-int/lit16<br/>
920 d5: and-int/lit16<br/>
921 d6: or-int/lit16<br/>
922 d7: xor-int/lit16
923 </td>
924 <td><code>A:</code> destination register (4 bits)<br/>
925 <code>B:</code> source register (4 bits)<br/>
926 <code>C:</code> signed int constant (16 bits)</td>
927 <td>Perform the indicated binary op on the indicated register (first
928 argument) and literal value (second argument), storing the result in
929 the destination register.
930 <p><b>Note:</b>
931 <code>rsub-int</code> does not have a suffix since this version is the
932 main opcode of its family. Also, see below for details on its semantics.
933 </p>
934 </td>
935</tr>
936<tr>
937 <td>d8..e2 22b</td>
938 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/>
939 d8: add-int/lit8<br/>
940 d9: rsub-int/lit8<br/>
941 da: mul-int/lit8<br/>
942 db: div-int/lit8<br/>
943 dc: rem-int/lit8<br/>
944 dd: and-int/lit8<br/>
945 de: or-int/lit8<br/>
946 df: xor-int/lit8<br/>
947 e0: shl-int/lit8<br/>
948 e1: shr-int/lit8<br/>
949 e2: ushr-int/lit8
950 </td>
951 <td><code>A:</code> destination register (8 bits)<br/>
952 <code>B:</code> source register (8 bits)<br/>
953 <code>C:</code> signed int constant (8 bits)</td>
954 <td>Perform the indicated binary op on the indicated register (first
955 argument) and literal value (second argument), storing the result
956 in the destination register.
957 <p><b>Note:</b> See below for details on the semantics of
958 <code>rsub-int</code>.</p>
959 </td>
960</tr>
961<tr>
Dan Bornstein7f01b332010-10-20 17:32:39 -0700[diff] [blame]962 <td>e3..fe 10x</td>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]963 <td><i>(unused)</i></td>
964 <td>&nbsp;</td>
965 <td><i>(unused)</i></td>
966</tr>
Dan Bornstein7f01b332010-10-20 17:32:39 -0700[diff] [blame]967<tr>
968 <td>ff -</td>
969 <td><i>(expanded opcode)</i></td>
970 <td>&nbsp;</td>
971 <td>An <code>ff</code> in the primary opcode position indicates that there
972 is a secondary opcode in the high-order byte of the opcode code unit,
973 as opposed to an argument value. These expanded opcodes are detailed
974 immediately below.
975 </td>
976</tr>
977<tr>
978 <td>00ff 41c</td>
979 <td>check-cast/jumbo vBBBB, type@AAAAAAAA</td>
980 <td><code>A:</code> type index (32 bits)<br/>
981 <code>B:</code> reference-bearing register (16 bits)
982 </td>
983 <td>Throw a <code>ClassCastException</code> if the reference in the
984 given register cannot be cast to the indicated type. See
985 <code>check-cast</code> description above for details,
986 caveats, and suggestions.
987 </td>
988</tr>
989<tr>
990 <td>01ff 52c</td>
991 <td>instance-of/jumbo vBBBB, vCCCC, type@AAAAAAAA</td>
992 <td><code>A:</code> type index (32 bits)<br/>
993 <code>B:</code> destination register (16 bits)<br/>
994 <code>C:</code> reference-bearing register (16 bits)
995 </td>
996 <td>Store in the given destination register <code>1</code>
997 if the indicated reference is an instance of the given type,
998 or <code>0</code> if not. See
999 <code>instance-of</code> description above for details,
1000 caveats, and suggestions.
1001 </td>
1002</tr>
1003<tr>
1004 <td>02ff 41c</td>
1005 <td>new-instance/jumbo vBBBB, type@AAAAAAAA</td>
1006 <td><code>A:</code> type index (32 bits)<br/>
1007 <code>B:</code> destination register (16 bits)
1008 </td>
1009 <td>Construct a new instance of the indicated type. See
1010 <code>new-instance</code> description above for details,
1011 caveats, and suggestions.
1012 </td>
1013</tr>
1014<tr>
1015 <td>03ff 52c</td>
1016 <td>new-array/jumbo vBBBB, vCCCC, type@AAAAAAAA</td>
1017 <td><code>A:</code> type index (32 bits)<br/>
1018 <code>B:</code> destination register (16 bits)<br/>
1019 <code>C:</code> size register (16 bits)
1020 </td>
1021 <td>Construct a new array of the indicated type and size. See
1022 <code>new-array</code> description above for details,
1023 caveats, and suggestions.
1024 </td>
1025</tr>
1026<tr>
1027 <td>04ff 5rc</td>
1028 <td>filled-new-array/jumbo {vCCCC .. vNNNN}, type@AAAAAAAA</td>
1029 <td><code>A:</code> type index (32 bits)<br/>
1030 <code>B:</code> array size and argument word count (16 bits)<br/>
1031 <code>C:</code> first argument register (16 bits)<br/>
1032 <code>N = B + C - 1</code>
1033 </td>
1034 <td>Construct an array of the given type and size, filling it with the
1035 supplied contents. See first
1036 <code>filled-new-array</code> description above for details,
1037 caveats, and suggestions.
1038 </td>
1039</tr>
1040<tr>
1041 <td>05ff..12ff 52c</td>
1042 <td>i<i>instanceop</i> vBBBB, vCCCC, field@AAAAAAAA<br/>
1043 05ff: iget/jumbo<br/>
1044 06ff: iget-wide/jumbo<br/>
1045 07ff: iget-object/jumbo<br/>
1046 08ff: iget-boolean/jumbo<br/>
1047 09ff: iget-byte/jumbo<br/>
1048 0aff: iget-char/jumbo<br/>
1049 0bff: iget-short/jumbo<br/>
1050 0cff: iput/jumbo<br/>
1051 0dff: iput-wide/jumbo<br/>
1052 0eff: iput-object/jumbo<br/>
1053 0fff: iput-boolean/jumbo<br/>
1054 10ff: iput-byte/jumbo<br/>
1055 11ff: iput-char/jumbo<br/>
1056 12ff: iput-short/jumbo
1057 </td>
1058 <td><code>A:</code> instance field reference index (32 bits)<br/>
1059 <code>B:</code> value register or pair; may be source or dest
1060 (16 bits)<br/>
1061 <code>C:</code> object register (16 bits)
1062 </td>
1063 <td>Perform the identified object instance field operation. See
1064 <code>i<i>instanceop</i></code> description above for details,
1065 caveats, and suggestions.
1066 </td>
1067</tr>
1068<tr>
1069 <td>13ff..20ff 41c</td>
1070 <td>s<i>staticop</i> vBBBB, field@AAAAAAAA<br/>
1071 13ff: sget/jumbo<br/>
1072 14ff: sget-wide/jumbo<br/>
1073 15ff: sget-object/jumbo<br/>
1074 16ff: sget-boolean/jumbo<br/>
1075 17ff: sget-byte/jumbo<br/>
1076 18ff: sget-char/jumbo<br/>
1077 19ff: sget-short/jumbo<br/>
1078 1aff: sput/jumbo<br/>
1079 1bff: sput-wide/jumbo<br/>
1080 1cff: sput-object/jumbo<br/>
1081 1dff: sput-boolean/jumbo<br/>
1082 1eff: sput-byte/jumbo<br/>
1083 1fff: sput-char/jumbo<br/>
1084 20ff: sput-short/jumbo
1085 </td>
1086 <td><code>A:</code> instance field reference index (32 bits)<br/>
1087 <code>B:</code> value register or pair; may be source or dest
1088 (16 bits)
1089 </td>
1090 <td>Perform the identified object static field operation. See
1091 <code>s<i>staticop</i></code> description above for details,
1092 caveats, and suggestions.
1093 </td>
1094</tr>
1095<tr>
1096 <td>21ff..25ff 5rc</td>
1097 <td>invoke-<i>kind</i>/jumbo {vCCCC .. vNNNN}, meth@AAAAAAAA<br/>
1098 21ff: invoke-virtual/jumbo<br/>
1099 22ff: invoke-super/jumbo<br/>
1100 23ff: invoke-direct/jumbo<br/>
1101 24ff: invoke-static/jumbo<br/>
1102 25ff: invoke-interface/jumbo
1103 </td>
1104 <td><code>A:</code> method reference index (32 bits)<br/>
1105 <code>B:</code> argument word count (16 bits)<br/>
1106 <code>C:</code> first argument register (16 bits)<br/>
1107 <code>N = B + C - 1</code>
1108 </td>
1109 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
1110 description above for details, caveats, and suggestions.
1111 </td>
1112</tr>
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]1113</tbody>
1114</table>
1115
1116<h2><code>packed-switch</code> Format</h2>
1117
1118<table class="supplement">
1119<thead>
1120<tr>
1121 <th>Name</th>
1122 <th>Format</th>
1123 <th>Description</th>
1124</tr>
1125</thead>
1126<tbody>
1127<tr>
1128 <td>ident</td>
1129 <td>ushort = 0x0100</td>
1130 <td>identifying pseudo-opcode</td>
1131</tr>
1132<tr>
1133 <td>size</td>
1134 <td>ushort</td>
1135 <td>number of entries in the table</td>
1136</tr>
1137<tr>
1138 <td>first_key</td>
1139 <td>int</td>
1140 <td>first (and lowest) switch case value</td>
1141</tr>
1142<tr>
1143 <td>targets</td>
1144 <td>int[]</td>
1145 <td>list of <code>size</code> relative branch targets. The targets are
1146 relative to the address of the switch opcode, not of this table.
1147 </td>
1148</tr>
1149</tbody>
1150</table>
1151
1152<p><b>Note:</b> The total number of code units for an instance of this
1153table is <code>(size * 2) + 4</code>.</p>
1154
1155<h2><code>sparse-switch</code> Format</h2>
1156
1157<table class="supplement">
1158<thead>
1159<tr>
1160 <th>Name</th>
1161 <th>Format</th>
1162 <th>Description</th>
1163</tr>
1164</thead>
1165<tbody>
1166<tr>
1167 <td>ident</td>
1168 <td>ushort = 0x0200</td>
1169 <td>identifying pseudo-opcode</td>
1170</tr>
1171<tr>
1172 <td>size</td>
1173 <td>ushort</td>
1174 <td>number of entries in the table</td>
1175</tr>
1176<tr>
1177 <td>keys</td>
1178 <td>int[]</td>
1179 <td>list of <code>size</code> key values, sorted low-to-high</td>
1180</tr>
1181<tr>
1182 <td>targets</td>
1183 <td>int[]</td>
1184 <td>list of <code>size</code> relative branch targets, each corresponding
1185 to the key value at the same index. The targets are
1186 relative to the address of the switch opcode, not of this table.
1187 </td>
1188</tr>
1189</tbody>
1190</table>
1191
1192<p><b>Note:</b> The total number of code units for an instance of this
1193table is <code>(size * 4) + 2</code>.</p>
1194
1195<h2><code>fill-array-data</code> Format</h2>
1196
1197<table class="supplement">
1198<thead>
1199<tr>
1200 <th>Name</th>
1201 <th>Format</th>
1202 <th>Description</th>
1203</tr>
1204</thead>
1205<tbody>
1206<tr>
1207 <td>ident</td>
1208 <td>ushort = 0x0300</td>
1209 <td>identifying pseudo-opcode</td>
1210</tr>
1211<tr>
1212 <td>element_width</td>
1213 <td>ushort</td>
1214 <td>number of bytes in each element</td>
1215</tr>
1216<tr>
1217 <td>size</td>
1218 <td>uint</td>
1219 <td>number of elements in the table</td>
1220</tr>
1221<tr>
1222 <td>data</td>
1223 <td>ubyte[]</td>
1224 <td>data values</td>
1225</tr>
1226</tbody>
1227</table>
1228
1229<p><b>Note:</b> The total number of code units for an instance of this
1230table is <code>(size * element_width + 1) / 2 + 4</code>.</p>
1231
1232
1233<h2>Mathematical Operation Details</h2>
1234
1235<p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using
1236round-to-nearest and gradual underflow, except where stated otherwise.</p>
1237
1238<table class="math">
1239<thead>
1240<tr>
1241 <th>Opcode</th>
1242 <th>C Semantics</th>
1243 <th>Notes</th>
1244</tr>
1245</thead>
1246<tbody>
1247<tr>
1248 <td>neg-int</td>
1249 <td>int32 a;<br/>
1250 int32 result = -a;
1251 </td>
1252 <td>Unary twos-complement.</td>
1253</tr>
1254<tr>
1255 <td>not-int</td>
1256 <td>int32 a;<br/>
1257 int32 result = ~a;
1258 </td>
1259 <td>Unary ones-complement.</td>
1260</tr>
1261<tr>
1262 <td>neg-long</td>
1263 <td>int64 a;<br/>
1264 int64 result = -a;
1265 </td>
1266 <td>Unary twos-complement.</td>
1267</tr>
1268<tr>
1269 <td>not-long</td>
1270 <td>int64 a;<br/>
1271 int64 result = ~a;
1272 </td>
1273 <td>Unary ones-complement.</td>
1274</tr>
1275<tr>
1276 <td>neg-float</td>
1277 <td>float a;<br/>
1278 float result = -a;
1279 </td>
1280 <td>Floating point negation.</td>
1281</tr>
1282<tr>
1283 <td>neg-double</td>
1284 <td>double a;<br/>
1285 double result = -a;
1286 </td>
1287 <td>Floating point negation.</td>
1288</tr>
1289<tr>
1290 <td>int-to-long</td>
1291 <td>int32 a;<br/>
1292 int64 result = (int64) a;
1293 </td>
1294 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td>
1295</tr>
1296<tr>
1297 <td>int-to-float</td>
1298 <td>int32 a;<br/>
1299 float result = (float) a;
1300 </td>
1301 <td>Conversion of <code>int32</code> to <code>float</code>, using
1302 round-to-nearest. This loses precision for some values.
1303 </td>
1304</tr>
1305<tr>
1306 <td>int-to-double</td>
1307 <td>int32 a;<br/>
1308 double result = (double) a;
1309 </td>
1310 <td>Conversion of <code>int32</code> to <code>double</code>.</td>
1311</tr>
1312<tr>
1313 <td>long-to-int</td>
1314 <td>int64 a;<br/>
1315 int32 result = (int32) a;
1316 </td>
1317 <td>Truncation of <code>int64</code> into <code>int32</code>.</td>
1318</tr>
1319<tr>
1320 <td>long-to-float</td>
1321 <td>int64 a;<br/>
1322 float result = (float) a;
1323 </td>
1324 <td>Conversion of <code>int64</code> to <code>float</code>, using
1325 round-to-nearest. This loses precision for some values.
1326 </td>
1327</tr>
1328<tr>
1329 <td>long-to-double</td>
1330 <td>int64 a;<br/>
1331 double result = (double) a;
1332 </td>
1333 <td>Conversion of <code>int64</code> to <code>double</code>, using
1334 round-to-nearest. This loses precision for some values.
1335 </td>
1336</tr>
1337<tr>
1338 <td>float-to-int</td>
1339 <td>float a;<br/>
1340 int32 result = (int32) a;
1341 </td>
1342 <td>Conversion of <code>float</code> to <code>int32</code>, using
1343 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero)
1344 convert to the integer <code>0</code>. Infinities and values with
1345 too large a magnitude to be represented get converted to either
1346 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign.
1347 </td>
1348</tr>
1349<tr>
1350 <td>float-to-long</td>
1351 <td>float a;<br/>
1352 int64 result = (int64) a;
1353 </td>
1354 <td>Conversion of <code>float</code> to <code>int64</code>, using
1355 round-toward-zero. The same special case rules as for
1356 <code>float-to-int</code> apply here, except that out-of-range values
1357 get converted to either <code>0x7fffffffffffffff</code> or
1358 <code>-0x8000000000000000</code> depending on sign.
1359 </td>
1360</tr>
1361<tr>
1362 <td>float-to-double</td>
1363 <td>float a;<br/>
1364 double result = (double) a;
1365 </td>
1366 <td>Conversion of <code>float</code> to <code>double</code>, preserving
1367 the value exactly.
1368 </td>
1369</tr>
1370<tr>
1371 <td>double-to-int</td>
1372 <td>double a;<br/>
1373 int32 result = (int32) a;
1374 </td>
1375 <td>Conversion of <code>double</code> to <code>int32</code>, using
1376 round-toward-zero. The same special case rules as for
1377 <code>float-to-int</code> apply here.
1378 </td>
1379</tr>
1380<tr>
1381 <td>double-to-long</td>
1382 <td>double a;<br/>
1383 int64 result = (int64) a;
1384 </td>
1385 <td>Conversion of <code>double</code> to <code>int64</code>, using
1386 round-toward-zero. The same special case rules as for
1387 <code>float-to-long</code> apply here.
1388 </td>
1389</tr>
1390<tr>
1391 <td>double-to-float</td>
1392 <td>double a;<br/>
1393 float result = (float) a;
1394 </td>
1395 <td>Conversion of <code>double</code> to <code>float</code>, using
1396 round-to-nearest. This loses precision for some values.
1397 </td>
1398</tr>
1399<tr>
1400 <td>int-to-byte</td>
1401 <td>int32 a;<br/>
1402 int32 result = (a &lt;&lt; 24) &gt;&gt; 24;
1403 </td>
1404 <td>Truncation of <code>int32</code> to <code>int8</code>, sign
1405 extending the result.
1406 </td>
1407</tr>
1408<tr>
1409 <td>int-to-char</td>
1410 <td>int32 a;<br/>
1411 int32 result = a &amp; 0xffff;
1412 </td>
1413 <td>Truncation of <code>int32</code> to <code>uint16</code>, without
1414 sign extension.
1415 </td>
1416</tr>
1417<tr>
1418 <td>int-to-short</td>
1419 <td>int32 a;<br/>
1420 int32 result = (a &lt;&lt; 16) &gt;&gt; 16;
1421 </td>
1422 <td>Truncation of <code>int32</code> to <code>int16</code>, sign
1423 extending the result.
1424 </td>
1425</tr>
1426<tr>
1427 <td>add-int</td>
1428 <td>int32 a, b;<br/>
1429 int32 result = a + b;
1430 </td>
1431 <td>Twos-complement addition.</td>
1432</tr>
1433<tr>
1434 <td>sub-int</td>
1435 <td>int32 a, b;<br/>
1436 int32 result = a - b;
1437 </td>
1438 <td>Twos-complement subtraction.</td>
1439</tr>
1440<tr>
1441 <td>rsub-int</td>
1442 <td>int32 a, b;<br/>
1443 int32 result = b - a;
1444 </td>
1445 <td>Twos-complement reverse subtraction.</td>
1446</tr>
1447<tr>
1448 <td>mul-int</td>
1449 <td>int32 a, b;<br/>
1450 int32 result = a * b;
1451 </td>
1452 <td>Twos-complement multiplication.</td>
1453</tr>
1454<tr>
1455 <td>div-int</td>
1456 <td>int32 a, b;<br/>
1457 int32 result = a / b;
1458 </td>
1459 <td>Twos-complement division, rounded towards zero (that is, truncated to
1460 integer). This throws <code>ArithmeticException</code> if
1461 <code>b == 0</code>.
1462 </td>
1463</tr>
1464<tr>
1465 <td>rem-int</td>
1466 <td>int32 a, b;<br/>
1467 int32 result = a % b;
1468 </td>
1469 <td>Twos-complement remainder after division. The sign of the result
1470 is the same as that of <code>a</code>, and it is more precisely
1471 defined as <code>result == a - (a / b) * b</code>. This throws
1472 <code>ArithmeticException</code> if <code>b == 0</code>.
1473 </td>
1474</tr>
1475<tr>
1476 <td>and-int</td>
1477 <td>int32 a, b;<br/>
1478 int32 result = a &amp; b;
1479 </td>
1480 <td>Bitwise AND.</td>
1481</tr>
1482<tr>
1483 <td>or-int</td>
1484 <td>int32 a, b;<br/>
1485 int32 result = a | b;
1486 </td>
1487 <td>Bitwise OR.</td>
1488</tr>
1489<tr>
1490 <td>xor-int</td>
1491 <td>int32 a, b;<br/>
1492 int32 result = a ^ b;
1493 </td>
1494 <td>Bitwise XOR.</td>
1495</tr>
1496<tr>
1497 <td>shl-int</td>
1498 <td>int32 a, b;<br/>
1499 int32 result = a &lt;&lt; (b &amp; 0x1f);
1500 </td>
1501 <td>Bitwise shift left (with masked argument).</td>
1502</tr>
1503<tr>
1504 <td>shr-int</td>
1505 <td>int32 a, b;<br/>
1506 int32 result = a &gt;&gt; (b &amp; 0x1f);
1507 </td>
1508 <td>Bitwise signed shift right (with masked argument).</td>
1509</tr>
1510<tr>
1511 <td>ushr-int</td>
1512 <td>uint32 a, b;<br/>
1513 int32 result = a &gt;&gt; (b &amp; 0x1f);
1514 </td>
1515 <td>Bitwise unsigned shift right (with masked argument).</td>
1516</tr>
1517<tr>
1518 <td>add-long</td>
1519 <td>int64 a, b;<br/>
1520 int64 result = a + b;
1521 </td>
1522 <td>Twos-complement addition.</td>
1523</tr>
1524<tr>
1525 <td>sub-long</td>
1526 <td>int64 a, b;<br/>
1527 int64 result = a - b;
1528 </td>
1529 <td>Twos-complement subtraction.</td>
1530</tr>
1531<tr>
1532 <td>mul-long</td>
1533 <td>int64 a, b;<br/>
1534 int64 result = a * b;
1535 </td>
1536 <td>Twos-complement multiplication.</td>
1537</tr>
1538<tr>
1539 <td>div-long</td>
1540 <td>int64 a, b;<br/>
1541 int64 result = a / b;
1542 </td>
1543 <td>Twos-complement division, rounded towards zero (that is, truncated to
1544 integer). This throws <code>ArithmeticException</code> if
1545 <code>b == 0</code>.
1546 </td>
1547</tr>
1548<tr>
1549 <td>rem-long</td>
1550 <td>int64 a, b;<br/>
1551 int64 result = a % b;
1552 </td>
1553 <td>Twos-complement remainder after division. The sign of the result
1554 is the same as that of <code>a</code>, and it is more precisely
1555 defined as <code>result == a - (a / b) * b</code>. This throws
1556 <code>ArithmeticException</code> if <code>b == 0</code>.
1557 </td>
1558</tr>
1559<tr>
1560 <td>and-long</td>
1561 <td>int64 a, b;<br/>
1562 int64 result = a &amp; b;
1563 </td>
1564 <td>Bitwise AND.</td>
1565</tr>
1566<tr>
1567 <td>or-long</td>
1568 <td>int64 a, b;<br/>
1569 int64 result = a | b;
1570 </td>
1571 <td>Bitwise OR.</td>
1572</tr>
1573<tr>
1574 <td>xor-long</td>
1575 <td>int64 a, b;<br/>
1576 int64 result = a ^ b;
1577 </td>
1578 <td>Bitwise XOR.</td>
1579</tr>
1580<tr>
1581 <td>shl-long</td>
1582 <td>int64 a, b;<br/>
1583 int64 result = a &lt;&lt; (b &amp; 0x3f);
1584 </td>
1585 <td>Bitwise shift left (with masked argument).</td>
1586</tr>
1587<tr>
1588 <td>shr-long</td>
1589 <td>int64 a, b;<br/>
1590 int64 result = a &gt;&gt; (b &amp; 0x3f);
1591 </td>
1592 <td>Bitwise signed shift right (with masked argument).</td>
1593</tr>
1594<tr>
1595 <td>ushr-long</td>
1596 <td>uint64 a, b;<br/>
1597 int64 result = a &gt;&gt; (b &amp; 0x3f);
1598 </td>
1599 <td>Bitwise unsigned shift right (with masked argument).</td>
1600</tr>
1601<tr>
1602 <td>add-float</td>
1603 <td>float a, b;<br/>
1604 float result = a + b;
1605 </td>
1606 <td>Floating point addition.</td>
1607</tr>
1608<tr>
1609 <td>sub-float</td>
1610 <td>float a, b;<br/>
1611 float result = a - b;
1612 </td>
1613 <td>Floating point subtraction.</td>
1614</tr>
1615<tr>
1616 <td>mul-float</td>
1617 <td>float a, b;<br/>
1618 float result = a * b;
1619 </td>
1620 <td>Floating point multiplication.</td>
1621</tr>
1622<tr>
1623 <td>div-float</td>
1624 <td>float a, b;<br/>
1625 float result = a / b;
1626 </td>
1627 <td>Floating point division.</td>
1628</tr>
1629<tr>
1630 <td>rem-float</td>
1631 <td>float a, b;<br/>
1632 float result = a % b;
1633 </td>
1634 <td>Floating point remainder after division. This function is different
Carl Shapirode750892010-06-08 16:37:12 -0700[diff] [blame]1635 than IEEE 754 remainder and is defined as
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]1636 <code>result == a - roundTowardZero(a / b) * b</code>.
1637 </td>
1638</tr>
1639<tr>
1640 <td>add-double</td>
1641 <td>double a, b;<br/>
1642 double result = a + b;
1643 </td>
1644 <td>Floating point addition.</td>
1645</tr>
1646<tr>
1647 <td>sub-double</td>
1648 <td>double a, b;<br/>
1649 double result = a - b;
1650 </td>
1651 <td>Floating point subtraction.</td>
1652</tr>
1653<tr>
1654 <td>mul-double</td>
1655 <td>double a, b;<br/>
1656 double result = a * b;
1657 </td>
1658 <td>Floating point multiplication.</td>
1659</tr>
1660<tr>
1661 <td>div-double</td>
1662 <td>double a, b;<br/>
1663 double result = a / b;
1664 </td>
1665 <td>Floating point division.</td>
1666</tr>
1667<tr>
1668 <td>rem-double</td>
1669 <td>double a, b;<br/>
1670 double result = a % b;
1671 </td>
1672 <td>Floating point remainder after division. This function is different
Carl Shapirode750892010-06-08 16:37:12 -0700[diff] [blame]1673 than IEEE 754 remainder and is defined as
The Android Open Source Projectf6c38712009-03-03 19:28:47 -0800[diff] [blame]1674 <code>result == a - roundTowardZero(a / b) * b</code>.
1675 </td>
1676</tr>
1677</tbody>
1678</table>
1679
1680</body>
1681</html>