| The Android Open Source Project | f6c3871 | 2009-03-03 19:28:47 -0800 | [diff] [blame] | 1 | <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd"> |
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| 3 | <html> |
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| 5 | <head> |
| 6 | <title>move-wide</title> |
| 7 | <link rel=stylesheet href="opcode.css"> |
| 8 | </head> |
| 9 | |
| 10 | <body> |
| 11 | |
| Andy McFadden | c7659ec | 2009-09-18 16:14:41 -0700 | [diff] [blame^] | 12 | <h1>move-wide</h1> |
| The Android Open Source Project | f6c3871 | 2009-03-03 19:28:47 -0800 | [diff] [blame] | 13 | |
| 14 | <h2>Purpose</h2> |
| 15 | |
| 16 | <p> |
| 17 | Move the contents of one register-pair to another. |
| 18 | </p> |
| 19 | <p> |
| 20 | Note: It is legal to move from vN to either vN-1 or vN+1, so implementations |
| 21 | must arrange for both halves of a register pair to be read before anything is |
| 22 | written. |
| 23 | </p> |
| 24 | |
| 25 | <h2>Details</h2> |
| 26 | |
| 27 | <table class="instruc"> |
| 28 | <thead> |
| 29 | <tr> |
| 30 | <th>Op & Format</th> |
| 31 | <th>Mnemonic / Syntax</th> |
| 32 | <th>Arguments</th> |
| 33 | </tr> |
| 34 | </thead> |
| 35 | <tbody> |
| 36 | <tr> |
| 37 | <td>04 12x</td> |
| 38 | <td>move-wide vA, vB</td> |
| 39 | <td><code>A:</code> destination register pair (4 bits)<br/> |
| 40 | <code>B:</code> source register pair (4 bits)</td> |
| 41 | </tr> |
| 42 | <tr> |
| 43 | <td>05 22x</td> |
| 44 | <td>move-wide/from16 vAA, vBBBB</td> |
| 45 | <td><code>A:</code> destination register pair (8 bits)<br/> |
| 46 | <code>B:</code> source register pair (16 bits)</td> |
| 47 | </tr> |
| 48 | <tr> |
| 49 | <td>06 32x</td> |
| 50 | <td>move-wide/16 vAAAA, vBBBB</td> |
| 51 | <td><code>A:</code> destination register pair (16 bits)<br/> |
| 52 | <code>B:</code> source register pair (16 bits)</td> |
| 53 | </tr> |
| 54 | </tbody> |
| 55 | </table> |
| 56 | |
| 57 | <h2>Constraints</h2> |
| 58 | |
| 59 | <ul> |
| 60 | <li> |
| 61 | Both A+1 and B+1 must be valid register indices in the current stackframe |
| 62 | (which includes A and B being valid). |
| 63 | </li> |
| 64 | <li> |
| 65 | Register vB must be the lower half of a register pair (which excludes the |
| 66 | case of it containing a reference). |
| 67 | </li> |
| 68 | <li> |
| 69 | Both register vB and v(B+1) must be defined. |
| 70 | </li> |
| 71 | </ul> |
| 72 | |
| 73 | <h2>Behavior</h2> |
| 74 | |
| 75 | <ul> |
| 76 | <li> |
| 77 | The value of register vB is moved to register vA, that is, vA' = vB. |
| 78 | </li> |
| 79 | <li> |
| 80 | The value of register v(B+1) is moved to register v(A+1), that is, v(A+1)' |
| 81 | = v(B+1). |
| 82 | </li> |
| 83 | <li> |
| 84 | If register v(A-1) is the lower half of a register pair, then v(A-1)' |
| 85 | becomes undefined. |
| 86 | </li> |
| 87 | <li> |
| 88 | If register v(A+2) is the upper half of a register pair, then v(A+2)' |
| 89 | becomes undefined. |
| 90 | </li> |
| 91 | <li> |
| 92 | If A = B-1, then v(B+1)' becomes undefined. |
| 93 | </li> |
| 94 | <li> |
| 95 | If A = B+1, then v(B)' becomes undefined. |
| 96 | </li> |
| 97 | </ul> |
| 98 | |
| 99 | <h2>Exceptions</h2> |
| 100 | |
| 101 | <p> |
| 102 | None. |
| 103 | </p> |
| 104 | |
| 105 | </body> |
| 106 | </html> |