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gerrit-public.fairphone.software / fp2-dev / platform / dalvik / cd8f5e701547739f241594b43e9470c92d98e9cf / . / vm / mterp / out / InterpC-armv7-a-neon.cpp
blob: ba9f8a2b95ee0d56155203e8b0b153ae835508fd [file] [log] [blame]
Carl Shapirocd8f5e72011-04-20 16:12:46 -0700[diff] [blame^]1/*
2 * This file was generated automatically by gen-mterp.py for 'armv7-a-neon'.
3 *
4 * --> DO NOT EDIT <--
5 */
6
7/* File: c/header.cpp */
8/*
9 * Copyright (C) 2008 The Android Open Source Project
10 *
11 * Licensed under the Apache License, Version 2.0 (the "License");
12 * you may not use this file except in compliance with the License.
13 * You may obtain a copy of the License at
14 *
15 * http://www.apache.org/licenses/LICENSE-2.0
16 *
17 * Unless required by applicable law or agreed to in writing, software
18 * distributed under the License is distributed on an "AS IS" BASIS,
19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
20 * See the License for the specific language governing permissions and
21 * limitations under the License.
22 */
23
24/* common includes */
25#include "Dalvik.h"
26#include "interp/InterpDefs.h"
27#include "mterp/Mterp.h"
28#include <math.h> // needed for fmod, fmodf
29#include "mterp/common/FindInterface.h"
30
31/*
32 * Configuration defines. These affect the C implementations, i.e. the
33 * portable interpreter(s) and C stubs.
34 *
35 * Some defines are controlled by the Makefile, e.g.:
36 * WITH_INSTR_CHECKS
37 * WITH_TRACKREF_CHECKS
38 * EASY_GDB
39 * NDEBUG
40 */
41
42#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
43# define CHECK_BRANCH_OFFSETS
44# define CHECK_REGISTER_INDICES
45#endif
46
47/*
48 * Some architectures require 64-bit alignment for access to 64-bit data
49 * types. We can't just use pointers to copy 64-bit values out of our
50 * interpreted register set, because gcc may assume the pointer target is
51 * aligned and generate invalid code.
52 *
53 * There are two common approaches:
54 * (1) Use a union that defines a 32-bit pair and a 64-bit value.
55 * (2) Call memcpy().
56 *
57 * Depending upon what compiler you're using and what options are specified,
58 * one may be faster than the other. For example, the compiler might
59 * convert a memcpy() of 8 bytes into a series of instructions and omit
60 * the call. The union version could cause some strange side-effects,
61 * e.g. for a while ARM gcc thought it needed separate storage for each
62 * inlined instance, and generated instructions to zero out ~700 bytes of
63 * stack space at the top of the interpreter.
64 *
65 * The default is to use memcpy(). The current gcc for ARM seems to do
66 * better with the union.
67 */
68#if defined(__ARM_EABI__)
69# define NO_UNALIGN_64__UNION
70#endif
71
72
73//#define LOG_INSTR /* verbose debugging */
74/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
75
76/*
77 * Keep a tally of accesses to fields. Currently only works if full DEX
78 * optimization is disabled.
79 */
80#ifdef PROFILE_FIELD_ACCESS
81# define UPDATE_FIELD_GET(_field) { (_field)->gets++; }
82# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; }
83#else
84# define UPDATE_FIELD_GET(_field) ((void)0)
85# define UPDATE_FIELD_PUT(_field) ((void)0)
86#endif
87
88/*
89 * Export another copy of the PC on every instruction; this is largely
90 * redundant with EXPORT_PC and the debugger code. This value can be
91 * compared against what we have stored on the stack with EXPORT_PC to
92 * help ensure that we aren't missing any export calls.
93 */
94#if WITH_EXTRA_GC_CHECKS > 1
95# define EXPORT_EXTRA_PC() (self->currentPc2 = pc)
96#else
97# define EXPORT_EXTRA_PC()
98#endif
99
100/*
101 * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
102 *
103 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
104 *
105 * We don't advance the program counter until we finish an instruction or
106 * branch, because we do want to have to unroll the PC if there's an
107 * exception.
108 */
109#ifdef CHECK_BRANCH_OFFSETS
110# define ADJUST_PC(_offset) do { \
111 int myoff = _offset; /* deref only once */ \
112 if (pc + myoff < curMethod->insns || \
113 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
114 { \
115 char* desc; \
116 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
117 LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \
118 myoff, (int) (pc - curMethod->insns), \
119 curMethod->clazz->descriptor, curMethod->name, desc); \
120 free(desc); \
121 dvmAbort(); \
122 } \
123 pc += myoff; \
124 EXPORT_EXTRA_PC(); \
125 } while (false)
126#else
127# define ADJUST_PC(_offset) do { \
128 pc += _offset; \
129 EXPORT_EXTRA_PC(); \
130 } while (false)
131#endif
132
133/*
134 * If enabled, log instructions as we execute them.
135 */
136#ifdef LOG_INSTR
137# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
138# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
139# define ILOG(_level, ...) do { \
140 char debugStrBuf[128]; \
141 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
142 if (curMethod != NULL) \
143 LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \
144 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
145 else \
146 LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \
147 self->threadId, debugStrBuf); \
148 } while(false)
149void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
150# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
151static const char kSpacing[] = " ";
152#else
153# define ILOGD(...) ((void)0)
154# define ILOGV(...) ((void)0)
155# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
156#endif
157
158/* get a long from an array of u4 */
159static inline s8 getLongFromArray(const u4* ptr, int idx)
160{
161#if defined(NO_UNALIGN_64__UNION)
162 union { s8 ll; u4 parts[2]; } conv;
163
164 ptr += idx;
165 conv.parts[0] = ptr[0];
166 conv.parts[1] = ptr[1];
167 return conv.ll;
168#else
169 s8 val;
170 memcpy(&val, &ptr[idx], 8);
171 return val;
172#endif
173}
174
175/* store a long into an array of u4 */
176static inline void putLongToArray(u4* ptr, int idx, s8 val)
177{
178#if defined(NO_UNALIGN_64__UNION)
179 union { s8 ll; u4 parts[2]; } conv;
180
181 ptr += idx;
182 conv.ll = val;
183 ptr[0] = conv.parts[0];
184 ptr[1] = conv.parts[1];
185#else
186 memcpy(&ptr[idx], &val, 8);
187#endif
188}
189
190/* get a double from an array of u4 */
191static inline double getDoubleFromArray(const u4* ptr, int idx)
192{
193#if defined(NO_UNALIGN_64__UNION)
194 union { double d; u4 parts[2]; } conv;
195
196 ptr += idx;
197 conv.parts[0] = ptr[0];
198 conv.parts[1] = ptr[1];
199 return conv.d;
200#else
201 double dval;
202 memcpy(&dval, &ptr[idx], 8);
203 return dval;
204#endif
205}
206
207/* store a double into an array of u4 */
208static inline void putDoubleToArray(u4* ptr, int idx, double dval)
209{
210#if defined(NO_UNALIGN_64__UNION)
211 union { double d; u4 parts[2]; } conv;
212
213 ptr += idx;
214 conv.d = dval;
215 ptr[0] = conv.parts[0];
216 ptr[1] = conv.parts[1];
217#else
218 memcpy(&ptr[idx], &dval, 8);
219#endif
220}
221
222/*
223 * If enabled, validate the register number on every access. Otherwise,
224 * just do an array access.
225 *
226 * Assumes the existence of "u4* fp".
227 *
228 * "_idx" may be referenced more than once.
229 */
230#ifdef CHECK_REGISTER_INDICES
231# define GET_REGISTER(_idx) \
232 ( (_idx) < curMethod->registersSize ? \
233 (fp[(_idx)]) : (assert(!"bad reg"),1969) )
234# define SET_REGISTER(_idx, _val) \
235 ( (_idx) < curMethod->registersSize ? \
236 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
237# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
238# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
239# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
240# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
241# define GET_REGISTER_WIDE(_idx) \
242 ( (_idx) < curMethod->registersSize-1 ? \
243 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
244# define SET_REGISTER_WIDE(_idx, _val) \
245 ( (_idx) < curMethod->registersSize-1 ? \
246 putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) )
247# define GET_REGISTER_FLOAT(_idx) \
248 ( (_idx) < curMethod->registersSize ? \
249 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
250# define SET_REGISTER_FLOAT(_idx, _val) \
251 ( (_idx) < curMethod->registersSize ? \
252 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
253# define GET_REGISTER_DOUBLE(_idx) \
254 ( (_idx) < curMethod->registersSize-1 ? \
255 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
256# define SET_REGISTER_DOUBLE(_idx, _val) \
257 ( (_idx) < curMethod->registersSize-1 ? \
258 putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) )
259#else
260# define GET_REGISTER(_idx) (fp[(_idx)])
261# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
262# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
263# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
264# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
265# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
266# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
267# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
268# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
269# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
270# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
271# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
272#endif
273
274/*
275 * Get 16 bits from the specified offset of the program counter. We always
276 * want to load 16 bits at a time from the instruction stream -- it's more
277 * efficient than 8 and won't have the alignment problems that 32 might.
278 *
279 * Assumes existence of "const u2* pc".
280 */
281#define FETCH(_offset) (pc[(_offset)])
282
283/*
284 * Extract instruction byte from 16-bit fetch (_inst is a u2).
285 */
286#define INST_INST(_inst) ((_inst) & 0xff)
287
288/*
289 * Replace the opcode (used when handling breakpoints). _opcode is a u1.
290 */
291#define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode)
292
293/*
294 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
295 */
296#define INST_A(_inst) (((_inst) >> 8) & 0x0f)
297#define INST_B(_inst) ((_inst) >> 12)
298
299/*
300 * Get the 8-bit "vAA" 8-bit register index from the instruction word.
301 * (_inst is u2)
302 */
303#define INST_AA(_inst) ((_inst) >> 8)
304
305/*
306 * The current PC must be available to Throwable constructors, e.g.
307 * those created by the various exception throw routines, so that the
308 * exception stack trace can be generated correctly. If we don't do this,
309 * the offset within the current method won't be shown correctly. See the
310 * notes in Exception.c.
311 *
312 * This is also used to determine the address for precise GC.
313 *
314 * Assumes existence of "u4* fp" and "const u2* pc".
315 */
316#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
317
318/*
319 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
320 * pc has already been exported to the stack.
321 *
322 * Perform additional checks on debug builds.
323 *
324 * Use this to check for NULL when the instruction handler calls into
325 * something that could throw an exception (so we have already called
326 * EXPORT_PC at the top).
327 */
328static inline bool checkForNull(Object* obj)
329{
330 if (obj == NULL) {
331 dvmThrowNullPointerException(NULL);
332 return false;
333 }
334#ifdef WITH_EXTRA_OBJECT_VALIDATION
335 if (!dvmIsValidObject(obj)) {
336 LOGE("Invalid object %p\n", obj);
337 dvmAbort();
338 }
339#endif
340#ifndef NDEBUG
341 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
342 /* probable heap corruption */
343 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
344 dvmAbort();
345 }
346#endif
347 return true;
348}
349
350/*
351 * Check to see if "obj" is NULL. If so, export the PC into the stack
352 * frame and throw an exception.
353 *
354 * Perform additional checks on debug builds.
355 *
356 * Use this to check for NULL when the instruction handler doesn't do
357 * anything else that can throw an exception.
358 */
359static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
360{
361 if (obj == NULL) {
362 EXPORT_PC();
363 dvmThrowNullPointerException(NULL);
364 return false;
365 }
366#ifdef WITH_EXTRA_OBJECT_VALIDATION
367 if (!dvmIsValidObject(obj)) {
368 LOGE("Invalid object %p\n", obj);
369 dvmAbort();
370 }
371#endif
372#ifndef NDEBUG
373 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
374 /* probable heap corruption */
375 LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
376 dvmAbort();
377 }
378#endif
379 return true;
380}
381
382/* File: cstubs/stubdefs.cpp */
383/*
384 * In the C mterp stubs, "goto" is a function call followed immediately
385 * by a return.
386 */
387
388#define GOTO_TARGET_DECL(_target, ...) \
389 extern "C" void dvmMterp_##_target(Thread* self, ## __VA_ARGS__);
390
391/* (void)xxx to quiet unused variable compiler warnings. */
392#define GOTO_TARGET(_target, ...) \
393 void dvmMterp_##_target(Thread* self, ## __VA_ARGS__) { \
394 u2 ref, vsrc1, vsrc2, vdst; \
395 u2 inst = FETCH(0); \
396 const Method* methodToCall; \
397 StackSaveArea* debugSaveArea; \
398 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; \
399 (void)methodToCall; (void)debugSaveArea;
400
401#define GOTO_TARGET_END }
402
403/*
404 * Redefine what used to be local variable accesses into Thread struct
405 * references. (These are undefined down in "footer.c".)
406 */
407#define retval self->retval
408#define pc self->interpSave.pc
409#define fp self->interpSave.fp
410#define curMethod self->interpSave.method
411#define methodClassDex self->interpSave.methodClassDex
412#define debugTrackedRefStart self->interpSave.debugTrackedRefStart
413
414/* ugh */
415#define STUB_HACK(x) x
416#if defined(WITH_JIT)
417#define JIT_STUB_HACK(x) x
418#else
419#define JIT_STUB_HACK(x)
420#endif
421
422/*
423 * InterpSave's pc and fp must be valid when breaking out to a
424 * "Reportxxx" routine. Because the portable interpreter uses local
425 * variables for these, we must flush prior. Stubs, however, use
426 * the interpSave vars directly, so this is a nop for stubs.
427 */
428#define PC_FP_TO_SELF()
429
430/*
431 * Opcode handler framing macros. Here, each opcode is a separate function
432 * that takes a "self" argument and returns void. We can't declare
433 * these "static" because they may be called from an assembly stub.
434 * (void)xxx to quiet unused variable compiler warnings.
435 */
436#define HANDLE_OPCODE(_op) \
437 extern "C" void dvmMterp_##_op(Thread* self); \
438 void dvmMterp_##_op(Thread* self) { \
439 u4 ref; \
440 u2 vsrc1, vsrc2, vdst; \
441 u2 inst = FETCH(0); \
442 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst;
443
444#define OP_END }
445
446/*
447 * Like the "portable" FINISH, but don't reload "inst", and return to caller
448 * when done. Further, debugger/profiler checks are handled
449 * before handler execution in mterp, so we don't do them here either.
450 */
451#if defined(WITH_JIT)
452#define FINISH(_offset) { \
453 ADJUST_PC(_offset); \
454 if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
455 dvmCheckJit(pc, self); \
456 } \
457 return; \
458 }
459#else
460#define FINISH(_offset) { \
461 ADJUST_PC(_offset); \
462 return; \
463 }
464#endif
465
466
467/*
468 * The "goto label" statements turn into function calls followed by
469 * return statements. Some of the functions take arguments, which in the
470 * portable interpreter are handled by assigning values to globals.
471 */
472
473#define GOTO_exceptionThrown() \
474 do { \
475 dvmMterp_exceptionThrown(self); \
476 return; \
477 } while(false)
478
479#define GOTO_returnFromMethod() \
480 do { \
481 dvmMterp_returnFromMethod(self); \
482 return; \
483 } while(false)
484
485#define GOTO_invoke(_target, _methodCallRange, _jumboFormat) \
486 do { \
487 dvmMterp_##_target(self, _methodCallRange, _jumboFormat); \
488 return; \
489 } while(false)
490
491#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
492 do { \
493 dvmMterp_invokeMethod(self, _methodCallRange, _methodToCall, \
494 _vsrc1, _vdst); \
495 return; \
496 } while(false)
497
498/*
499 * As a special case, "goto bail" turns into a longjmp.
500 */
501#define GOTO_bail() \
502 dvmMterpStdBail(self, false);
503
504/*
505 * Periodically check for thread suspension.
506 *
507 * While we're at it, see if a debugger has attached or the profiler has
508 * started.
509 */
510#define PERIODIC_CHECKS(_pcadj) { \
511 if (dvmCheckSuspendQuick(self)) { \
512 EXPORT_PC(); /* need for precise GC */ \
513 dvmCheckSuspendPending(self); \
514 } \
515 }
516
517/* File: c/opcommon.cpp */
518/* forward declarations of goto targets */
519GOTO_TARGET_DECL(filledNewArray, bool methodCallRange, bool jumboFormat);
520GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange, bool jumboFormat);
521GOTO_TARGET_DECL(invokeSuper, bool methodCallRange, bool jumboFormat);
522GOTO_TARGET_DECL(invokeInterface, bool methodCallRange, bool jumboFormat);
523GOTO_TARGET_DECL(invokeDirect, bool methodCallRange, bool jumboFormat);
524GOTO_TARGET_DECL(invokeStatic, bool methodCallRange, bool jumboFormat);
525GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange, bool jumboFormat);
526GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange, bool jumboFormat);
527GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
528 u2 count, u2 regs);
529GOTO_TARGET_DECL(returnFromMethod);
530GOTO_TARGET_DECL(exceptionThrown);
531
532/*
533 * ===========================================================================
534 *
535 * What follows are opcode definitions shared between multiple opcodes with
536 * minor substitutions handled by the C pre-processor. These should probably
537 * use the mterp substitution mechanism instead, with the code here moved
538 * into common fragment files (like the asm "binop.S"), although it's hard
539 * to give up the C preprocessor in favor of the much simpler text subst.
540 *
541 * ===========================================================================
542 */
543
544#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
545 HANDLE_OPCODE(_opcode /*vA, vB*/) \
546 vdst = INST_A(inst); \
547 vsrc1 = INST_B(inst); \
548 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
549 SET_REGISTER##_totype(vdst, \
550 GET_REGISTER##_fromtype(vsrc1)); \
551 FINISH(1);
552
553#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
554 _tovtype, _tortype) \
555 HANDLE_OPCODE(_opcode /*vA, vB*/) \
556 { \
557 /* spec defines specific handling for +/- inf and NaN values */ \
558 _fromvtype val; \
559 _tovtype intMin, intMax, result; \
560 vdst = INST_A(inst); \
561 vsrc1 = INST_B(inst); \
562 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
563 val = GET_REGISTER##_fromrtype(vsrc1); \
564 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
565 intMax = ~intMin; \
566 result = (_tovtype) val; \
567 if (val >= intMax) /* +inf */ \
568 result = intMax; \
569 else if (val <= intMin) /* -inf */ \
570 result = intMin; \
571 else if (val != val) /* NaN */ \
572 result = 0; \
573 else \
574 result = (_tovtype) val; \
575 SET_REGISTER##_tortype(vdst, result); \
576 } \
577 FINISH(1);
578
579#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
580 HANDLE_OPCODE(_opcode /*vA, vB*/) \
581 vdst = INST_A(inst); \
582 vsrc1 = INST_B(inst); \
583 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
584 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
585 FINISH(1);
586
587/* NOTE: the comparison result is always a signed 4-byte integer */
588#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
589 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
590 { \
591 int result; \
592 u2 regs; \
593 _varType val1, val2; \
594 vdst = INST_AA(inst); \
595 regs = FETCH(1); \
596 vsrc1 = regs & 0xff; \
597 vsrc2 = regs >> 8; \
598 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
599 val1 = GET_REGISTER##_type(vsrc1); \
600 val2 = GET_REGISTER##_type(vsrc2); \
601 if (val1 == val2) \
602 result = 0; \
603 else if (val1 < val2) \
604 result = -1; \
605 else if (val1 > val2) \
606 result = 1; \
607 else \
608 result = (_nanVal); \
609 ILOGV("+ result=%d\n", result); \
610 SET_REGISTER(vdst, result); \
611 } \
612 FINISH(2);
613
614#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
615 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
616 vsrc1 = INST_A(inst); \
617 vsrc2 = INST_B(inst); \
618 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
619 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
620 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
621 branchOffset); \
622 ILOGV("> branch taken"); \
623 if (branchOffset < 0) \
624 PERIODIC_CHECKS(branchOffset); \
625 FINISH(branchOffset); \
626 } else { \
627 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
628 FINISH(2); \
629 }
630
631#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
632 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
633 vsrc1 = INST_AA(inst); \
634 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
635 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
636 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
637 ILOGV("> branch taken"); \
638 if (branchOffset < 0) \
639 PERIODIC_CHECKS(branchOffset); \
640 FINISH(branchOffset); \
641 } else { \
642 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
643 FINISH(2); \
644 }
645
646#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
647 HANDLE_OPCODE(_opcode /*vA, vB*/) \
648 vdst = INST_A(inst); \
649 vsrc1 = INST_B(inst); \
650 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
651 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
652 FINISH(1);
653
654#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
655 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
656 { \
657 u2 srcRegs; \
658 vdst = INST_AA(inst); \
659 srcRegs = FETCH(1); \
660 vsrc1 = srcRegs & 0xff; \
661 vsrc2 = srcRegs >> 8; \
662 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
663 if (_chkdiv != 0) { \
664 s4 firstVal, secondVal, result; \
665 firstVal = GET_REGISTER(vsrc1); \
666 secondVal = GET_REGISTER(vsrc2); \
667 if (secondVal == 0) { \
668 EXPORT_PC(); \
669 dvmThrowArithmeticException("divide by zero"); \
670 GOTO_exceptionThrown(); \
671 } \
672 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
673 if (_chkdiv == 1) \
674 result = firstVal; /* division */ \
675 else \
676 result = 0; /* remainder */ \
677 } else { \
678 result = firstVal _op secondVal; \
679 } \
680 SET_REGISTER(vdst, result); \
681 } else { \
682 /* non-div/rem case */ \
683 SET_REGISTER(vdst, \
684 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
685 } \
686 } \
687 FINISH(2);
688
689#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
690 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
691 { \
692 u2 srcRegs; \
693 vdst = INST_AA(inst); \
694 srcRegs = FETCH(1); \
695 vsrc1 = srcRegs & 0xff; \
696 vsrc2 = srcRegs >> 8; \
697 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
698 SET_REGISTER(vdst, \
699 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
700 } \
701 FINISH(2);
702
703#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
704 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
705 vdst = INST_A(inst); \
706 vsrc1 = INST_B(inst); \
707 vsrc2 = FETCH(1); \
708 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
709 (_opname), vdst, vsrc1, vsrc2); \
710 if (_chkdiv != 0) { \
711 s4 firstVal, result; \
712 firstVal = GET_REGISTER(vsrc1); \
713 if ((s2) vsrc2 == 0) { \
714 EXPORT_PC(); \
715 dvmThrowArithmeticException("divide by zero"); \
716 GOTO_exceptionThrown(); \
717 } \
718 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
719 /* won't generate /lit16 instr for this; check anyway */ \
720 if (_chkdiv == 1) \
721 result = firstVal; /* division */ \
722 else \
723 result = 0; /* remainder */ \
724 } else { \
725 result = firstVal _op (s2) vsrc2; \
726 } \
727 SET_REGISTER(vdst, result); \
728 } else { \
729 /* non-div/rem case */ \
730 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
731 } \
732 FINISH(2);
733
734#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
735 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
736 { \
737 u2 litInfo; \
738 vdst = INST_AA(inst); \
739 litInfo = FETCH(1); \
740 vsrc1 = litInfo & 0xff; \
741 vsrc2 = litInfo >> 8; /* constant */ \
742 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
743 (_opname), vdst, vsrc1, vsrc2); \
744 if (_chkdiv != 0) { \
745 s4 firstVal, result; \
746 firstVal = GET_REGISTER(vsrc1); \
747 if ((s1) vsrc2 == 0) { \
748 EXPORT_PC(); \
749 dvmThrowArithmeticException("divide by zero"); \
750 GOTO_exceptionThrown(); \
751 } \
752 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
753 if (_chkdiv == 1) \
754 result = firstVal; /* division */ \
755 else \
756 result = 0; /* remainder */ \
757 } else { \
758 result = firstVal _op ((s1) vsrc2); \
759 } \
760 SET_REGISTER(vdst, result); \
761 } else { \
762 SET_REGISTER(vdst, \
763 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
764 } \
765 } \
766 FINISH(2);
767
768#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
769 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
770 { \
771 u2 litInfo; \
772 vdst = INST_AA(inst); \
773 litInfo = FETCH(1); \
774 vsrc1 = litInfo & 0xff; \
775 vsrc2 = litInfo >> 8; /* constant */ \
776 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
777 (_opname), vdst, vsrc1, vsrc2); \
778 SET_REGISTER(vdst, \
779 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
780 } \
781 FINISH(2);
782
783#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
784 HANDLE_OPCODE(_opcode /*vA, vB*/) \
785 vdst = INST_A(inst); \
786 vsrc1 = INST_B(inst); \
787 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
788 if (_chkdiv != 0) { \
789 s4 firstVal, secondVal, result; \
790 firstVal = GET_REGISTER(vdst); \
791 secondVal = GET_REGISTER(vsrc1); \
792 if (secondVal == 0) { \
793 EXPORT_PC(); \
794 dvmThrowArithmeticException("divide by zero"); \
795 GOTO_exceptionThrown(); \
796 } \
797 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
798 if (_chkdiv == 1) \
799 result = firstVal; /* division */ \
800 else \
801 result = 0; /* remainder */ \
802 } else { \
803 result = firstVal _op secondVal; \
804 } \
805 SET_REGISTER(vdst, result); \
806 } else { \
807 SET_REGISTER(vdst, \
808 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
809 } \
810 FINISH(1);
811
812#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
813 HANDLE_OPCODE(_opcode /*vA, vB*/) \
814 vdst = INST_A(inst); \
815 vsrc1 = INST_B(inst); \
816 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
817 SET_REGISTER(vdst, \
818 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
819 FINISH(1);
820
821#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
822 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
823 { \
824 u2 srcRegs; \
825 vdst = INST_AA(inst); \
826 srcRegs = FETCH(1); \
827 vsrc1 = srcRegs & 0xff; \
828 vsrc2 = srcRegs >> 8; \
829 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
830 if (_chkdiv != 0) { \
831 s8 firstVal, secondVal, result; \
832 firstVal = GET_REGISTER_WIDE(vsrc1); \
833 secondVal = GET_REGISTER_WIDE(vsrc2); \
834 if (secondVal == 0LL) { \
835 EXPORT_PC(); \
836 dvmThrowArithmeticException("divide by zero"); \
837 GOTO_exceptionThrown(); \
838 } \
839 if ((u8)firstVal == 0x8000000000000000ULL && \
840 secondVal == -1LL) \
841 { \
842 if (_chkdiv == 1) \
843 result = firstVal; /* division */ \
844 else \
845 result = 0; /* remainder */ \
846 } else { \
847 result = firstVal _op secondVal; \
848 } \
849 SET_REGISTER_WIDE(vdst, result); \
850 } else { \
851 SET_REGISTER_WIDE(vdst, \
852 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
853 } \
854 } \
855 FINISH(2);
856
857#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
858 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
859 { \
860 u2 srcRegs; \
861 vdst = INST_AA(inst); \
862 srcRegs = FETCH(1); \
863 vsrc1 = srcRegs & 0xff; \
864 vsrc2 = srcRegs >> 8; \
865 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
866 SET_REGISTER_WIDE(vdst, \
867 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
868 } \
869 FINISH(2);
870
871#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
872 HANDLE_OPCODE(_opcode /*vA, vB*/) \
873 vdst = INST_A(inst); \
874 vsrc1 = INST_B(inst); \
875 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
876 if (_chkdiv != 0) { \
877 s8 firstVal, secondVal, result; \
878 firstVal = GET_REGISTER_WIDE(vdst); \
879 secondVal = GET_REGISTER_WIDE(vsrc1); \
880 if (secondVal == 0LL) { \
881 EXPORT_PC(); \
882 dvmThrowArithmeticException("divide by zero"); \
883 GOTO_exceptionThrown(); \
884 } \
885 if ((u8)firstVal == 0x8000000000000000ULL && \
886 secondVal == -1LL) \
887 { \
888 if (_chkdiv == 1) \
889 result = firstVal; /* division */ \
890 else \
891 result = 0; /* remainder */ \
892 } else { \
893 result = firstVal _op secondVal; \
894 } \
895 SET_REGISTER_WIDE(vdst, result); \
896 } else { \
897 SET_REGISTER_WIDE(vdst, \
898 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
899 } \
900 FINISH(1);
901
902#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
903 HANDLE_OPCODE(_opcode /*vA, vB*/) \
904 vdst = INST_A(inst); \
905 vsrc1 = INST_B(inst); \
906 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
907 SET_REGISTER_WIDE(vdst, \
908 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
909 FINISH(1);
910
911#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
912 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
913 { \
914 u2 srcRegs; \
915 vdst = INST_AA(inst); \
916 srcRegs = FETCH(1); \
917 vsrc1 = srcRegs & 0xff; \
918 vsrc2 = srcRegs >> 8; \
919 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
920 SET_REGISTER_FLOAT(vdst, \
921 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
922 } \
923 FINISH(2);
924
925#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
926 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
927 { \
928 u2 srcRegs; \
929 vdst = INST_AA(inst); \
930 srcRegs = FETCH(1); \
931 vsrc1 = srcRegs & 0xff; \
932 vsrc2 = srcRegs >> 8; \
933 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
934 SET_REGISTER_DOUBLE(vdst, \
935 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
936 } \
937 FINISH(2);
938
939#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
940 HANDLE_OPCODE(_opcode /*vA, vB*/) \
941 vdst = INST_A(inst); \
942 vsrc1 = INST_B(inst); \
943 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
944 SET_REGISTER_FLOAT(vdst, \
945 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
946 FINISH(1);
947
948#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
949 HANDLE_OPCODE(_opcode /*vA, vB*/) \
950 vdst = INST_A(inst); \
951 vsrc1 = INST_B(inst); \
952 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
953 SET_REGISTER_DOUBLE(vdst, \
954 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
955 FINISH(1);
956
957#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
958 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
959 { \
960 ArrayObject* arrayObj; \
961 u2 arrayInfo; \
962 EXPORT_PC(); \
963 vdst = INST_AA(inst); \
964 arrayInfo = FETCH(1); \
965 vsrc1 = arrayInfo & 0xff; /* array ptr */ \
966 vsrc2 = arrayInfo >> 8; /* index */ \
967 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
968 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
969 if (!checkForNull((Object*) arrayObj)) \
970 GOTO_exceptionThrown(); \
971 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
972 dvmThrowArrayIndexOutOfBoundsException( \
973 arrayObj->length, GET_REGISTER(vsrc2)); \
974 GOTO_exceptionThrown(); \
975 } \
976 SET_REGISTER##_regsize(vdst, \
977 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)]); \
978 ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
979 } \
980 FINISH(2);
981
982#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
983 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
984 { \
985 ArrayObject* arrayObj; \
986 u2 arrayInfo; \
987 EXPORT_PC(); \
988 vdst = INST_AA(inst); /* AA: source value */ \
989 arrayInfo = FETCH(1); \
990 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
991 vsrc2 = arrayInfo >> 8; /* CC: index */ \
992 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
993 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
994 if (!checkForNull((Object*) arrayObj)) \
995 GOTO_exceptionThrown(); \
996 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
997 dvmThrowArrayIndexOutOfBoundsException( \
998 arrayObj->length, GET_REGISTER(vsrc2)); \
999 GOTO_exceptionThrown(); \
1000 } \
1001 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
1002 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)] = \
1003 GET_REGISTER##_regsize(vdst); \
1004 } \
1005 FINISH(2);
1006
1007/*
1008 * It's possible to get a bad value out of a field with sub-32-bit stores
1009 * because the -quick versions always operate on 32 bits. Consider:
1010 * short foo = -1 (sets a 32-bit register to 0xffffffff)
1011 * iput-quick foo (writes all 32 bits to the field)
1012 * short bar = 1 (sets a 32-bit register to 0x00000001)
1013 * iput-short (writes the low 16 bits to the field)
1014 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
1015 * This can only happen when optimized and non-optimized code has interleaved
1016 * access to the same field. This is unlikely but possible.
1017 *
1018 * The easiest way to fix this is to always read/write 32 bits at a time. On
1019 * a device with a 16-bit data bus this is sub-optimal. (The alternative
1020 * approach is to have sub-int versions of iget-quick, but now we're wasting
1021 * Dalvik instruction space and making it less likely that handler code will
1022 * already be in the CPU i-cache.)
1023 */
1024#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
1025 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1026 { \
1027 InstField* ifield; \
1028 Object* obj; \
1029 EXPORT_PC(); \
1030 vdst = INST_A(inst); \
1031 vsrc1 = INST_B(inst); /* object ptr */ \
1032 ref = FETCH(1); /* field ref */ \
1033 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1034 obj = (Object*) GET_REGISTER(vsrc1); \
1035 if (!checkForNull(obj)) \
1036 GOTO_exceptionThrown(); \
1037 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1038 if (ifield == NULL) { \
1039 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1040 if (ifield == NULL) \
1041 GOTO_exceptionThrown(); \
1042 } \
1043 SET_REGISTER##_regsize(vdst, \
1044 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1045 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1046 (u8) GET_REGISTER##_regsize(vdst)); \
1047 UPDATE_FIELD_GET(&ifield->field); \
1048 } \
1049 FINISH(2);
1050
1051#define HANDLE_IGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1052 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1053 { \
1054 InstField* ifield; \
1055 Object* obj; \
1056 EXPORT_PC(); \
1057 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1058 vdst = FETCH(3); \
1059 vsrc1 = FETCH(4); /* object ptr */ \
1060 ILOGV("|iget%s/jumbo v%d,v%d,field@0x%08x", \
1061 (_opname), vdst, vsrc1, ref); \
1062 obj = (Object*) GET_REGISTER(vsrc1); \
1063 if (!checkForNull(obj)) \
1064 GOTO_exceptionThrown(); \
1065 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1066 if (ifield == NULL) { \
1067 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1068 if (ifield == NULL) \
1069 GOTO_exceptionThrown(); \
1070 } \
1071 SET_REGISTER##_regsize(vdst, \
1072 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1073 ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
1074 (u8) GET_REGISTER##_regsize(vdst)); \
1075 UPDATE_FIELD_GET(&ifield->field); \
1076 } \
1077 FINISH(5);
1078
1079#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1080 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1081 { \
1082 Object* obj; \
1083 vdst = INST_A(inst); \
1084 vsrc1 = INST_B(inst); /* object ptr */ \
1085 ref = FETCH(1); /* field offset */ \
1086 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
1087 (_opname), vdst, vsrc1, ref); \
1088 obj = (Object*) GET_REGISTER(vsrc1); \
1089 if (!checkForNullExportPC(obj, fp, pc)) \
1090 GOTO_exceptionThrown(); \
1091 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
1092 ILOGV("+ IGETQ %d=0x%08llx", ref, \
1093 (u8) GET_REGISTER##_regsize(vdst)); \
1094 } \
1095 FINISH(2);
1096
1097#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
1098 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1099 { \
1100 InstField* ifield; \
1101 Object* obj; \
1102 EXPORT_PC(); \
1103 vdst = INST_A(inst); \
1104 vsrc1 = INST_B(inst); /* object ptr */ \
1105 ref = FETCH(1); /* field ref */ \
1106 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1107 obj = (Object*) GET_REGISTER(vsrc1); \
1108 if (!checkForNull(obj)) \
1109 GOTO_exceptionThrown(); \
1110 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1111 if (ifield == NULL) { \
1112 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1113 if (ifield == NULL) \
1114 GOTO_exceptionThrown(); \
1115 } \
1116 dvmSetField##_ftype(obj, ifield->byteOffset, \
1117 GET_REGISTER##_regsize(vdst)); \
1118 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1119 (u8) GET_REGISTER##_regsize(vdst)); \
1120 UPDATE_FIELD_PUT(&ifield->field); \
1121 } \
1122 FINISH(2);
1123
1124#define HANDLE_IPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1125 HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
1126 { \
1127 InstField* ifield; \
1128 Object* obj; \
1129 EXPORT_PC(); \
1130 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1131 vdst = FETCH(3); \
1132 vsrc1 = FETCH(4); /* object ptr */ \
1133 ILOGV("|iput%s/jumbo v%d,v%d,field@0x%08x", \
1134 (_opname), vdst, vsrc1, ref); \
1135 obj = (Object*) GET_REGISTER(vsrc1); \
1136 if (!checkForNull(obj)) \
1137 GOTO_exceptionThrown(); \
1138 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1139 if (ifield == NULL) { \
1140 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1141 if (ifield == NULL) \
1142 GOTO_exceptionThrown(); \
1143 } \
1144 dvmSetField##_ftype(obj, ifield->byteOffset, \
1145 GET_REGISTER##_regsize(vdst)); \
1146 ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
1147 (u8) GET_REGISTER##_regsize(vdst)); \
1148 UPDATE_FIELD_PUT(&ifield->field); \
1149 } \
1150 FINISH(5);
1151
1152#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1153 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1154 { \
1155 Object* obj; \
1156 vdst = INST_A(inst); \
1157 vsrc1 = INST_B(inst); /* object ptr */ \
1158 ref = FETCH(1); /* field offset */ \
1159 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
1160 (_opname), vdst, vsrc1, ref); \
1161 obj = (Object*) GET_REGISTER(vsrc1); \
1162 if (!checkForNullExportPC(obj, fp, pc)) \
1163 GOTO_exceptionThrown(); \
1164 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
1165 ILOGV("+ IPUTQ %d=0x%08llx", ref, \
1166 (u8) GET_REGISTER##_regsize(vdst)); \
1167 } \
1168 FINISH(2);
1169
1170/*
1171 * The JIT needs dvmDexGetResolvedField() to return non-null.
1172 * Because the portable interpreter is not involved with the JIT
1173 * and trace building, we only need the extra check here when this
1174 * code is massaged into a stub called from an assembly interpreter.
1175 * This is controlled by the JIT_STUB_HACK maco.
1176 */
1177
1178#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
1179 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1180 { \
1181 StaticField* sfield; \
1182 vdst = INST_AA(inst); \
1183 ref = FETCH(1); /* field ref */ \
1184 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1185 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1186 if (sfield == NULL) { \
1187 EXPORT_PC(); \
1188 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1189 if (sfield == NULL) \
1190 GOTO_exceptionThrown(); \
1191 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1192 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1193 } \
1194 } \
1195 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1196 ILOGV("+ SGET '%s'=0x%08llx", \
1197 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1198 UPDATE_FIELD_GET(&sfield->field); \
1199 } \
1200 FINISH(2);
1201
1202#define HANDLE_SGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1203 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1204 { \
1205 StaticField* sfield; \
1206 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1207 vdst = FETCH(3); \
1208 ILOGV("|sget%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1209 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1210 if (sfield == NULL) { \
1211 EXPORT_PC(); \
1212 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1213 if (sfield == NULL) \
1214 GOTO_exceptionThrown(); \
1215 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1216 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1217 } \
1218 } \
1219 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1220 ILOGV("+ SGET '%s'=0x%08llx", \
1221 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1222 UPDATE_FIELD_GET(&sfield->field); \
1223 } \
1224 FINISH(4);
1225
1226#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
1227 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1228 { \
1229 StaticField* sfield; \
1230 vdst = INST_AA(inst); \
1231 ref = FETCH(1); /* field ref */ \
1232 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1233 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1234 if (sfield == NULL) { \
1235 EXPORT_PC(); \
1236 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1237 if (sfield == NULL) \
1238 GOTO_exceptionThrown(); \
1239 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1240 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1241 } \
1242 } \
1243 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1244 ILOGV("+ SPUT '%s'=0x%08llx", \
1245 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1246 UPDATE_FIELD_PUT(&sfield->field); \
1247 } \
1248 FINISH(2);
1249
1250#define HANDLE_SPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
1251 HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
1252 { \
1253 StaticField* sfield; \
1254 ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
1255 vdst = FETCH(3); \
1256 ILOGV("|sput%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
1257 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1258 if (sfield == NULL) { \
1259 EXPORT_PC(); \
1260 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1261 if (sfield == NULL) \
1262 GOTO_exceptionThrown(); \
1263 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1264 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1265 } \
1266 } \
1267 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1268 ILOGV("+ SPUT '%s'=0x%08llx", \
1269 sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
1270 UPDATE_FIELD_PUT(&sfield->field); \
1271 } \
1272 FINISH(4);
1273
1274/* File: cstubs/enddefs.cpp */
1275
1276/* undefine "magic" name remapping */
1277#undef retval
1278#undef pc
1279#undef fp
1280#undef curMethod
1281#undef methodClassDex
1282#undef self
1283#undef debugTrackedRefStart
1284
1285/* File: armv5te/debug.cpp */
1286#include <inttypes.h>
1287
1288/*
1289 * Dump the fixed-purpose ARM registers, along with some other info.
1290 *
1291 * This function MUST be compiled in ARM mode -- THUMB will yield bogus
1292 * results.
1293 *
1294 * This will NOT preserve r0-r3/ip.
1295 */
1296void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
1297{
1298 register uint32_t rPC asm("r4");
1299 register uint32_t rFP asm("r5");
1300 register uint32_t rSELF asm("r6");
1301 register uint32_t rINST asm("r7");
1302 register uint32_t rIBASE asm("r8");
1303 register uint32_t r9 asm("r9");
1304 register uint32_t r10 asm("r10");
1305
1306 //extern char dvmAsmInstructionStart[];
1307
1308 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
1309 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1310 rPC, rFP, rSELF, rINST);
1311 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10);
1312
1313 //Thread* self = (Thread*) rSELF;
1314 //const Method* method = self->method;
1315 printf(" + self is %p\n", dvmThreadSelf());
1316 //printf(" + currently in %s.%s %s\n",
1317 // method->clazz->descriptor, method->name, method->shorty);
1318 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
1319 //printf(" + next handler for 0x%02x = %p\n",
1320 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
1321}
1322
1323/*
1324 * Dump the StackSaveArea for the specified frame pointer.
1325 */
1326void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
1327{
1328 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
1329 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
1330#ifdef EASY_GDB
1331 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
1332 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
1333 saveArea->method, saveArea->xtra.currentPc);
1334#else
1335 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
1336 saveArea->prevFrame, saveArea->savedPc,
1337 saveArea->method, saveArea->xtra.currentPc,
1338 *(u4*)fp);
1339#endif
1340}
1341
1342/*
1343 * Does the bulk of the work for common_printMethod().
1344 */
1345void dvmMterpPrintMethod(Method* method)
1346{
1347 /*
1348 * It is a direct (non-virtual) method if it is static, private,
1349 * or a constructor.
1350 */
1351 bool isDirect =
1352 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
1353 (method->name[0] == '<');
1354
1355 char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
1356
1357 printf("<%c:%s.%s %s> ",
1358 isDirect ? 'D' : 'V',
1359 method->clazz->descriptor,
1360 method->name,
1361 desc);
1362
1363 free(desc);
1364}
1365