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gerrit-public.fairphone.software / fp2-dev / platform / docs / source.android.com / 3e381e3a33ba6bb678bfbfc60700a4986271f022 / . / src / tech / dalvik / dalvik-bytecode.html
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6<title>Bytecode for the Dalvik VM</title>
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11
12<h1>Bytecode for the Dalvik VM</h1>
13<p>Copyright &copy; 2007 The Android Open Source Project
14
15<h2>General Design</h2>
16
17<ul>
18<li>The machine model and calling conventions are meant to approximately
19 imitate common real architectures and C-style calling conventions:
20 <ul>
21 <li>The VM is register-based, and frames are fixed in size upon creation.
22 Each frame consists of a particular number of registers (specified by
23 the method) as well as any adjunct data needed to execute the method,
24 such as (but not limited to) the program counter and a reference to the
25 <code>.dex</code> file that contains the method.
26 </li>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]27 <li>When used for bit values (such as integers and floating point
28 numbers), registers are considered 32 bits wide. Adjacent register
29 pairs are used for 64-bit values. There is no alignment requirement
30 for register pairs.
31 </li>
32 <li>When used for object references, registers are considered wide enough
33 to hold exactly one such reference.
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]34 </li>
35 <li>In terms of bitwise representation, <code>(Object) null == (int)
36 0</code>.
37 </li>
38 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers
39 of the method's invocation frame, in order. Wide arguments consume
40 two registers. Instance methods are passed a <code>this</code> reference
41 as their first argument.
42 </li>
43 </ul>
44<li>The storage unit in the instruction stream is a 16-bit unsigned quantity.
45 Some bits in some instructions are ignored / must-be-zero.
46</li>
47<li>Instructions aren't gratuitously limited to a particular type. For
48 example, instructions that move 32-bit register values without interpretation
49 don't have to specify whether they are moving ints or floats.
50</li>
51<li>There are separately enumerated and indexed constant pools for
52 references to strings, types, fields, and methods.
53</li>
54<li>Bitwise literal data is represented in-line in the instruction stream.</li>
55<li>Because, in practice, it is uncommon for a method to need more than
56 16 registers, and because needing more than eight registers <i>is</i>
57 reasonably common, many instructions are limited to only addressing
58 the first 16
59 registers. When reasonably possible, instructions allow references to
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]60 up to the first 256 registers. In addition, some instructions have variants
61 that allow for much larger register counts, including a pair of catch-all
62 <code>move</code> instructions that can address registers in the range
63 <code>v0</code> &ndash; <code>v65535</code>.
64 In cases where an instruction variant isn't
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]65 available to address a desired register, it is expected that the register
66 contents get moved from the original register to a low register (before the
67 operation) and/or moved from a low result register to a high register
68 (after the operation).
69</li>
70<li>There are several "pseudo-instructions" that are used to hold
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]71 variable-length data payloads, which are referred to by regular
72 instructions (for example,
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]73 <code>fill-array-data</code>). Such instructions must never be
74 encountered during the normal flow of execution. In addition, the
75 instructions must be located on even-numbered bytecode offsets (that is,
76 4-byte aligned). In order to meet this requirement, dex generation tools
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]77 must emit an extra <code>nop</code> instruction as a spacer if such an
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]78 instruction would otherwise be unaligned. Finally, though not required,
79 it is expected that most tools will choose to emit these instructions at
80 the ends of methods, since otherwise it would likely be the case that
81 additional instructions would be needed to branch around them.
82</li>
83<li>When installed on a running system, some instructions may be altered,
84 changing their format, as an install-time static linking optimization.
85 This is to allow for faster execution once linkage is known.
86 See the associated
87 <a href="instruction-formats.html">instruction formats document</a>
88 for the suggested variants. The word "suggested" is used advisedly;
89 it is not mandatory to implement these.
90</li>
91<li>Human-syntax and mnemonics:
92 <ul>
93 <li>Dest-then-source ordering for arguments.</li>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]94 <li>Some opcodes have a disambiguating name suffix to indicate the type(s)
95 they operate on:
96 <ul>
97 <li>Type-general 32-bit opcodes are unmarked.</li>
98 <li>Type-general 64-bit opcodes are suffixed with <code>-wide</code>.</li>
99 <li>Type-specific opcodes are suffixed with their type (or a
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]100 straightforward abbreviation), one of: <code>-boolean</code>
101 <code>-byte</code> <code>-char</code> <code>-short</code>
102 <code>-int</code> <code>-long</code> <code>-float</code>
103 <code>-double</code> <code>-object</code> <code>-string</code>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]104 <code>-class</code> <code>-void</code>.</li>
105 </ul>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]106 </li>
107 <li>Some opcodes have a disambiguating suffix to distinguish
108 otherwise-identical operations that have different instruction layouts
109 or options. These suffixes are separated from the main names with a slash
110 ("<code>/</code>") and mainly exist at all to make there be a one-to-one
111 mapping with static constants in the code that generates and interprets
112 executables (that is, to reduce ambiguity for humans).
113 </li>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]114 <li>In the descriptions here, the width of a value (indicating, e.g., the
115 range of a constant or the number of registers possibly addressed) is
116 emphasized by the use of a character per four bits of width.
117 </li>
118 <li>For example, in the instruction
119 "<code>move-wide/from16 vAA, vBBBB</code>":
120 <ul>
121 <li>"<code>move</code>" is the base opcode, indicating the base operation
122 (move a register's value).</li>
123 <li>"<code>wide</code>" is the name suffix, indicating that it operates
124 on wide (64 bit) data.</li>
125 <li>"<code>from16</code>" is the opcode suffix, indicating a variant
126 that has a 16-bit register reference as a source.</li>
127 <li>"<code>vAA</code>" is the destination register (implied by the
128 operation; again, the rule is that destination arguments always come
129 first), which must be in the range <code>v0</code> &ndash;
130 <code>v255</code>.</li>
131 <li>"<code>vBBBB</code>" is the source register, which must be in the
132 range <code>v0</code> &ndash; <code>v65535</code>.</li>
133 </ul>
134 </li>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]135 </ul>
136</li>
137<li>See the <a href="instruction-formats.html">instruction formats
138 document</a> for more details about the various instruction formats
139 (listed under "Op &amp; Format") as well as details about the opcode
140 syntax.
141</li>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]142<li>See the <a href="dex-format.html"><code>.dex</code> file format
143 document</a> for more details about where the bytecode fits into
144 the bigger picture.
145</li>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]146</ul>
147
148<h2>Summary of Instruction Set</h2>
149
150<table class="instruc">
151<thead>
152<tr>
153 <th>Op &amp; Format</th>
154 <th>Mnemonic / Syntax</th>
155 <th>Arguments</th>
156 <th>Description</th>
157</tr>
158</thead>
159<tbody>
160<tr>
161 <td>00 10x</td>
162 <td>nop</td>
163 <td>&nbsp;</td>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]164 <td>Waste cycles.
165 <p><b>Note:</b>
166 Data-bearing pseudo-instructions are tagged with this opcode, in which
167 case the high-order byte of the opcode unit indicates the nature of
168 the data. See "<code>packed-switch-payload</code> Format",
169 "<code>sparse-switch-payload</code> Format", and
170 "<code>fill-array-data-payload</code> Format" below.</p>
171 </td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]172</tr>
173<tr>
174 <td>01 12x</td>
175 <td>move vA, vB</td>
176 <td><code>A:</code> destination register (4 bits)<br/>
177 <code>B:</code> source register (4 bits)</td>
178 <td>Move the contents of one non-object register to another.</td>
179</tr>
180<tr>
181 <td>02 22x</td>
182 <td>move/from16 vAA, vBBBB</td>
183 <td><code>A:</code> destination register (8 bits)<br/>
184 <code>B:</code> source register (16 bits)</td>
185 <td>Move the contents of one non-object register to another.</td>
186</tr>
187<tr>
188 <td>03 32x</td>
189 <td>move/16 vAAAA, vBBBB</td>
190 <td><code>A:</code> destination register (16 bits)<br/>
191 <code>B:</code> source register (16 bits)</td>
192 <td>Move the contents of one non-object register to another.</td>
193</tr>
194<tr>
195 <td>04 12x</td>
196 <td>move-wide vA, vB</td>
197 <td><code>A:</code> destination register pair (4 bits)<br/>
198 <code>B:</code> source register pair (4 bits)</td>
199 <td>Move the contents of one register-pair to another.
200 <p><b>Note:</b>
201 It is legal to move from <code>v<i>N</i></code> to either
202 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations
203 must arrange for both halves of a register pair to be read before
204 anything is written.</p>
205 </td>
206</tr>
207<tr>
208 <td>05 22x</td>
209 <td>move-wide/from16 vAA, vBBBB</td>
210 <td><code>A:</code> destination register pair (8 bits)<br/>
211 <code>B:</code> source register pair (16 bits)</td>
212 <td>Move the contents of one register-pair to another.
213 <p><b>Note:</b>
214 Implementation considerations are the same as <code>move-wide</code>,
215 above.</p>
216 </td>
217</tr>
218<tr>
219 <td>06 32x</td>
220 <td>move-wide/16 vAAAA, vBBBB</td>
221 <td><code>A:</code> destination register pair (16 bits)<br/>
222 <code>B:</code> source register pair (16 bits)</td>
223 <td>Move the contents of one register-pair to another.
224 <p><b>Note:</b>
225 Implementation considerations are the same as <code>move-wide</code>,
226 above.</p>
227 </td>
228</tr>
229<tr>
230 <td>07 12x</td>
231 <td>move-object vA, vB</td>
232 <td><code>A:</code> destination register (4 bits)<br/>
233 <code>B:</code> source register (4 bits)</td>
234 <td>Move the contents of one object-bearing register to another.</td>
235</tr>
236<tr>
237 <td>08 22x</td>
238 <td>move-object/from16 vAA, vBBBB</td>
239 <td><code>A:</code> destination register (8 bits)<br/>
240 <code>B:</code> source register (16 bits)</td>
241 <td>Move the contents of one object-bearing register to another.</td>
242</tr>
243<tr>
244 <td>09 32x</td>
245 <td>move-object/16 vAAAA, vBBBB</td>
246 <td><code>A:</code> destination register (16 bits)<br/>
247 <code>B:</code> source register (16 bits)</td>
248 <td>Move the contents of one object-bearing register to another.</td>
249</tr>
250<tr>
251 <td>0a 11x</td>
252 <td>move-result vAA</td>
253 <td><code>A:</code> destination register (8 bits)</td>
254 <td>Move the single-word non-object result of the most recent
255 <code>invoke-<i>kind</i></code> into the indicated register.
256 This must be done as the instruction immediately after an
257 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result
258 is not to be ignored; anywhere else is invalid.</td>
259</tr>
260<tr>
261 <td>0b 11x</td>
262 <td>move-result-wide vAA</td>
263 <td><code>A:</code> destination register pair (8 bits)</td>
264 <td>Move the double-word result of the most recent
265 <code>invoke-<i>kind</i></code> into the indicated register pair.
266 This must be done as the instruction immediately after an
267 <code>invoke-<i>kind</i></code> whose (double-word) result
268 is not to be ignored; anywhere else is invalid.</td>
269</tr>
270<tr>
271 <td>0c 11x</td>
272 <td>move-result-object vAA</td>
273 <td><code>A:</code> destination register (8 bits)</td>
274 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code>
275 into the indicated register. This must be done as the instruction
276 immediately after an <code>invoke-<i>kind</i></code> or
277 <code>filled-new-array</code>
278 whose (object) result is not to be ignored; anywhere else is invalid.</td>
279</tr>
280<tr>
281 <td>0d 11x</td>
282 <td>move-exception vAA</td>
283 <td><code>A:</code> destination register (8 bits)</td>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]284 <td>Save a just-caught exception into the given register. This must
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]285 be the first instruction of any exception handler whose caught
286 exception is not to be ignored, and this instruction must <i>only</i>
287 ever occur as the first instruction of an exception handler; anywhere
288 else is invalid.</td>
289</tr>
290<tr>
291 <td>0e 10x</td>
292 <td>return-void</td>
293 <td>&nbsp;</td>
294 <td>Return from a <code>void</code> method.</td>
295</tr>
296<tr>
297 <td>0f 11x</td>
298 <td>return vAA</td>
299 <td><code>A:</code> return value register (8 bits)</td>
300 <td>Return from a single-width (32-bit) non-object value-returning
301 method.
302 </td>
303</tr>
304<tr>
305 <td>10 11x</td>
306 <td>return-wide vAA</td>
307 <td><code>A:</code> return value register-pair (8 bits)</td>
308 <td>Return from a double-width (64-bit) value-returning method.</td>
309</tr>
310<tr>
311 <td>11 11x</td>
312 <td>return-object vAA</td>
313 <td><code>A:</code> return value register (8 bits)</td>
314 <td>Return from an object-returning method.</td>
315</tr>
316<tr>
317 <td>12 11n</td>
318 <td>const/4 vA, #+B</td>
319 <td><code>A:</code> destination register (4 bits)<br/>
320 <code>B:</code> signed int (4 bits)</td>
321 <td>Move the given literal value (sign-extended to 32 bits) into
322 the specified register.</td>
323</tr>
324<tr>
325 <td>13 21s</td>
326 <td>const/16 vAA, #+BBBB</td>
327 <td><code>A:</code> destination register (8 bits)<br/>
328 <code>B:</code> signed int (16 bits)</td>
329 <td>Move the given literal value (sign-extended to 32 bits) into
330 the specified register.</td>
331</tr>
332<tr>
333 <td>14 31i</td>
334 <td>const vAA, #+BBBBBBBB</td>
335 <td><code>A:</code> destination register (8 bits)<br/>
336 <code>B:</code> arbitrary 32-bit constant</td>
337 <td>Move the given literal value into the specified register.</td>
338</tr>
339<tr>
340 <td>15 21h</td>
341 <td>const/high16 vAA, #+BBBB0000</td>
342 <td><code>A:</code> destination register (8 bits)<br/>
343 <code>B:</code> signed int (16 bits)</td>
344 <td>Move the given literal value (right-zero-extended to 32 bits) into
345 the specified register.</td>
346</tr>
347<tr>
348 <td>16 21s</td>
349 <td>const-wide/16 vAA, #+BBBB</td>
350 <td><code>A:</code> destination register (8 bits)<br/>
351 <code>B:</code> signed int (16 bits)</td>
352 <td>Move the given literal value (sign-extended to 64 bits) into
353 the specified register-pair.</td>
354</tr>
355<tr>
356 <td>17 31i</td>
357 <td>const-wide/32 vAA, #+BBBBBBBB</td>
358 <td><code>A:</code> destination register (8 bits)<br/>
359 <code>B:</code> signed int (32 bits)</td>
360 <td>Move the given literal value (sign-extended to 64 bits) into
361 the specified register-pair.</td>
362</tr>
363<tr>
364 <td>18 51l</td>
365 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td>
366 <td><code>A:</code> destination register (8 bits)<br/>
367 <code>B:</code> arbitrary double-width (64-bit) constant</td>
368 <td>Move the given literal value into
369 the specified register-pair.</td>
370</tr>
371<tr>
372 <td>19 21h</td>
373 <td>const-wide/high16 vAA, #+BBBB000000000000</td>
374 <td><code>A:</code> destination register (8 bits)<br/>
375 <code>B:</code> signed int (16 bits)</td>
376 <td>Move the given literal value (right-zero-extended to 64 bits) into
377 the specified register-pair.</td>
378</tr>
379<tr>
380 <td>1a 21c</td>
381 <td>const-string vAA, string@BBBB</td>
382 <td><code>A:</code> destination register (8 bits)<br/>
383 <code>B:</code> string index</td>
384 <td>Move a reference to the string specified by the given index into the
385 specified register.</td>
386</tr>
387<tr>
388 <td>1b 31c</td>
389 <td>const-string/jumbo vAA, string@BBBBBBBB</td>
390 <td><code>A:</code> destination register (8 bits)<br/>
391 <code>B:</code> string index</td>
392 <td>Move a reference to the string specified by the given index into the
393 specified register.</td>
394</tr>
395<tr>
396 <td>1c 21c</td>
397 <td>const-class vAA, type@BBBB</td>
398 <td><code>A:</code> destination register (8 bits)<br/>
399 <code>B:</code> type index</td>
400 <td>Move a reference to the class specified by the given index into the
401 specified register. In the case where the indicated type is primitive,
402 this will store a reference to the primitive type's degenerate
403 class.</td>
404</tr>
405<tr>
406 <td>1d 11x</td>
407 <td>monitor-enter vAA</td>
408 <td><code>A:</code> reference-bearing register (8 bits)</td>
409 <td>Acquire the monitor for the indicated object.</td>
410</tr>
411<tr>
412 <td>1e 11x</td>
413 <td>monitor-exit vAA</td>
414 <td><code>A:</code> reference-bearing register (8 bits)</td>
415 <td>Release the monitor for the indicated object.
416 <p><b>Note:</b>
417 If this instruction needs to throw an exception, it must do
418 so as if the pc has already advanced past the instruction.
419 It may be useful to think of this as the instruction successfully
420 executing (in a sense), and the exception getting thrown <i>after</i>
421 the instruction but <i>before</i> the next one gets a chance to
422 run. This definition makes it possible for a method to use
423 a monitor cleanup catch-all (e.g., <code>finally</code>) block as
424 the monitor cleanup for that block itself, as a way to handle the
425 arbitrary exceptions that might get thrown due to the historical
426 implementation of <code>Thread.stop()</code>, while still managing
427 to have proper monitor hygiene.</p>
428 </td>
429</tr>
430<tr>
431 <td>1f 21c</td>
432 <td>check-cast vAA, type@BBBB</td>
433 <td><code>A:</code> reference-bearing register (8 bits)<br/>
434 <code>B:</code> type index (16 bits)</td>
435 <td>Throw a <code>ClassCastException</code> if the reference in the
436 given register cannot be cast to the indicated type.
437 <p><b>Note:</b> Since <code>A</code> must always be a reference
438 (and not a primitive value), this will necessarily fail at runtime
439 (that is, it will throw an exception) if <code>B</code> refers to a
440 primitive type.</p>
441 </td>
442</tr>
443<tr>
444 <td>20 22c</td>
445 <td>instance-of vA, vB, type@CCCC</td>
446 <td><code>A:</code> destination register (4 bits)<br/>
447 <code>B:</code> reference-bearing register (4 bits)<br/>
448 <code>C:</code> type index (16 bits)</td>
449 <td>Store in the given destination register <code>1</code>
450 if the indicated reference is an instance of the given type,
451 or <code>0</code> if not.
452 <p><b>Note:</b> Since <code>B</code> must always be a reference
453 (and not a primitive value), this will always result
454 in <code>0</code> being stored if <code>C</code> refers to a primitive
455 type.</td>
456</tr>
457<tr>
458 <td>21 12x</td>
459 <td>array-length vA, vB</td>
460 <td><code>A:</code> destination register (4 bits)<br/>
461 <code>B:</code> array reference-bearing register (4 bits)</td>
462 <td>Store in the given destination register the length of the indicated
463 array, in entries</td>
464</tr>
465<tr>
466 <td>22 21c</td>
467 <td>new-instance vAA, type@BBBB</td>
468 <td><code>A:</code> destination register (8 bits)<br/>
469 <code>B:</code> type index</td>
470 <td>Construct a new instance of the indicated type, storing a
471 reference to it in the destination. The type must refer to a
472 non-array class.</td>
473</tr>
474<tr>
475 <td>23 22c</td>
476 <td>new-array vA, vB, type@CCCC</td>
477 <td><code>A:</code> destination register (8 bits)<br/>
478 <code>B:</code> size register<br/>
479 <code>C:</code> type index</td>
480 <td>Construct a new array of the indicated type and size. The type
481 must be an array type.</td>
482</tr>
483<tr>
484 <td>24 35c</td>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]485 <td>filled-new-array {vC, vD, vE, vF, vG}, type@BBBB</td>
486 <td>
487 <code>A:</code> array size and argument word count (4 bits)<br/>
488 <code>B:</code> type index (16 bits)<br/>
489 <code>C..G:</code> argument registers (4 bits each)
490 </td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]491 <td>Construct an array of the given type and size, filling it with the
492 supplied contents. The type must be an array type. The array's
493 contents must be single-word (that is,
494 no arrays of <code>long</code> or <code>double</code>, but reference
495 types are acceptable). The constructed
496 instance is stored as a "result" in the same way that the method invocation
497 instructions store their results, so the constructed instance must
498 be moved to a register with an immediately subsequent
499 <code>move-result-object</code> instruction (if it is to be used).</td>
500</tr>
501<tr>
502 <td>25 3rc</td>
503 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td>
504 <td><code>A:</code> array size and argument word count (8 bits)<br/>
505 <code>B:</code> type index (16 bits)<br/>
506 <code>C:</code> first argument register (16 bits)<br/>
507 <code>N = A + C - 1</code></td>
508 <td>Construct an array of the given type and size, filling it with
509 the supplied contents. Clarifications and restrictions are the same
510 as <code>filled-new-array</code>, described above.</td>
511</tr>
512<tr>
513 <td>26 31t</td>
514 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]515 below in "<code>fill-array-data-payload</code> Format")</i></td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]516 <td><code>A:</code> array reference (8 bits)<br/>
517 <code>B:</code> signed "branch" offset to table data pseudo-instruction
518 (32 bits)
519 </td>
520 <td>Fill the given array with the indicated data. The reference must be
521 to an array of primitives, and the data table must match it in type and
522 must contain no more elements than will fit in the array. That is,
523 the array may be larger than the table, and if so, only the initial
524 elements of the array are set, leaving the remainder alone.
525 </td>
526</tr>
527<tr>
528 <td>27 11x</td>
529 <td>throw vAA</td>
530 <td><code>A:</code> exception-bearing register (8 bits)<br/></td>
531 <td>Throw the indicated exception.</td>
532</tr>
533<tr>
534 <td>28 10t</td>
535 <td>goto +AA</td>
536 <td><code>A:</code> signed branch offset (8 bits)</td>
537 <td>Unconditionally jump to the indicated instruction.
538 <p><b>Note:</b>
539 The branch offset must not be <code>0</code>. (A spin
540 loop may be legally constructed either with <code>goto/32</code> or
541 by including a <code>nop</code> as a target before the branch.)</p>
542 </td>
543</tr>
544<tr>
545 <td>29 20t</td>
546 <td>goto/16 +AAAA</td>
547 <td><code>A:</code> signed branch offset (16 bits)<br/></td>
548 <td>Unconditionally jump to the indicated instruction.
549 <p><b>Note:</b>
550 The branch offset must not be <code>0</code>. (A spin
551 loop may be legally constructed either with <code>goto/32</code> or
552 by including a <code>nop</code> as a target before the branch.)</p>
553 </td>
554</tr>
555<tr>
556 <td>2a 30t</td>
557 <td>goto/32 +AAAAAAAA</td>
558 <td><code>A:</code> signed branch offset (32 bits)<br/></td>
559 <td>Unconditionally jump to the indicated instruction.</td>
560</tr>
561<tr>
562 <td>2b 31t</td>
563 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]564 specified below in "<code>packed-switch-payload</code> Format")</i></td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]565 <td><code>A:</code> register to test<br/>
566 <code>B:</code> signed "branch" offset to table data pseudo-instruction
567 (32 bits)
568 </td>
569 <td>Jump to a new instruction based on the value in the
570 given register, using a table of offsets corresponding to each value
571 in a particular integral range, or fall through to the next
572 instruction if there is no match.
573 </td>
574</tr>
575<tr>
576 <td>2c 31t</td>
577 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]578 specified below in "<code>sparse-switch-payload</code> Format")</i></td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]579 <td><code>A:</code> register to test<br/>
580 <code>B:</code> signed "branch" offset to table data pseudo-instruction
581 (32 bits)
582 </td>
583 <td>Jump to a new instruction based on the value in the given
584 register, using an ordered table of value-offset pairs, or fall
585 through to the next instruction if there is no match.
586 </td>
587</tr>
588<tr>
589 <td>2d..31 23x</td>
590 <td>cmp<i>kind</i> vAA, vBB, vCC<br/>
591 2d: cmpl-float <i>(lt bias)</i><br/>
592 2e: cmpg-float <i>(gt bias)</i><br/>
593 2f: cmpl-double <i>(lt bias)</i><br/>
594 30: cmpg-double <i>(gt bias)</i><br/>
595 31: cmp-long
596 </td>
597 <td><code>A:</code> destination register (8 bits)<br/>
598 <code>B:</code> first source register or pair<br/>
599 <code>C:</code> second source register or pair</td>
600 <td>Perform the indicated floating point or <code>long</code> comparison,
Elliott Hughes3e381e32012-07-30 16:05:39 -0700[diff] [blame^]601 setting <code>a</code> to <code>0</code> if <code>b == c</code>,
602 <code>1</code> if <code>b &gt; c</code>,
603 or <code>-1</code> if <code>b &lt; c</code>.
604 The "bias" listed for the floating point operations
605 indicates how <code>NaN</code> comparisons are treated: "gt bias"
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]606 instructions return <code>1</code> for <code>NaN</code> comparisons,
Elliott Hughes3e381e32012-07-30 16:05:39 -0700[diff] [blame^]607 and "lt bias" instructions return <code>-1</code>.
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]608 <p>For example, to check to see if floating point
Elliott Hughes3e381e32012-07-30 16:05:39 -0700[diff] [blame^]609 <code>x &lt; y</code> it is advisable to use
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]610 <code>cmpg-float</code>; a result of <code>-1</code> indicates that
611 the test was true, and the other values indicate it was false either
Elliott Hughes3e381e32012-07-30 16:05:39 -0700[diff] [blame^]612 due to a valid comparison or because one of the values was
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]613 <code>NaN</code>.</p>
614 </td>
615</tr>
616<tr>
617 <td>32..37 22t</td>
618 <td>if-<i>test</i> vA, vB, +CCCC<br/>
619 32: if-eq<br/>
620 33: if-ne<br/>
621 34: if-lt<br/>
622 35: if-ge<br/>
623 36: if-gt<br/>
624 37: if-le<br/>
625 </td>
626 <td><code>A:</code> first register to test (4 bits)<br/>
627 <code>B:</code> second register to test (4 bits)<br/>
628 <code>C:</code> signed branch offset (16 bits)</td>
629 <td>Branch to the given destination if the given two registers' values
630 compare as specified.
631 <p><b>Note:</b>
632 The branch offset must not be <code>0</code>. (A spin
633 loop may be legally constructed either by branching around a
634 backward <code>goto</code> or by including a <code>nop</code> as
635 a target before the branch.)</p>
636 </td>
637</tr>
638<tr>
639 <td>38..3d 21t</td>
640 <td>if-<i>test</i>z vAA, +BBBB<br/>
641 38: if-eqz<br/>
642 39: if-nez<br/>
643 3a: if-ltz<br/>
644 3b: if-gez<br/>
645 3c: if-gtz<br/>
646 3d: if-lez<br/>
647 </td>
648 <td><code>A:</code> register to test (8 bits)<br/>
649 <code>B:</code> signed branch offset (16 bits)</td>
650 <td>Branch to the given destination if the given register's value compares
651 with 0 as specified.
652 <p><b>Note:</b>
653 The branch offset must not be <code>0</code>. (A spin
654 loop may be legally constructed either by branching around a
655 backward <code>goto</code> or by including a <code>nop</code> as
656 a target before the branch.)</p>
657 </td>
658</tr>
659<tr>
660 <td>3e..43 10x</td>
661 <td><i>(unused)</i></td>
662 <td>&nbsp;</td>
663 <td><i>(unused)</i></td>
664</tr>
665<tr>
666 <td>44..51 23x</td>
667 <td><i>arrayop</i> vAA, vBB, vCC<br/>
668 44: aget<br/>
669 45: aget-wide<br/>
670 46: aget-object<br/>
671 47: aget-boolean<br/>
672 48: aget-byte<br/>
673 49: aget-char<br/>
674 4a: aget-short<br/>
675 4b: aput<br/>
676 4c: aput-wide<br/>
677 4d: aput-object<br/>
678 4e: aput-boolean<br/>
679 4f: aput-byte<br/>
680 50: aput-char<br/>
681 51: aput-short
682 </td>
683 <td><code>A:</code> value register or pair; may be source or dest
684 (8 bits)<br/>
685 <code>B:</code> array register (8 bits)<br/>
686 <code>C:</code> index register (8 bits)</td>
687 <td>Perform the identified array operation at the identified index of
688 the given array, loading or storing into the value register.</td>
689</tr>
690<tr>
691 <td>52..5f 22c</td>
692 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
693 52: iget<br/>
694 53: iget-wide<br/>
695 54: iget-object<br/>
696 55: iget-boolean<br/>
697 56: iget-byte<br/>
698 57: iget-char<br/>
699 58: iget-short<br/>
700 59: iput<br/>
701 5a: iput-wide<br/>
702 5b: iput-object<br/>
703 5c: iput-boolean<br/>
704 5d: iput-byte<br/>
705 5e: iput-char<br/>
706 5f: iput-short
707 </td>
708 <td><code>A:</code> value register or pair; may be source or dest
709 (4 bits)<br/>
710 <code>B:</code> object register (4 bits)<br/>
711 <code>C:</code> instance field reference index (16 bits)</td>
712 <td>Perform the identified object instance field operation with
713 the identified field, loading or storing into the value register.
714 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
715 altering the field argument to be a more direct offset.</p>
716 </td>
717</tr>
718<tr>
719 <td>60..6d 21c</td>
720 <td>s<i>staticop</i> vAA, field@BBBB<br/>
721 60: sget<br/>
722 61: sget-wide<br/>
723 62: sget-object<br/>
724 63: sget-boolean<br/>
725 64: sget-byte<br/>
726 65: sget-char<br/>
727 66: sget-short<br/>
728 67: sput<br/>
729 68: sput-wide<br/>
730 69: sput-object<br/>
731 6a: sput-boolean<br/>
732 6b: sput-byte<br/>
733 6c: sput-char<br/>
734 6d: sput-short
735 </td>
736 <td><code>A:</code> value register or pair; may be source or dest
737 (8 bits)<br/>
738 <code>B:</code> static field reference index (16 bits)</td>
739 <td>Perform the identified object static field operation with the identified
740 static field, loading or storing into the value register.
741 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
742 altering the field argument to be a more direct offset.</p>
743 </td>
744</tr>
745<tr>
746 <td>6e..72 35c</td>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]747 <td>invoke-<i>kind</i> {vC, vD, vE, vF, vG}, meth@BBBB<br/>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]748 6e: invoke-virtual<br/>
749 6f: invoke-super<br/>
750 70: invoke-direct<br/>
751 71: invoke-static<br/>
752 72: invoke-interface
753 </td>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]754 <td>
755 <code>A:</code> argument word count (4 bits)<br/>
756 <code>B:</code> method reference index (16 bits)<br/>
757 <code>C..G:</code> argument registers (4 bits each)
758 </td>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]759 <td>Call the indicated method. The result (if any) may be stored
760 with an appropriate <code>move-result*</code> variant as the immediately
761 subsequent instruction.
762 <p><code>invoke-virtual</code> is used to invoke a normal virtual
763 method (a method that is not <code>private</code>, <code>static</code>,
764 or <code>final</code>, and is also not a constructor).</p>
765 <p><code>invoke-super</code> is used to invoke the closest superclass's
766 virtual method (as opposed to the one with the same <code>method_id</code>
767 in the calling class). The same method restrictions hold as for
768 <code>invoke-virtual</code>.</p>
769 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code>
770 direct method (that is, an instance method that is by its nature
771 non-overridable, namely either a <code>private</code> instance method
772 or a constructor).</p>
773 <p><code>invoke-static</code> is used to invoke a <code>static</code>
774 method (which is always considered a direct method).</p>
775 <p><code>invoke-interface</code> is used to invoke an
776 <code>interface</code> method, that is, on an object whose concrete
777 class isn't known, using a <code>method_id</code> that refers to
778 an <code>interface</code>.</p>
779 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
780 altering the method argument to be a more direct offset
781 (or pair thereof).</p>
782 </td>
783</tr>
784<tr>
785 <td>73 10x</td>
786 <td><i>(unused)</i></td>
787 <td>&nbsp;</td>
788 <td><i>(unused)</i></td>
789</tr>
790<tr>
791 <td>74..78 3rc</td>
792 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/>
793 74: invoke-virtual/range<br/>
794 75: invoke-super/range<br/>
795 76: invoke-direct/range<br/>
796 77: invoke-static/range<br/>
797 78: invoke-interface/range
798 </td>
799 <td><code>A:</code> argument word count (8 bits)<br/>
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]800 <code>B:</code> method reference index (16 bits)<br/>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]801 <code>C:</code> first argument register (16 bits)<br/>
802 <code>N = A + C - 1</code></td>
803 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
804 description above for details, caveats, and suggestions.
805 </td>
806</tr>
807<tr>
808 <td>79..7a 10x</td>
809 <td><i>(unused)</i></td>
810 <td>&nbsp;</td>
811 <td><i>(unused)</i></td>
812</tr>
813<tr>
814 <td>7b..8f 12x</td>
815 <td><i>unop</i> vA, vB<br/>
816 7b: neg-int<br/>
817 7c: not-int<br/>
818 7d: neg-long<br/>
819 7e: not-long<br/>
820 7f: neg-float<br/>
821 80: neg-double<br/>
822 81: int-to-long<br/>
823 82: int-to-float<br/>
824 83: int-to-double<br/>
825 84: long-to-int<br/>
826 85: long-to-float<br/>
827 86: long-to-double<br/>
828 87: float-to-int<br/>
829 88: float-to-long<br/>
830 89: float-to-double<br/>
831 8a: double-to-int<br/>
832 8b: double-to-long<br/>
833 8c: double-to-float<br/>
834 8d: int-to-byte<br/>
835 8e: int-to-char<br/>
836 8f: int-to-short
837 </td>
838 <td><code>A:</code> destination register or pair (4 bits)<br/>
839 <code>B:</code> source register or pair (4 bits)</td>
840 <td>Perform the identified unary operation on the source register,
841 storing the result in the destination register.</td>
842</tr>
843
844<tr>
845 <td>90..af 23x</td>
846 <td><i>binop</i> vAA, vBB, vCC<br/>
847 90: add-int<br/>
848 91: sub-int<br/>
849 92: mul-int<br/>
850 93: div-int<br/>
851 94: rem-int<br/>
852 95: and-int<br/>
853 96: or-int<br/>
854 97: xor-int<br/>
855 98: shl-int<br/>
856 99: shr-int<br/>
857 9a: ushr-int<br/>
858 9b: add-long<br/>
859 9c: sub-long<br/>
860 9d: mul-long<br/>
861 9e: div-long<br/>
862 9f: rem-long<br/>
863 a0: and-long<br/>
864 a1: or-long<br/>
865 a2: xor-long<br/>
866 a3: shl-long<br/>
867 a4: shr-long<br/>
868 a5: ushr-long<br/>
869 a6: add-float<br/>
870 a7: sub-float<br/>
871 a8: mul-float<br/>
872 a9: div-float<br/>
873 aa: rem-float<br/>
874 ab: add-double<br/>
875 ac: sub-double<br/>
876 ad: mul-double<br/>
877 ae: div-double<br/>
878 af: rem-double
879 </td>
880 <td><code>A:</code> destination register or pair (8 bits)<br/>
881 <code>B:</code> first source register or pair (8 bits)<br/>
882 <code>C:</code> second source register or pair (8 bits)</td>
883 <td>Perform the identified binary operation on the two source registers,
884 storing the result in the first source register.</td>
885</tr>
886<tr>
887 <td>b0..cf 12x</td>
888 <td><i>binop</i>/2addr vA, vB<br/>
889 b0: add-int/2addr<br/>
890 b1: sub-int/2addr<br/>
891 b2: mul-int/2addr<br/>
892 b3: div-int/2addr<br/>
893 b4: rem-int/2addr<br/>
894 b5: and-int/2addr<br/>
895 b6: or-int/2addr<br/>
896 b7: xor-int/2addr<br/>
897 b8: shl-int/2addr<br/>
898 b9: shr-int/2addr<br/>
899 ba: ushr-int/2addr<br/>
900 bb: add-long/2addr<br/>
901 bc: sub-long/2addr<br/>
902 bd: mul-long/2addr<br/>
903 be: div-long/2addr<br/>
904 bf: rem-long/2addr<br/>
905 c0: and-long/2addr<br/>
906 c1: or-long/2addr<br/>
907 c2: xor-long/2addr<br/>
908 c3: shl-long/2addr<br/>
909 c4: shr-long/2addr<br/>
910 c5: ushr-long/2addr<br/>
911 c6: add-float/2addr<br/>
912 c7: sub-float/2addr<br/>
913 c8: mul-float/2addr<br/>
914 c9: div-float/2addr<br/>
915 ca: rem-float/2addr<br/>
916 cb: add-double/2addr<br/>
917 cc: sub-double/2addr<br/>
918 cd: mul-double/2addr<br/>
919 ce: div-double/2addr<br/>
920 cf: rem-double/2addr
921 </td>
922 <td><code>A:</code> destination and first source register or pair
923 (4 bits)<br/>
924 <code>B:</code> second source register or pair (4 bits)</td>
925 <td>Perform the identified binary operation on the two source registers,
926 storing the result in the first source register.</td>
927</tr>
928<tr>
929 <td>d0..d7 22s</td>
930 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/>
931 d0: add-int/lit16<br/>
932 d1: rsub-int (reverse subtract)<br/>
933 d2: mul-int/lit16<br/>
934 d3: div-int/lit16<br/>
935 d4: rem-int/lit16<br/>
936 d5: and-int/lit16<br/>
937 d6: or-int/lit16<br/>
938 d7: xor-int/lit16
939 </td>
940 <td><code>A:</code> destination register (4 bits)<br/>
941 <code>B:</code> source register (4 bits)<br/>
942 <code>C:</code> signed int constant (16 bits)</td>
943 <td>Perform the indicated binary op on the indicated register (first
944 argument) and literal value (second argument), storing the result in
945 the destination register.
946 <p><b>Note:</b>
947 <code>rsub-int</code> does not have a suffix since this version is the
948 main opcode of its family. Also, see below for details on its semantics.
949 </p>
950 </td>
951</tr>
952<tr>
953 <td>d8..e2 22b</td>
954 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/>
955 d8: add-int/lit8<br/>
956 d9: rsub-int/lit8<br/>
957 da: mul-int/lit8<br/>
958 db: div-int/lit8<br/>
959 dc: rem-int/lit8<br/>
960 dd: and-int/lit8<br/>
961 de: or-int/lit8<br/>
962 df: xor-int/lit8<br/>
963 e0: shl-int/lit8<br/>
964 e1: shr-int/lit8<br/>
965 e2: ushr-int/lit8
966 </td>
967 <td><code>A:</code> destination register (8 bits)<br/>
968 <code>B:</code> source register (8 bits)<br/>
969 <code>C:</code> signed int constant (8 bits)</td>
970 <td>Perform the indicated binary op on the indicated register (first
971 argument) and literal value (second argument), storing the result
972 in the destination register.
973 <p><b>Note:</b> See below for details on the semantics of
974 <code>rsub-int</code>.</p>
975 </td>
976</tr>
977<tr>
978 <td>e3..ff 10x</td>
979 <td><i>(unused)</i></td>
980 <td>&nbsp;</td>
981 <td><i>(unused)</i></td>
982</tr>
983</tbody>
984</table>
985
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]986<h2><code>packed-switch-payload</code> Format</h2>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]987
988<table class="supplement">
989<thead>
990<tr>
991 <th>Name</th>
992 <th>Format</th>
993 <th>Description</th>
994</tr>
995</thead>
996<tbody>
997<tr>
998 <td>ident</td>
999 <td>ushort = 0x0100</td>
1000 <td>identifying pseudo-opcode</td>
1001</tr>
1002<tr>
1003 <td>size</td>
1004 <td>ushort</td>
1005 <td>number of entries in the table</td>
1006</tr>
1007<tr>
1008 <td>first_key</td>
1009 <td>int</td>
1010 <td>first (and lowest) switch case value</td>
1011</tr>
1012<tr>
1013 <td>targets</td>
1014 <td>int[]</td>
1015 <td>list of <code>size</code> relative branch targets. The targets are
1016 relative to the address of the switch opcode, not of this table.
1017 </td>
1018</tr>
1019</tbody>
1020</table>
1021
1022<p><b>Note:</b> The total number of code units for an instance of this
1023table is <code>(size * 2) + 4</code>.</p>
1024
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]1025<h2><code>sparse-switch-payload</code> Format</h2>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]1026
1027<table class="supplement">
1028<thead>
1029<tr>
1030 <th>Name</th>
1031 <th>Format</th>
1032 <th>Description</th>
1033</tr>
1034</thead>
1035<tbody>
1036<tr>
1037 <td>ident</td>
1038 <td>ushort = 0x0200</td>
1039 <td>identifying pseudo-opcode</td>
1040</tr>
1041<tr>
1042 <td>size</td>
1043 <td>ushort</td>
1044 <td>number of entries in the table</td>
1045</tr>
1046<tr>
1047 <td>keys</td>
1048 <td>int[]</td>
1049 <td>list of <code>size</code> key values, sorted low-to-high</td>
1050</tr>
1051<tr>
1052 <td>targets</td>
1053 <td>int[]</td>
1054 <td>list of <code>size</code> relative branch targets, each corresponding
1055 to the key value at the same index. The targets are
1056 relative to the address of the switch opcode, not of this table.
1057 </td>
1058</tr>
1059</tbody>
1060</table>
1061
1062<p><b>Note:</b> The total number of code units for an instance of this
1063table is <code>(size * 4) + 2</code>.</p>
1064
Elliott Hughes8d777942012-01-05 17:27:02 -0800[diff] [blame]1065<h2><code>fill-array-data-payload</code> Format</h2>
Dan Bornstein25705bc2011-04-12 16:23:13 -0700[diff] [blame]1066
1067<table class="supplement">
1068<thead>
1069<tr>
1070 <th>Name</th>
1071 <th>Format</th>
1072 <th>Description</th>
1073</tr>
1074</thead>
1075<tbody>
1076<tr>
1077 <td>ident</td>
1078 <td>ushort = 0x0300</td>
1079 <td>identifying pseudo-opcode</td>
1080</tr>
1081<tr>
1082 <td>element_width</td>
1083 <td>ushort</td>
1084 <td>number of bytes in each element</td>
1085</tr>
1086<tr>
1087 <td>size</td>
1088 <td>uint</td>
1089 <td>number of elements in the table</td>
1090</tr>
1091<tr>
1092 <td>data</td>
1093 <td>ubyte[]</td>
1094 <td>data values</td>
1095</tr>
1096</tbody>
1097</table>
1098
1099<p><b>Note:</b> The total number of code units for an instance of this
1100table is <code>(size * element_width + 1) / 2 + 4</code>.</p>
1101
1102
1103<h2>Mathematical Operation Details</h2>
1104
1105<p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using
1106round-to-nearest and gradual underflow, except where stated otherwise.</p>
1107
1108<table class="math">
1109<thead>
1110<tr>
1111 <th>Opcode</th>
1112 <th>C Semantics</th>
1113 <th>Notes</th>
1114</tr>
1115</thead>
1116<tbody>
1117<tr>
1118 <td>neg-int</td>
1119 <td>int32 a;<br/>
1120 int32 result = -a;
1121 </td>
1122 <td>Unary twos-complement.</td>
1123</tr>
1124<tr>
1125 <td>not-int</td>
1126 <td>int32 a;<br/>
1127 int32 result = ~a;
1128 </td>
1129 <td>Unary ones-complement.</td>
1130</tr>
1131<tr>
1132 <td>neg-long</td>
1133 <td>int64 a;<br/>
1134 int64 result = -a;
1135 </td>
1136 <td>Unary twos-complement.</td>
1137</tr>
1138<tr>
1139 <td>not-long</td>
1140 <td>int64 a;<br/>
1141 int64 result = ~a;
1142 </td>
1143 <td>Unary ones-complement.</td>
1144</tr>
1145<tr>
1146 <td>neg-float</td>
1147 <td>float a;<br/>
1148 float result = -a;
1149 </td>
1150 <td>Floating point negation.</td>
1151</tr>
1152<tr>
1153 <td>neg-double</td>
1154 <td>double a;<br/>
1155 double result = -a;
1156 </td>
1157 <td>Floating point negation.</td>
1158</tr>
1159<tr>
1160 <td>int-to-long</td>
1161 <td>int32 a;<br/>
1162 int64 result = (int64) a;
1163 </td>
1164 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td>
1165</tr>
1166<tr>
1167 <td>int-to-float</td>
1168 <td>int32 a;<br/>
1169 float result = (float) a;
1170 </td>
1171 <td>Conversion of <code>int32</code> to <code>float</code>, using
1172 round-to-nearest. This loses precision for some values.
1173 </td>
1174</tr>
1175<tr>
1176 <td>int-to-double</td>
1177 <td>int32 a;<br/>
1178 double result = (double) a;
1179 </td>
1180 <td>Conversion of <code>int32</code> to <code>double</code>.</td>
1181</tr>
1182<tr>
1183 <td>long-to-int</td>
1184 <td>int64 a;<br/>
1185 int32 result = (int32) a;
1186 </td>
1187 <td>Truncation of <code>int64</code> into <code>int32</code>.</td>
1188</tr>
1189<tr>
1190 <td>long-to-float</td>
1191 <td>int64 a;<br/>
1192 float result = (float) a;
1193 </td>
1194 <td>Conversion of <code>int64</code> to <code>float</code>, using
1195 round-to-nearest. This loses precision for some values.
1196 </td>
1197</tr>
1198<tr>
1199 <td>long-to-double</td>
1200 <td>int64 a;<br/>
1201 double result = (double) a;
1202 </td>
1203 <td>Conversion of <code>int64</code> to <code>double</code>, using
1204 round-to-nearest. This loses precision for some values.
1205 </td>
1206</tr>
1207<tr>
1208 <td>float-to-int</td>
1209 <td>float a;<br/>
1210 int32 result = (int32) a;
1211 </td>
1212 <td>Conversion of <code>float</code> to <code>int32</code>, using
1213 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero)
1214 convert to the integer <code>0</code>. Infinities and values with
1215 too large a magnitude to be represented get converted to either
1216 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign.
1217 </td>
1218</tr>
1219<tr>
1220 <td>float-to-long</td>
1221 <td>float a;<br/>
1222 int64 result = (int64) a;
1223 </td>
1224 <td>Conversion of <code>float</code> to <code>int64</code>, using
1225 round-toward-zero. The same special case rules as for
1226 <code>float-to-int</code> apply here, except that out-of-range values
1227 get converted to either <code>0x7fffffffffffffff</code> or
1228 <code>-0x8000000000000000</code> depending on sign.
1229 </td>
1230</tr>
1231<tr>
1232 <td>float-to-double</td>
1233 <td>float a;<br/>
1234 double result = (double) a;
1235 </td>
1236 <td>Conversion of <code>float</code> to <code>double</code>, preserving
1237 the value exactly.
1238 </td>
1239</tr>
1240<tr>
1241 <td>double-to-int</td>
1242 <td>double a;<br/>
1243 int32 result = (int32) a;
1244 </td>
1245 <td>Conversion of <code>double</code> to <code>int32</code>, using
1246 round-toward-zero. The same special case rules as for
1247 <code>float-to-int</code> apply here.
1248 </td>
1249</tr>
1250<tr>
1251 <td>double-to-long</td>
1252 <td>double a;<br/>
1253 int64 result = (int64) a;
1254 </td>
1255 <td>Conversion of <code>double</code> to <code>int64</code>, using
1256 round-toward-zero. The same special case rules as for
1257 <code>float-to-long</code> apply here.
1258 </td>
1259</tr>
1260<tr>
1261 <td>double-to-float</td>
1262 <td>double a;<br/>
1263 float result = (float) a;
1264 </td>
1265 <td>Conversion of <code>double</code> to <code>float</code>, using
1266 round-to-nearest. This loses precision for some values.
1267 </td>
1268</tr>
1269<tr>
1270 <td>int-to-byte</td>
1271 <td>int32 a;<br/>
1272 int32 result = (a &lt;&lt; 24) &gt;&gt; 24;
1273 </td>
1274 <td>Truncation of <code>int32</code> to <code>int8</code>, sign
1275 extending the result.
1276 </td>
1277</tr>
1278<tr>
1279 <td>int-to-char</td>
1280 <td>int32 a;<br/>
1281 int32 result = a &amp; 0xffff;
1282 </td>
1283 <td>Truncation of <code>int32</code> to <code>uint16</code>, without
1284 sign extension.
1285 </td>
1286</tr>
1287<tr>
1288 <td>int-to-short</td>
1289 <td>int32 a;<br/>
1290 int32 result = (a &lt;&lt; 16) &gt;&gt; 16;
1291 </td>
1292 <td>Truncation of <code>int32</code> to <code>int16</code>, sign
1293 extending the result.
1294 </td>
1295</tr>
1296<tr>
1297 <td>add-int</td>
1298 <td>int32 a, b;<br/>
1299 int32 result = a + b;
1300 </td>
1301 <td>Twos-complement addition.</td>
1302</tr>
1303<tr>
1304 <td>sub-int</td>
1305 <td>int32 a, b;<br/>
1306 int32 result = a - b;
1307 </td>
1308 <td>Twos-complement subtraction.</td>
1309</tr>
1310<tr>
1311 <td>rsub-int</td>
1312 <td>int32 a, b;<br/>
1313 int32 result = b - a;
1314 </td>
1315 <td>Twos-complement reverse subtraction.</td>
1316</tr>
1317<tr>
1318 <td>mul-int</td>
1319 <td>int32 a, b;<br/>
1320 int32 result = a * b;
1321 </td>
1322 <td>Twos-complement multiplication.</td>
1323</tr>
1324<tr>
1325 <td>div-int</td>
1326 <td>int32 a, b;<br/>
1327 int32 result = a / b;
1328 </td>
1329 <td>Twos-complement division, rounded towards zero (that is, truncated to
1330 integer). This throws <code>ArithmeticException</code> if
1331 <code>b == 0</code>.
1332 </td>
1333</tr>
1334<tr>
1335 <td>rem-int</td>
1336 <td>int32 a, b;<br/>
1337 int32 result = a % b;
1338 </td>
1339 <td>Twos-complement remainder after division. The sign of the result
1340 is the same as that of <code>a</code>, and it is more precisely
1341 defined as <code>result == a - (a / b) * b</code>. This throws
1342 <code>ArithmeticException</code> if <code>b == 0</code>.
1343 </td>
1344</tr>
1345<tr>
1346 <td>and-int</td>
1347 <td>int32 a, b;<br/>
1348 int32 result = a &amp; b;
1349 </td>
1350 <td>Bitwise AND.</td>
1351</tr>
1352<tr>
1353 <td>or-int</td>
1354 <td>int32 a, b;<br/>
1355 int32 result = a | b;
1356 </td>
1357 <td>Bitwise OR.</td>
1358</tr>
1359<tr>
1360 <td>xor-int</td>
1361 <td>int32 a, b;<br/>
1362 int32 result = a ^ b;
1363 </td>
1364 <td>Bitwise XOR.</td>
1365</tr>
1366<tr>
1367 <td>shl-int</td>
1368 <td>int32 a, b;<br/>
1369 int32 result = a &lt;&lt; (b &amp; 0x1f);
1370 </td>
1371 <td>Bitwise shift left (with masked argument).</td>
1372</tr>
1373<tr>
1374 <td>shr-int</td>
1375 <td>int32 a, b;<br/>
1376 int32 result = a &gt;&gt; (b &amp; 0x1f);
1377 </td>
1378 <td>Bitwise signed shift right (with masked argument).</td>
1379</tr>
1380<tr>
1381 <td>ushr-int</td>
1382 <td>uint32 a, b;<br/>
1383 int32 result = a &gt;&gt; (b &amp; 0x1f);
1384 </td>
1385 <td>Bitwise unsigned shift right (with masked argument).</td>
1386</tr>
1387<tr>
1388 <td>add-long</td>
1389 <td>int64 a, b;<br/>
1390 int64 result = a + b;
1391 </td>
1392 <td>Twos-complement addition.</td>
1393</tr>
1394<tr>
1395 <td>sub-long</td>
1396 <td>int64 a, b;<br/>
1397 int64 result = a - b;
1398 </td>
1399 <td>Twos-complement subtraction.</td>
1400</tr>
1401<tr>
1402 <td>mul-long</td>
1403 <td>int64 a, b;<br/>
1404 int64 result = a * b;
1405 </td>
1406 <td>Twos-complement multiplication.</td>
1407</tr>
1408<tr>
1409 <td>div-long</td>
1410 <td>int64 a, b;<br/>
1411 int64 result = a / b;
1412 </td>
1413 <td>Twos-complement division, rounded towards zero (that is, truncated to
1414 integer). This throws <code>ArithmeticException</code> if
1415 <code>b == 0</code>.
1416 </td>
1417</tr>
1418<tr>
1419 <td>rem-long</td>
1420 <td>int64 a, b;<br/>
1421 int64 result = a % b;
1422 </td>
1423 <td>Twos-complement remainder after division. The sign of the result
1424 is the same as that of <code>a</code>, and it is more precisely
1425 defined as <code>result == a - (a / b) * b</code>. This throws
1426 <code>ArithmeticException</code> if <code>b == 0</code>.
1427 </td>
1428</tr>
1429<tr>
1430 <td>and-long</td>
1431 <td>int64 a, b;<br/>
1432 int64 result = a &amp; b;
1433 </td>
1434 <td>Bitwise AND.</td>
1435</tr>
1436<tr>
1437 <td>or-long</td>
1438 <td>int64 a, b;<br/>
1439 int64 result = a | b;
1440 </td>
1441 <td>Bitwise OR.</td>
1442</tr>
1443<tr>
1444 <td>xor-long</td>
1445 <td>int64 a, b;<br/>
1446 int64 result = a ^ b;
1447 </td>
1448 <td>Bitwise XOR.</td>
1449</tr>
1450<tr>
1451 <td>shl-long</td>
1452 <td>int64 a, b;<br/>
1453 int64 result = a &lt;&lt; (b &amp; 0x3f);
1454 </td>
1455 <td>Bitwise shift left (with masked argument).</td>
1456</tr>
1457<tr>
1458 <td>shr-long</td>
1459 <td>int64 a, b;<br/>
1460 int64 result = a &gt;&gt; (b &amp; 0x3f);
1461 </td>
1462 <td>Bitwise signed shift right (with masked argument).</td>
1463</tr>
1464<tr>
1465 <td>ushr-long</td>
1466 <td>uint64 a, b;<br/>
1467 int64 result = a &gt;&gt; (b &amp; 0x3f);
1468 </td>
1469 <td>Bitwise unsigned shift right (with masked argument).</td>
1470</tr>
1471<tr>
1472 <td>add-float</td>
1473 <td>float a, b;<br/>
1474 float result = a + b;
1475 </td>
1476 <td>Floating point addition.</td>
1477</tr>
1478<tr>
1479 <td>sub-float</td>
1480 <td>float a, b;<br/>
1481 float result = a - b;
1482 </td>
1483 <td>Floating point subtraction.</td>
1484</tr>
1485<tr>
1486 <td>mul-float</td>
1487 <td>float a, b;<br/>
1488 float result = a * b;
1489 </td>
1490 <td>Floating point multiplication.</td>
1491</tr>
1492<tr>
1493 <td>div-float</td>
1494 <td>float a, b;<br/>
1495 float result = a / b;
1496 </td>
1497 <td>Floating point division.</td>
1498</tr>
1499<tr>
1500 <td>rem-float</td>
1501 <td>float a, b;<br/>
1502 float result = a % b;
1503 </td>
1504 <td>Floating point remainder after division. This function is different
1505 than IEEE 754 remainder and is defined as
1506 <code>result == a - roundTowardZero(a / b) * b</code>.
1507 </td>
1508</tr>
1509<tr>
1510 <td>add-double</td>
1511 <td>double a, b;<br/>
1512 double result = a + b;
1513 </td>
1514 <td>Floating point addition.</td>
1515</tr>
1516<tr>
1517 <td>sub-double</td>
1518 <td>double a, b;<br/>
1519 double result = a - b;
1520 </td>
1521 <td>Floating point subtraction.</td>
1522</tr>
1523<tr>
1524 <td>mul-double</td>
1525 <td>double a, b;<br/>
1526 double result = a * b;
1527 </td>
1528 <td>Floating point multiplication.</td>
1529</tr>
1530<tr>
1531 <td>div-double</td>
1532 <td>double a, b;<br/>
1533 double result = a / b;
1534 </td>
1535 <td>Floating point division.</td>
1536</tr>
1537<tr>
1538 <td>rem-double</td>
1539 <td>double a, b;<br/>
1540 double result = a % b;
1541 </td>
1542 <td>Floating point remainder after division. This function is different
1543 than IEEE 754 remainder and is defined as
1544 <code>result == a - roundTowardZero(a / b) * b</code>.
1545 </td>
1546</tr>
1547</tbody>
1548</table>
1549
1550</body>
1551</html>