lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 1 | // Copyright 2010 the V8 project authors. All rights reserved. |
| 2 | // Redistribution and use in source and binary forms, with or without |
| 3 | // modification, are permitted provided that the following conditions are |
| 4 | // met: |
| 5 | // |
| 6 | // * Redistributions of source code must retain the above copyright |
| 7 | // notice, this list of conditions and the following disclaimer. |
| 8 | // * Redistributions in binary form must reproduce the above |
| 9 | // copyright notice, this list of conditions and the following |
| 10 | // disclaimer in the documentation and/or other materials provided |
| 11 | // with the distribution. |
| 12 | // * Neither the name of Google Inc. nor the names of its |
| 13 | // contributors may be used to endorse or promote products derived |
| 14 | // from this software without specific prior written permission. |
| 15 | // |
| 16 | // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 17 | // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 18 | // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 19 | // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 20 | // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 26 | // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | |
| 28 | // This file is an internal atomic implementation, use atomicops.h instead. |
| 29 | |
| 30 | #ifndef V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
| 31 | #define V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |
| 32 | |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 33 | #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 34 | |
| 35 | namespace v8 { |
| 36 | namespace internal { |
| 37 | |
| 38 | // Atomically execute: |
| 39 | // result = *ptr; |
| 40 | // if (*ptr == old_value) |
| 41 | // *ptr = new_value; |
| 42 | // return result; |
| 43 | // |
| 44 | // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". |
| 45 | // Always return the old value of "*ptr" |
| 46 | // |
| 47 | // This routine implies no memory barriers. |
| 48 | inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
| 49 | Atomic32 old_value, |
| 50 | Atomic32 new_value) { |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 51 | Atomic32 prev, tmp; |
| 52 | __asm__ __volatile__(".set push\n" |
| 53 | ".set noreorder\n" |
| 54 | "1:\n" |
| 55 | "ll %0, %5\n" // prev = *ptr |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 56 | "bne %0, %3, 2f\n" // if (prev != old_value) goto 2 |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 57 | "move %2, %4\n" // tmp = new_value |
| 58 | "sc %2, %1\n" // *ptr = tmp (with atomic check) |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 59 | "beqz %2, 1b\n" // start again on atomic error |
| 60 | "nop\n" // delay slot nop |
| 61 | "2:\n" |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 62 | ".set pop\n" |
| 63 | : "=&r" (prev), "=m" (*ptr), "=&r" (tmp) |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 64 | : "Ir" (old_value), "r" (new_value), "m" (*ptr) |
| 65 | : "memory"); |
| 66 | return prev; |
| 67 | } |
| 68 | |
| 69 | // Atomically store new_value into *ptr, returning the previous value held in |
| 70 | // *ptr. This routine implies no memory barriers. |
| 71 | inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, |
| 72 | Atomic32 new_value) { |
| 73 | Atomic32 temp, old; |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 74 | __asm__ __volatile__(".set push\n" |
| 75 | ".set noreorder\n" |
| 76 | "1:\n" |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 77 | "ll %1, %2\n" // old = *ptr |
| 78 | "move %0, %3\n" // temp = new_value |
| 79 | "sc %0, %2\n" // *ptr = temp (with atomic check) |
| 80 | "beqz %0, 1b\n" // start again on atomic error |
| 81 | "nop\n" // delay slot nop |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 82 | ".set pop\n" |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 83 | : "=&r" (temp), "=&r" (old), "=m" (*ptr) |
| 84 | : "r" (new_value), "m" (*ptr) |
| 85 | : "memory"); |
| 86 | |
| 87 | return old; |
| 88 | } |
| 89 | |
| 90 | // Atomically increment *ptr by "increment". Returns the new value of |
| 91 | // *ptr with the increment applied. This routine implies no memory barriers. |
| 92 | inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, |
| 93 | Atomic32 increment) { |
| 94 | Atomic32 temp, temp2; |
| 95 | |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 96 | __asm__ __volatile__(".set push\n" |
| 97 | ".set noreorder\n" |
| 98 | "1:\n" |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 99 | "ll %0, %2\n" // temp = *ptr |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 100 | "addu %1, %0, %3\n" // temp2 = temp + increment |
| 101 | "sc %1, %2\n" // *ptr = temp2 (with atomic check) |
| 102 | "beqz %1, 1b\n" // start again on atomic error |
| 103 | "addu %1, %0, %3\n" // temp2 = temp + increment |
| 104 | ".set pop\n" |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 105 | : "=&r" (temp), "=&r" (temp2), "=m" (*ptr) |
| 106 | : "Ir" (increment), "m" (*ptr) |
| 107 | : "memory"); |
| 108 | // temp2 now holds the final value. |
| 109 | return temp2; |
| 110 | } |
| 111 | |
| 112 | inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, |
| 113 | Atomic32 increment) { |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 114 | ATOMICOPS_COMPILER_BARRIER(); |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 115 | Atomic32 res = NoBarrier_AtomicIncrement(ptr, increment); |
| 116 | ATOMICOPS_COMPILER_BARRIER(); |
| 117 | return res; |
| 118 | } |
| 119 | |
| 120 | // "Acquire" operations |
| 121 | // ensure that no later memory access can be reordered ahead of the operation. |
| 122 | // "Release" operations ensure that no previous memory access can be reordered |
| 123 | // after the operation. "Barrier" operations have both "Acquire" and "Release" |
| 124 | // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory |
| 125 | // access. |
| 126 | inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, |
| 127 | Atomic32 old_value, |
| 128 | Atomic32 new_value) { |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 129 | ATOMICOPS_COMPILER_BARRIER(); |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 130 | Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
| 131 | ATOMICOPS_COMPILER_BARRIER(); |
| 132 | return res; |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, |
| 136 | Atomic32 old_value, |
| 137 | Atomic32 new_value) { |
| 138 | ATOMICOPS_COMPILER_BARRIER(); |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 139 | Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value); |
| 140 | ATOMICOPS_COMPILER_BARRIER(); |
| 141 | return res; |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 142 | } |
| 143 | |
| 144 | inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 145 | *ptr = value; |
| 146 | } |
| 147 | |
| 148 | inline void MemoryBarrier() { |
jkummerow@chromium.org | c3b3712 | 2011-11-07 10:14:12 +0000 | [diff] [blame] | 149 | __asm__ __volatile__("sync" : : : "memory"); |
lrn@chromium.org | 7516f05 | 2011-03-30 08:52:27 +0000 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 153 | *ptr = value; |
| 154 | MemoryBarrier(); |
| 155 | } |
| 156 | |
| 157 | inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) { |
| 158 | MemoryBarrier(); |
| 159 | *ptr = value; |
| 160 | } |
| 161 | |
| 162 | inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) { |
| 163 | return *ptr; |
| 164 | } |
| 165 | |
| 166 | inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) { |
| 167 | Atomic32 value = *ptr; |
| 168 | MemoryBarrier(); |
| 169 | return value; |
| 170 | } |
| 171 | |
| 172 | inline Atomic32 Release_Load(volatile const Atomic32* ptr) { |
| 173 | MemoryBarrier(); |
| 174 | return *ptr; |
| 175 | } |
| 176 | |
| 177 | } } // namespace v8::internal |
| 178 | |
| 179 | #undef ATOMICOPS_COMPILER_BARRIER |
| 180 | |
| 181 | #endif // V8_ATOMICOPS_INTERNALS_MIPS_GCC_H_ |