blob: 6868cb7996ab99e5603d14789fc7b5384fbc725f [file] [log] [blame]
Jim Grosbachf7947052012-07-09 18:34:21 +00001// REQUIRES: arm-registered-target
Eric Christophere3e07a52011-06-17 01:53:34 +00002// RUN: %clang_cc1 -triple armv7-apple-darwin9 -emit-llvm -w -o - %s | FileCheck %s
Eric Christophere3e07a52011-06-17 01:53:34 +00003
Eric Christopher37240202011-06-17 06:16:34 +00004typedef long long int64_t;
5typedef unsigned int uint32_t;
Eric Christophere3e07a52011-06-17 01:53:34 +00006
7int64_t foo(int64_t v, volatile int64_t *p)
8{
9 register uint32_t rl asm("r1");
10 register uint32_t rh asm("r2");
11
12 int64_t r;
13 uint32_t t;
14
15 __asm__ __volatile__( \
16 "ldrexd%[_rl], %[_rh], [%[_p]]" \
17 : [_rl] "=&r" (rl), [_rh] "=&r" (rh) \
18 : [_p] "p" (p) : "memory");
19
Stephen Hines0e2c34f2015-03-23 12:09:02 -070020 // CHECK: call { i32, i32 } asm sideeffect "ldrexd$0, $1, [$2]", "=&{r1},=&{r2},r,~{memory}"(i64*
Eric Christophere3e07a52011-06-17 01:53:34 +000021
22 return r;
23}
Eric Christopher43fec872011-06-21 00:07:10 +000024
25// Make sure we translate register names properly.
26void bar (void) {
27 register unsigned int rn asm("r14");
28 register unsigned int d asm("r2");
29
30 // CHECK: call i32 asm sideeffect "sub $1, $1, #32", "={r2},{lr}"
31 asm volatile ("sub %1, %1, #32" : "=r"(d) : "r"(rn));
32}