add conversion functions and test cases for ARM
git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@81809 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/arm/fixdfsivfp.S b/lib/arm/fixdfsivfp.S
new file mode 100644
index 0000000..75c322d
--- /dev/null
+++ b/lib/arm/fixdfsivfp.S
@@ -0,0 +1,23 @@
+//===-- fixdfsivfp.S - Implement fixdfsivfp -----------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+
+//
+// extern int __fixdfsivfp(double a);
+//
+// Converts double precision float to a 32-bit int rounding towards zero.
+// Uses Darwin calling convention where a double precision parameter is
+// passed in GPR register pair.
+//
+ .globl ___fixdfsivfp
+___fixdfsivfp:
+ fmdrr d7, r0, r1 // load double register from R0/R1
+ ftosizd s15, d7 // convert double to 32-bit int into s15
+ fmrs r0, s15 // move s15 to result register
+ bx lr