blob: dbb878cbff1a926622756f4d7f993354392e5a27 [file] [log] [blame]
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001/******************************************************************************
2*
3* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4*
5* Licensed under the Apache License, Version 2.0 (the "License");
6* you may not use this file except in compliance with the License.
7* You may obtain a copy of the License at:
8*
9* http://www.apache.org/licenses/LICENSE-2.0
10*
11* Unless required by applicable law or agreed to in writing, software
12* distributed under the License is distributed on an "AS IS" BASIS,
13* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14* See the License for the specific language governing permissions and
15* limitations under the License.
16*
17******************************************************************************/
18/**
19 *******************************************************************************
20 * @file
21 * ihevcd_process_slice.c
22 *
23 * @brief
24 * Contains functions for processing slice data
25 *
26 * @author
27 * Harish
28 *
29 * @par List of Functions:
30 *
31 * @remarks
32 * None
33 *
34 *******************************************************************************
35 */
36/*****************************************************************************/
37/* File Includes */
38/*****************************************************************************/
39#include <stdio.h>
40#include <stddef.h>
41#include <stdlib.h>
42#include <string.h>
43#include <assert.h>
44
45#include "ihevc_typedefs.h"
46#include "iv.h"
47#include "ivd.h"
48#include "ihevcd_cxa.h"
49#include "ithread.h"
50
51#include "ihevc_defs.h"
52#include "ihevc_debug.h"
53#include "ihevc_defs.h"
54#include "ihevc_structs.h"
55#include "ihevc_macros.h"
56#include "ihevc_platform_macros.h"
57#include "ihevc_cabac_tables.h"
58#include "ihevc_padding.h"
59#include "ihevc_iquant_itrans_recon.h"
60#include "ihevc_chroma_iquant_itrans_recon.h"
61#include "ihevc_recon.h"
62#include "ihevc_chroma_recon.h"
63#include "ihevc_iquant_recon.h"
64#include "ihevc_chroma_iquant_recon.h"
65#include "ihevc_intra_pred.h"
66
67#include "ihevc_error.h"
68#include "ihevc_common_tables.h"
69#include "ihevc_quant_tables.h"
70#include "ihevcd_common_tables.h"
71
72#include "ihevcd_profile.h"
73#include "ihevcd_trace.h"
74#include "ihevcd_defs.h"
75#include "ihevcd_function_selector.h"
76#include "ihevcd_structs.h"
77#include "ihevcd_error.h"
78#include "ihevcd_nal.h"
79#include "ihevcd_bitstream.h"
80#include "ihevcd_job_queue.h"
81#include "ihevcd_utils.h"
82#include "ihevcd_debug.h"
83#include "ihevcd_get_mv.h"
84#include "ihevcd_inter_pred.h"
85#include "ihevcd_iquant_itrans_recon_ctb.h"
86#include "ihevcd_boundary_strength.h"
87#include "ihevcd_deblk.h"
88#include "ihevcd_fmt_conv.h"
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -070089#include "ihevcd_sao.h"
90#include "ihevcd_profile.h"
91
92IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec,
93 process_ctxt_t *ps_proc,
94 UWORD8 *pu1_y_dst,
95 UWORD8 *pu1_u_dst,
96 UWORD8 *pu1_v_dst,
97 WORD32 cur_row,
98 WORD32 num_rows);
99
100typedef enum
101{
102 PROC_ALL,
103 PROC_INTER_PRED,
104 PROC_RECON,
105 PROC_DEBLK,
106 PROC_SAO
107}proc_type_t;
108
109void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
110{
111 tile_t *ps_tile = ps_proc->ps_tile;
112 sps_t *ps_sps = ps_proc->ps_sps;
113 pps_t *ps_pps = ps_proc->ps_pps;
114 codec_t *ps_codec = ps_proc->ps_codec;
115 WORD32 idx;
116 WORD32 nop_cnt;
117 WORD32 bit_pos = proc_type;
118 WORD32 bit_mask = (1 << bit_pos);
119
120 if(ps_proc->i4_check_proc_status)
121 {
122 nop_cnt = PROC_NOP_CNT;
123 while(1)
124 {
125 volatile UWORD8 *pu1_buf;
126 volatile WORD32 status;
127 status = 1;
128 /* Check if all dependencies for the next nCTBs are met */
129 {
130 WORD32 x_pos;
131
132 {
133 /* Check if the top right of next nCTBs are processed */
134 if(ps_proc->i4_ctb_y > 0)
135 {
136 x_pos = (ps_proc->i4_ctb_tile_x + nctb);
137 idx = MIN(x_pos, (ps_tile->u2_wd - 1));
138
139 /* Check if top-right CTB for the last CTB in nCTB is within the tile */
140 {
141 idx += ps_tile->u1_pos_x;
142 idx += ((ps_proc->i4_ctb_y - 1)
143 * ps_sps->i2_pic_wd_in_ctb);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700144 pu1_buf = (ps_codec->pu1_proc_map + idx);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700145 status = *pu1_buf & bit_mask;
146 }
147 }
148 }
149
150 /* If tiles are enabled, then test left and top-left as well */
151 ps_pps = ps_proc->ps_pps;
152 if(ps_pps->i1_tiles_enabled_flag)
153 {
154 /*Check if left ctb is processed*/
155 if((ps_proc->i4_ctb_x > 0) && ((0 != status)))
156 {
157 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
158 idx = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700159 pu1_buf = (ps_codec->pu1_proc_map + idx);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700160 status = *pu1_buf & bit_mask;
161 }
162
163 /*Check if top left ctb is processed*/
164 if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0))
165 {
166 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
167 idx = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700168 pu1_buf = (ps_codec->pu1_proc_map + idx);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700169 status = *pu1_buf & bit_mask;
170 }
171 }
172 }
173
174 if(status)
175 break;
176
177 /* if dependencies are not met, then wait for few cycles.
178 * Even after few iterations, if the dependencies are not met then yield
179 */
180 if(nop_cnt > 0)
181 {
182 NOP(128);
183 nop_cnt -= 128;
184 }
185 else
186 {
187 nop_cnt = PROC_NOP_CNT;
188 ithread_yield();
189 //NOP(128 * 16);
190 }
191 }
192 }
193}
194
195void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
196{
197 codec_t *ps_codec = ps_proc->ps_codec;
198 WORD32 i, idx;
199 WORD32 bit_pos = proc_type;
200 WORD32 bit_mask = (1 << bit_pos);
201
202 /* Update the current CTBs processing status */
203 if(ps_proc->i4_check_proc_status)
204 {
205 for(i = 0; i < nctb; i++)
206 {
207 sps_t *ps_sps = ps_proc->ps_sps;
208 UWORD8 *pu1_buf;
209 idx = (ps_proc->i4_ctb_x + i);
210 idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700211 pu1_buf = (ps_codec->pu1_proc_map + idx);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700212 *pu1_buf = *pu1_buf | bit_mask;
213 }
214 }
215}
216
217
218void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc)
219{
220
221 /* Slice x and y are initialized in proc_init. But initialize slice x and y count here
222 * if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */
223 if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0)))
224 {
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700225 slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1));
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700226
227 if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x)
228 && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y))
229 {
230 if(0 == ps_slice_hdr_next->i1_dependent_slice_flag)
231 {
232 ps_proc->i4_ctb_slice_x = 0;
233 ps_proc->i4_ctb_slice_y = 0;
234 }
235
236 ps_proc->i4_cur_slice_idx++;
237 ps_proc->ps_slice_hdr = ps_slice_hdr_next;
238 }
239
240 }
241}
242
243void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb)
244{
245 WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
246 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
247 tile_t *ps_tile = ps_proc->ps_tile;
248 sps_t *ps_sps = ps_proc->ps_sps;
249
250 /* Update x and y positions */
251 ps_proc->i4_ctb_tile_x += nctb;
252 ps_proc->i4_ctb_x += nctb;
253
254 ps_proc->i4_ctb_slice_x += nctb;
255 /*If tile are enabled, then handle the tile & slice counters differently*/
256 if(ps_proc->ps_pps->i1_tiles_enabled_flag)
257 {
258 /* Update slice counters*/
259 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
260 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
261 /*
262 * There can be 2 cases where slice counters must be handled differently.
263 * 1 - Multiple tiles span across a single/one of the many slice.
264 * 2 - Multiple slices span across a single/one of the many tiles.
265 */
266
267 /*Case 1 */
268 if(slice_start_ctb_idx < tile_start_ctb_idx)
269 {
270 /*End of tile row*/
271 if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x)
272 {
273 if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x))
274 {
275 ps_proc->i4_ctb_slice_y++;
276 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
277 - ps_tile->u2_wd;
278 }
279 }
280 else
281 {
282 WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x);
283 if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x))
284 {
285 ps_proc->i4_ctb_slice_y++;
286 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
287 - ps_tile->u2_wd;
288 }
289 }
290 }
291 /*Case 2*/
292 else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd))
293 {
294 /*End of tile row*/
295 ps_proc->i4_ctb_slice_y++;
296 ps_proc->i4_ctb_slice_x = 0;
297 }
298 }
299 else
300 {
301 if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd)
302 {
303 ps_proc->i4_ctb_slice_y++;
304 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
305 - ps_tile->u2_wd;
306 }
307 }
308}
309
310void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc)
311{
312 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
313 sps_t *ps_sps = ps_proc->ps_sps;
314 tile_t *ps_tile_prev;
315 tile_t *ps_tile = ps_proc->ps_tile;
316 WORD32 cur_pu_idx;
317 WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
318 WORD16 i2_wd_in_ctb;
319 WORD32 continuous_tiles = 0;
320 WORD32 cur_ctb_idx;
321 WORD32 check_tile_wd;
322
323 if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y))
324 {
325 ps_tile_prev = ps_tile - 1;
326 }
327 else
328 {
329 ps_tile_prev = ps_tile;
330 }
331
332
333 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
334 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
335 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
336 {
337 continuous_tiles = 1;
338 }
339
340 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
341 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
342
343 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
344 {
345 //Slices span across multiple tiles.
346 i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
347 }
348 else
349 {
350 i2_wd_in_ctb = ps_tile->u2_wd;
351 }
352 cur_ctb_idx = ps_proc->i4_ctb_x
353 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
354
355 /* Ctb level availability */
356 /* Bottom left will not be available at a CTB level, no need to pass this */
357 ps_proc->u1_top_ctb_avail = 1;
358 ps_proc->u1_left_ctb_avail = 1;
359 ps_proc->u1_top_lt_ctb_avail = 1;
360 ps_proc->u1_top_rt_ctb_avail = 1;
361 /* slice and tile boundaries */
362
363 if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y))
364 {
365 ps_proc->u1_top_ctb_avail = 0;
366 ps_proc->u1_top_lt_ctb_avail = 0;
367 ps_proc->u1_top_rt_ctb_avail = 0;
368 }
369
370 if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x))
371 {
372 ps_proc->u1_left_ctb_avail = 0;
373 ps_proc->u1_top_lt_ctb_avail = 0;
374 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
375 {
376 ps_proc->u1_top_ctb_avail = 0;
377 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
378 {
379 ps_proc->u1_top_rt_ctb_avail = 0;
380 }
381 }
382 }
383 /*For slices not beginning at start of a ctb row*/
384 else if(ps_proc->i4_ctb_x > 0)
385 {
386 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
387 {
388 ps_proc->u1_top_ctb_avail = 0;
389 ps_proc->u1_top_lt_ctb_avail = 0;
390 if(0 == ps_proc->i4_ctb_slice_x)
391 {
392 ps_proc->u1_left_ctb_avail = 0;
393 }
394 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
395 {
396 ps_proc->u1_top_rt_ctb_avail = 0;
397 }
398 }
399 else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x))
400 {
401 ps_proc->u1_top_lt_ctb_avail = 0;
402 }
403 }
404
405 if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x))
406 {
407 ps_proc->u1_top_rt_ctb_avail = 0;
408 }
409
410
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700411 {
412 WORD32 next_ctb_idx;
413 next_ctb_idx = cur_ctb_idx + 1;
414
415 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
416 {
417 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
418 {
419 //Last tile
420 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
421 {
422 next_ctb_idx = cur_ctb_idx + 1;
423 }
424 else //Not last tile, but new tile
425 {
426 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
427 next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
428 }
429 }
430 else //End of each tile row
431 {
432 next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
433 }
434 }
435 ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx;
436 ps_proc->i4_ctb_pu_cnt =
437 ps_proc->pu4_pic_pu_idx[next_ctb_idx]
438 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
439 cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
440 ps_proc->i4_ctb_start_pu_idx = cur_pu_idx;
441 ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx];
442 }
443}
444
445void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc)
446{
447 sps_t *ps_sps = ps_proc->ps_sps;
448 codec_t *ps_codec = ps_proc->ps_codec;
449 WORD32 cur_ctb_idx;
450
451 cur_ctb_idx = ps_proc->i4_ctb_x
452 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
453
454 {
455 tile_t *ps_tile;
456 WORD32 next_ctb_tu_idx;
457 ps_tile = ps_proc->ps_tile;
458
459
460 if(1 == ps_codec->i4_num_cores)
461 {
462 next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1;
463 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
464 {
465 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
466 {
467 //Last tile
468 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
469 {
470 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
471 }
472 else //Not last tile, but new tile
473 {
474 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
475 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
476 }
477 }
478 else //End of each tile row
479 {
480 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
481 }
482 }
483 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
484 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB];
485 }
486 else
487 {
488 next_ctb_tu_idx = cur_ctb_idx + 1;
489 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
490 {
491 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
492 {
493 //Last tile
494 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
495 {
496 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
497 }
498 else //Not last tile, but new tile
499 {
500 tile_t *ps_tile_next = ps_proc->ps_tile + 1;
501 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
502 }
503 }
504 else //End of each tile row
505 {
506 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
507 }
508 }
509 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
510 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] -
511 ps_proc->pu4_pic_tu_idx[cur_ctb_idx];
512 }
513 }
514}
515
516IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc)
517{
518 IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS;
519 codec_t *ps_codec;
520 sps_t *ps_sps = ps_proc->ps_sps;
521
522 WORD32 nctb;
523 WORD32 i;
524 WORD32 idx;
525 WORD32 nop_cnt;
526 WORD32 num_minpu_in_ctb;
527 WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y;
528 WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x;
529 tu_t *ps_tu_cur, *ps_tu_nxt;
530 UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt;
531 WORD32 num_ctb, num_ctb_tmp;
532 proc_type_t proc_type;
533
534
535 WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size;
536
537 PROFILE_DISABLE_PROCESS_CTB();
538
539 ps_codec = ps_proc->ps_codec;
540 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
541
542 nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt);
543 nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x));
544
545 if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb))
546 {
547 num_ctb = 1;
548 }
549 else
550 {
551 num_ctb = ps_proc->i4_nctb;
552 }
553 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
554 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
555 pu1_pu_map_nxt = ps_proc->pu1_pu_map;
556 ps_tu_nxt = ps_proc->ps_tu;
557
558 while(ps_proc->i4_ctb_cnt)
559 {
560 ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y;
561 ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x;
562 ps_proc->pu1_pu_map = pu1_pu_map_nxt;
563 ps_proc->ps_tu = ps_tu_nxt;
564
565 cur_ctb_tile_x = ps_proc->i4_ctb_tile_x;
566 cur_ctb_tile_y = ps_proc->i4_ctb_tile_y;
567 cur_ctb_slice_x = ps_proc->i4_ctb_slice_x;
568 cur_ctb_slice_y = ps_proc->i4_ctb_slice_y;
569 cur_slice_idx = ps_proc->i4_cur_slice_idx;
570 ps_tu_cur = ps_proc->ps_tu;
571 pu1_pu_map_cur = ps_proc->pu1_pu_map;
572 proc_type = PROC_INTER_PRED;
573
574 if(ps_proc->i4_ctb_cnt < num_ctb)
575 {
576 num_ctb = ps_proc->i4_ctb_cnt;
577 }
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700578 num_ctb_tmp = num_ctb;
579
580 while(num_ctb_tmp)
581 {
582 slice_header_t *ps_slice_hdr;
583 tile_t *ps_tile = ps_proc->ps_tile;
584
585 /* Waiting for Parsing to be done*/
586 {
587
588
589 nop_cnt = PROC_NOP_CNT;
590 if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status)
591 {
592 while(1)
593 {
594 volatile UWORD8 *pu1_buf;
595 volatile WORD32 status;
596 status = 1;
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700597 /* Check if all dependencies for the next nCTBs are met */
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700598 /* Check if the next nCTBs are parsed */
599 if(ps_proc->i4_check_parse_status)
600 {
601 idx = (ps_proc->i4_ctb_x + nctb - 1);
602 idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
603 pu1_buf = (ps_codec->pu1_parse_map + idx);
604 status = *pu1_buf;
605 }
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700606
607 if(status)
608 break;
609
610 /* if dependencies are not met, then wait for few cycles.
611 * Even after few iterations, if the dependencies are not met then yield
612 */
613 if(nop_cnt > 0)
614 {
615 NOP(128);
616 nop_cnt -= 128;
617 }
618 else
619 {
620 nop_cnt = PROC_NOP_CNT;
621 ithread_yield();
622 }
623 }
624 }
625 }
626
627 /* Check proc map to ensure dependencies for recon are met */
628 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
629
630 ihevcd_slice_hdr_update(ps_proc);
631 ps_slice_hdr = ps_proc->ps_slice_hdr;
632
633 //ihevcd_mv_prediction();
634 //ihevcd_lvl_unpack();
635 //ihevcd_inter_iq_it_recon();
636 //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs
637 //ihevcd_intra_process();
638 //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size);
639 //ihevcd_deblk_ctb(ps_proc);
640
641 /* iq,it recon of Intra TU */
642 {
643 UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx;
644 WORD32 cur_ctb_idx;
645
646 ihevcd_ctb_avail_update(ps_proc);
647
648#if DEBUG_DUMP_FRAME_BUFFERS_INFO
649 au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
650 ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail));
651 au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
652 (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16));
653#endif
654
655 /*************************************************/
656 /**************** MV pred **********************/
657 /*************************************************/
658 if(PSLICE == ps_slice_hdr->i1_slice_type
659 || BSLICE == ps_slice_hdr->i1_slice_type)
660 {
661 mv_ctxt_t s_mv_ctxt;
662
663 pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top
664 + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE);
665 pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left;
666 pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx;
667
668 /* Initializing s_mv_ctxt */
669 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
670 {
671 s_mv_ctxt.ps_pps = ps_proc->ps_pps;
672 s_mv_ctxt.ps_sps = ps_proc->ps_sps;
673 s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
674 s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
675 s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
676 s_mv_ctxt.ps_pu = ps_proc->ps_pu;
677 s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu;
678 s_mv_ctxt.ps_tile = ps_tile;
679 s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
680 s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx;
681 s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map;
682 s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt;
683 s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx;
684 s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail;
685 s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail;
686 s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail;
687 s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail;
688
689 ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx,
690 pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx);
691 }
692
693 ihevcd_inter_pred_ctb(ps_proc);
694 }
695 else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
696 {
697 WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt;
698 pu_t *ps_pu;
699 WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
700 UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map +
701 (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb;
702 WORD32 row, col;
703 UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map;
704 WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2;
Naveen Kumar P41f94192017-06-22 15:36:50 +0530705 WORD32 ctb_size_in_min_pu = (ctb_size / MIN_PU_SIZE);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700706
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700707 /* Neighbor PU idx update inside CTB */
708 /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */
709
710 cur_ctb_idx = ps_proc->i4_ctb_x
711 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
712 next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt;
713 num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx]
714 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
715 ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
716 ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx];
717
718 for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++)
719 {
720 UWORD32 cur_pu_idx;
721 WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2;
722 WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2;
723
724 cur_pu_idx = ctb_start_pu_idx + pu_cnt;
725
726 for(row = 0; row < pu_ht / MIN_PU_SIZE; row++)
727 for(col = 0; col < pu_wd / MIN_PU_SIZE; col++)
728 pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col)
729 + (1 + ps_pu->b4_pos_y + row)
730 * nbr_pu_idx_strd] =
731 cur_pu_idx;
732 }
733
734 /* Updating Top and Left pointers */
735 {
736 WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples
737 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size);
738 WORD32 ctb_size_left = MIN(ctb_size, rows_remaining);
739
740 /* Top Left */
741 /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */
742 ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1];
743 for(i = 0; i < ctb_size / MIN_PU_SIZE; i++)
744 {
745 /* Left */
746 /* Last column of au4_nbr_pu_idx */
747 ps_proc->pu4_pic_pu_idx_left[i] =
748 pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd];
749 /* Top */
750 /* Last row of au4_nbr_pu_idx */
751 ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] =
752 pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1];
753
754 }
Naveen Kumar P41f94192017-06-22 15:36:50 +0530755
756 /* Updating the CTB level PU idx (Used for collocated MV pred)*/
757 {
758 WORD32 ctb_row, ctb_col, index_pic_map, index_nbr_map;
759 WORD32 first_pu_of_ctb;
760 first_pu_of_ctb = pu4_nbr_pu_idx[1 + nbr_pu_idx_strd];
761
762 index_pic_map = 0 * ctb_size_in_min_pu + 0;
763 index_nbr_map = (0 + 1) * nbr_pu_idx_strd + (0 + 1);
764
765 for(ctb_row = 0; ctb_row < ctb_size_in_min_pu; ctb_row++)
766 {
767 for(ctb_col = 0; ctb_col < ctb_size_in_min_pu; ctb_col++)
768 {
769 pu1_pic_pu_map_ctb[index_pic_map + ctb_col] = pu4_nbr_pu_idx[index_nbr_map + ctb_col]
770 - first_pu_of_ctb;
771 }
772 index_pic_map += ctb_size_in_min_pu;
773 index_nbr_map += nbr_pu_idx_strd;
774 }
775 }
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700776 }
777 }
778 }
779
780 if(ps_proc->ps_pps->i1_tiles_enabled_flag)
781 {
782 /*Update the tile index buffer with tile information for the current ctb*/
783 UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx;
784 pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))]
785 = ps_proc->i4_cur_tile_idx;
786 }
787
788 /*************************************************/
789 /*********** BS, QP and Deblocking **************/
790 /*************************************************/
791 /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */
792
793 {
794 slice_header_t *ps_slice_hdr;
795 ps_slice_hdr = ps_proc->ps_slice_hdr;
796
797
798 /* Check if deblock is disabled for the current slice or if it is disabled for the current picture
799 * because of disable deblock api
800 */
801 if(0 == ps_codec->i4_disable_deblk_pic)
802 {
803 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
804 {
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +0530805 /* Boundary strength calculation is done irrespective of whether deblocking is disabled
806 * in the slice or not, to handle deblocking slice boundaries */
807 if((0 == ps_codec->i4_slice_error))
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700808 {
809 ihevcd_update_ctb_tu_cnt(ps_proc);
810 ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps;
811 ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps;
812 ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec;
813 ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt;
814 ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
815 ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
816 ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x;
817 ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y;
818 ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x;
819 ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y;
820 ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu;
821 ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu;
822 ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
823 ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt;
824 ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt;
825 ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
826 ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
827 ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile;
828
829 if(ISLICE == ps_slice_hdr->i1_slice_type)
830 {
831 ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt);
832 }
833 else
834 {
835 ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt);
836 }
837 }
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +0530838
839 /* Boundary strength is set to zero if deblocking is disabled for the current slice */
840 if((0 != ps_slice_hdr->i1_slice_disable_deblocking_filter_flag))
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700841 {
Harish Mahendrakar707042f2014-06-04 10:31:48 -0700842 WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16);
843
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700844 UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs +
845 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
Harish Mahendrakar707042f2014-06-04 10:31:48 -0700846 ps_proc->i4_ctb_y * bs_strd);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700847 UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs +
848 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
Harish Mahendrakar707042f2014-06-04 10:31:48 -0700849 ps_proc->i4_ctb_y * bs_strd);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700850
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +0530851 memset(pu4_vert_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700852 memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700853 }
854 }
855 }
856 }
857
858 /* Per CTB update the following */
859 {
860 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
861 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
862 cur_ctb_idx++;
863
864 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
865 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
866 if((1 == ps_codec->i4_num_cores) &&
867 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
868 {
869 ps_proc->ps_tu = ps_proc->ps_pic_tu;
870 }
871 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
872 }
873
874 /* Update proc map for recon*/
875 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
876
877 num_ctb_tmp -= nctb;
878 ihevcd_ctb_pos_update(ps_proc, nctb);
879
880 }
881
882 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
883 {
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700884 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700885 ps_proc->i4_cur_slice_idx = cur_slice_idx;
886 }
887 /* Restore the saved variables */
888 num_ctb_tmp = num_ctb;
889 ps_proc->i4_ctb_x -= num_ctb;
890 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
891 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
892 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
893 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
894 ps_proc->pu1_pu_map = pu1_pu_map_cur;
895 ps_proc->ps_tu = ps_tu_cur;
896 proc_type = PROC_RECON;
897
898 while(num_ctb_tmp)
899 {
900
901 /* Check proc map to ensure dependencies for recon are met */
902 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
903
904 ihevcd_slice_hdr_update(ps_proc);
905
906 {
907
908 ihevcd_ctb_avail_update(ps_proc);
909
910 /*************************************************/
911 /**************** IQ IT RECON *******************/
912 /*************************************************/
913
914 ihevcd_update_ctb_tu_cnt(ps_proc);
915
916 /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS),
917 * default value of 16 has to be used. Since the value is same for all sizes,
918 * same table is used for all cases.
919 */
920 if(0 == ps_sps->i1_scaling_list_enable_flag)
921 {
922 ps_proc->api2_dequant_intra_matrix[0] =
923 (WORD16 *)gi2_flat_scale_mat_32x32;
924 ps_proc->api2_dequant_intra_matrix[1] =
925 (WORD16 *)gi2_flat_scale_mat_32x32;
926 ps_proc->api2_dequant_intra_matrix[2] =
927 (WORD16 *)gi2_flat_scale_mat_32x32;
928 ps_proc->api2_dequant_intra_matrix[3] =
929 (WORD16 *)gi2_flat_scale_mat_32x32;
930
931 ps_proc->api2_dequant_inter_matrix[0] =
932 (WORD16 *)gi2_flat_scale_mat_32x32;
933 ps_proc->api2_dequant_inter_matrix[1] =
934 (WORD16 *)gi2_flat_scale_mat_32x32;
935 ps_proc->api2_dequant_inter_matrix[2] =
936 (WORD16 *)gi2_flat_scale_mat_32x32;
937 ps_proc->api2_dequant_inter_matrix[3] =
938 (WORD16 *)gi2_flat_scale_mat_32x32;
939 }
940 else
941 {
942 if(0 == ps_sps->i1_sps_scaling_list_data_present_flag)
943 {
944 ps_proc->api2_dequant_intra_matrix[0] =
945 (WORD16 *)gi2_flat_scale_mat_32x32;
946 ps_proc->api2_dequant_intra_matrix[1] =
947 (WORD16 *)gi2_intra_default_scale_mat_8x8;
948 ps_proc->api2_dequant_intra_matrix[2] =
949 (WORD16 *)gi2_intra_default_scale_mat_16x16;
950 ps_proc->api2_dequant_intra_matrix[3] =
951 (WORD16 *)gi2_intra_default_scale_mat_32x32;
952
953 ps_proc->api2_dequant_inter_matrix[0] =
954 (WORD16 *)gi2_flat_scale_mat_32x32;
955 ps_proc->api2_dequant_inter_matrix[1] =
956 (WORD16 *)gi2_inter_default_scale_mat_8x8;
957 ps_proc->api2_dequant_inter_matrix[2] =
958 (WORD16 *)gi2_inter_default_scale_mat_16x16;
959 ps_proc->api2_dequant_inter_matrix[3] =
960 (WORD16 *)gi2_inter_default_scale_mat_32x32;
961 }
962 /*TODO: Add support for custom scaling matrices */
963 }
964
965
966 /* CTB Level pointers */
967 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
968 + (ps_proc->i4_ctb_x * ctb_size
969 + ps_proc->i4_ctb_y * ctb_size
970 * ps_codec->i4_strd);
971 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
972 + ps_proc->i4_ctb_x * ctb_size
973 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -0700974
975 ihevcd_iquant_itrans_recon_ctb(ps_proc);
976 }
977
978 /* Per CTB update the following */
979 {
980 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
981 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
982 cur_ctb_idx++;
983
984 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
985 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
986 if((1 == ps_codec->i4_num_cores) &&
987 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
988 {
989 ps_proc->ps_tu = ps_proc->ps_pic_tu;
990 }
991 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
992 }
993
994
995 /* Update proc map for recon*/
996 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
997
998 num_ctb_tmp -= nctb;
999 ihevcd_ctb_pos_update(ps_proc, nctb);
1000 }
1001
1002 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
1003 {
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001004 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001005 ps_proc->i4_cur_slice_idx = cur_slice_idx;
1006 }
1007 /* Restore the saved variables */
1008 num_ctb_tmp = num_ctb;
1009 ps_proc->i4_ctb_x -= num_ctb;
1010 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
1011 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
1012 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1013 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1014 pu1_pu_map_nxt = ps_proc->pu1_pu_map;
1015 ps_tu_nxt = ps_proc->ps_tu;
1016 ps_proc->pu1_pu_map = pu1_pu_map_cur;
1017 ps_proc->ps_tu = ps_tu_cur;
1018 proc_type = PROC_DEBLK;
1019
1020 while(num_ctb_tmp)
1021 {
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301022
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001023
1024 /* Check proc map to ensure dependencies for deblk are met */
1025 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1026
1027 ihevcd_slice_hdr_update(ps_proc);
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301028
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001029
1030 if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) &&
1031 (0 == ps_codec->i4_disable_deblk_pic))
1032 {
1033 WORD32 i4_is_last_ctb_x = 0;
1034 WORD32 i4_is_last_ctb_y = 0;
1035
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301036
1037 /* Deblocking is done irrespective of whether it is disabled in the slice or not,
1038 * to handle deblocking the slice boundaries */
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001039 {
1040 ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps;
1041 ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps;
1042 ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec;
1043 ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1044 ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1045 ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1046 ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1047 ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1048
1049 /* Populating Current CTB's no_loop_filter flags */
1050 {
1051 WORD32 row;
1052 WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size;
1053
1054 /* Loop filter strd in units of num bits */
1055 WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3;
1056 /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter
1057 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */
1058 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1;
1059
1060 for(row = 0; row < (ctb_size >> 3) + 1; row++)
1061 {
1062 /* Go to the corresponding byte - read 32 bits and downshift */
1063 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7);
1064 bit_pos += loop_filter_strd;
1065 }
1066 }
1067
1068 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1069
1070 /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1071 * is applied on a shifted CTB structure
1072 */
1073 if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1)
1074 {
1075 WORD32 i4_is_last_ctb_x = 1;
1076 WORD32 i4_is_last_ctb_y = 0;
1077
1078 WORD32 last_x_pos;
1079 last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size);
1080 if(last_x_pos == ps_sps->i2_pic_width_in_luma_samples)
1081 {
1082 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1083 }
1084 }
1085
1086
1087 /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1088 * is applied on a shifted CTB structure
1089 */
1090 if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1)
1091 {
1092 WORD32 i4_is_last_ctb_x = 0;
1093 WORD32 i4_is_last_ctb_y = 1;
1094 WORD32 last_y_pos;
1095 last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size);
1096 if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples)
1097 {
1098 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1099 }
1100 }
1101 }
1102 }
1103
1104 /* Update proc map for deblk*/
1105 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1106
1107 num_ctb_tmp -= nctb;
1108 ihevcd_ctb_pos_update(ps_proc, nctb);
1109 }
1110
1111 if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
1112 {
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001113 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001114 ps_proc->i4_cur_slice_idx = cur_slice_idx;
1115 }
1116 /* Restore the saved variables */
1117 num_ctb_tmp = num_ctb;
1118 ps_proc->i4_ctb_x -= num_ctb;
1119 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
1120 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1121 ps_proc->pu1_pu_map = pu1_pu_map_cur;
1122 ps_proc->ps_tu = ps_tu_cur;
1123 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
1124 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
1125 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1126 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
1127 proc_type = PROC_SAO;
1128
1129 while(num_ctb_tmp)
1130 {
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301131
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001132
1133 /* Check proc map to ensure dependencies for SAO are met */
1134 ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1135
1136 ihevcd_slice_hdr_update(ps_proc);
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301137
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001138
1139 if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)
1140 {
Naveen Kumar Ponnusamy221aacc2014-10-28 11:23:59 +05301141 /* SAO is done even when it is disabled in the current slice, because
1142 * it is performed on a shifted CTB and the neighbor CTBs can belong
1143 * to different slices with SAO enabled */
1144 if(0 == ps_codec->i4_disable_sao_pic)
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001145 {
1146 ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps;
1147 ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps;
1148 ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile;
1149 ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec;
1150 ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1151 ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx;
1152
1153
1154#if SAO_PROCESS_SHIFT_CTB
1155 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1156 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1157 ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1158
1159 ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt);
1160#else
1161 if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0)
1162 {
1163 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2;
1164 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1165
1166 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1167 }
1168
1169 if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0)
1170 {
1171 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1;
1172 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1173
1174 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1175
1176 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1177 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1178
1179 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1180
1181 if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y)
1182 {
1183 WORD32 i4_ctb_x;
1184 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1185 for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++)
1186 {
1187 ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x;
1188 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1189 }
1190 }
1191 }
1192#endif
1193 }
1194
1195
1196 /* Call padding if required */
1197 {
1198#if SAO_PROCESS_SHIFT_CTB
1199
1200 if(0 == ps_proc->i4_ctb_x)
1201 {
1202 WORD32 pad_ht_luma;
1203 WORD32 pad_ht_chroma;
1204
1205 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1206 + (ps_proc->i4_ctb_x * ctb_size
1207 + ps_proc->i4_ctb_y * ctb_size
1208 * ps_codec->i4_strd);
1209 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1210 + ps_proc->i4_ctb_x * ctb_size
1211 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1212
1213 pad_ht_luma = ctb_size;
1214 pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0;
1215 pad_ht_chroma = ctb_size / 2;
1216 /* Pad left after 1st CTB is processed */
1217 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1218 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1219 }
1220
1221 if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1222 {
1223 WORD32 pad_ht_luma;
1224 WORD32 pad_ht_chroma;
1225 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1226
1227 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1228 + (ps_proc->i4_ctb_x * ctb_size
1229 + ps_proc->i4_ctb_y * ctb_size
1230 * ps_codec->i4_strd);
1231 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1232 + ps_proc->i4_ctb_x * ctb_size
1233 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1234
1235 pad_ht_luma = ctb_size;
1236 pad_ht_chroma = ctb_size / 2;
1237 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1238 {
1239 pad_ht_luma += 8;
1240 pad_ht_chroma += 16;
1241 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd,
1242 ps_codec->i4_strd, 16, PAD_LEFT);
1243 }
1244 /* Pad right after last CTB in the current row is processed */
1245 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1246 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1247
1248 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1249 {
1250 UWORD8 *pu1_buf;
1251 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1252 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1253 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1254 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1255 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1256
1257 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1258 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1259 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1260
1261 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1262 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1263 }
1264 }
1265#else
1266 if(ps_proc->i4_ctb_y > 1)
1267 {
1268 if(0 == ps_proc->i4_ctb_x)
1269 {
1270 WORD32 pad_ht_luma;
1271 WORD32 pad_ht_chroma;
1272
1273 pad_ht_luma = ctb_size;
1274 pad_ht_chroma = ctb_size / 2;
1275 /* Pad left after 1st CTB is processed */
1276 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1277 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1278 }
1279 else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1280 {
1281 WORD32 pad_ht_luma;
1282 WORD32 pad_ht_chroma;
1283 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1284
1285 pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size;
1286 pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2;
1287 /* Pad right after last CTB in the current row is processed */
1288 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1289 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1290
1291 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1292 {
1293 UWORD8 *pu1_buf;
1294 WORD32 pad_ht_luma;
1295 WORD32 pad_ht_chroma;
1296
1297 pad_ht_luma = 2 * ctb_size;
1298 pad_ht_chroma = ctb_size;
1299
1300 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size),
1301 ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1302 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size),
1303 ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1304
1305 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1306 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1307 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1308 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1309 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1310
1311 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1312 /* Pad top after padding left and right for current rows after processing 1st CTB row */
1313 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1314
1315 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1316 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1317 }
1318 }
1319 }
1320#endif
1321 }
1322 }
1323
1324
1325 /* Update proc map for SAO*/
1326 ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1327 /* Update proc map for Completion of CTB*/
1328 ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb);
1329 {
1330 tile_t *ps_tile;
1331
1332 ps_tile = ps_proc->ps_tile;
1333 num_ctb_tmp -= nctb;
1334
1335 ps_proc->i4_ctb_tile_x += nctb;
1336 ps_proc->i4_ctb_x += nctb;
1337
1338 ps_proc->i4_ctb_slice_x += nctb;
1339
1340
1341 /* Update tile counters */
1342 if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd))
1343 {
1344 /*End of tile row*/
1345 ps_proc->i4_ctb_tile_x = 0;
1346 ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1347
1348 ps_proc->i4_ctb_tile_y++;
1349 ps_proc->i4_ctb_y++;
1350 if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht)
1351 {
1352 /* Reached End of Tile */
1353 ps_proc->i4_ctb_tile_y = 0;
1354 ps_proc->i4_ctb_tile_x = 0;
1355 ps_proc->ps_tile++;
1356 //End of picture
1357 if(!((ps_tile->u2_ht + ps_tile->u1_pos_y == ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x == ps_sps->i2_pic_wd_in_ctb)))
1358 {
1359 ps_tile = ps_proc->ps_tile;
1360 ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1361 ps_proc->i4_ctb_y = ps_tile->u1_pos_y;
1362
1363 }
1364 }
1365 }
1366 }
1367 }
1368
1369 ps_proc->i4_ctb_cnt -= num_ctb;
1370 }
1371 return ret;
1372}
1373
1374void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst)
1375{
1376 codec_t *ps_codec;
1377 slice_header_t *ps_slice_hdr;
1378 pps_t *ps_pps;
1379 sps_t *ps_sps;
1380 tile_t *ps_tile, *ps_tile_prev;
1381 WORD32 tile_idx;
1382 WORD32 ctb_size;
1383 WORD32 num_minpu_in_ctb;
1384 WORD32 num_ctb_in_row;
1385 WORD32 ctb_addr;
1386 WORD32 i4_wd_in_ctb;
1387 WORD32 tile_start_ctb_idx;
1388 WORD32 slice_start_ctb_idx;
1389 WORD32 check_tile_wd;
1390 WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally
1391
1392 ps_codec = ps_proc->ps_codec;
1393
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001394 ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1));
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001395 ps_proc->ps_slice_hdr = ps_slice_hdr;
1396 ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id;
1397 ps_pps = ps_proc->ps_pps;
1398 ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id;
1399 ps_sps = ps_proc->ps_sps;
1400 ps_proc->i4_init_done = 1;
1401 ctb_size = 1 << ps_sps->i1_log2_ctb_size;
1402 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
1403 num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb;
1404
1405 ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1406
1407 ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y,
1408 &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y,
1409 &tile_idx);
1410
1411 ps_proc->ps_tile = ps_pps->ps_tile + tile_idx;
1412 ps_proc->i4_cur_tile_idx = tile_idx;
1413 ps_tile = ps_proc->ps_tile;
1414
1415 if(ps_pps->i1_tiles_enabled_flag)
1416 {
1417 if(tile_idx)
1418 ps_tile_prev = ps_tile - 1;
1419 else
1420 ps_tile_prev = ps_tile;
1421
1422 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
1423 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
1424
1425 /*Check if
1426 * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice
1427 * 1.1. If it does, check if the slice that has these tiles spans across the frame row.
1428 * 2. Vertical tiles are present within a slice */
1429 if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y)))
1430 {
1431 continuous_tiles = 1;
1432 }
1433 else
1434 {
1435 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
1436 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
1437 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
1438 {
1439 continuous_tiles = 1;
1440 }
1441 }
1442
1443 {
1444 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1445 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1446
1447 /* Handles cases where
1448 * 1. Slices begin at the start of each tile
1449 * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y
1450 * */
1451 if(ps_proc->i4_ctb_x >= i2_independent_ctb_x)
1452 {
1453 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1454 }
1455 else
1456 {
1457 /* Indicates multiple tiles in a slice case where
1458 * The new tile belongs to an older slice that started in the previous rows-not the present row
1459 * & (tile_y > slice_y and tile_x < slice_x)
1460 */
1461 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
1462 {
1463 i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
1464 }
1465 /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/
1466 else
1467 {
1468 i4_wd_in_ctb = ps_tile->u2_wd;
1469 }
1470
1471 if(continuous_tiles)
1472 {
1473 ps_proc->i4_ctb_slice_x = i4_wd_in_ctb
1474 - (i2_independent_ctb_x - ps_proc->i4_ctb_x);
1475 }
1476 else
1477 {
1478 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x;
1479 }
1480 }
1481 /* Initialize ctb slice y to zero and at the start of slice row initialize it
1482 to difference between ctb_y and slice's start ctb y */
1483
1484 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1485
1486 /*If beginning of tile, check if slice counters are set correctly*/
1487 if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y))
1488 {
1489 if(ps_slice_hdr->i1_dependent_slice_flag)
1490 {
1491 ps_proc->i4_ctb_slice_x = 0;
1492 ps_proc->i4_ctb_slice_y = 0;
1493 }
1494 /*For slices that span across multiple tiles*/
1495 else if(slice_start_ctb_idx < tile_start_ctb_idx)
1496 {
1497 ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y;
1498 /* Two Cases
1499 * 1 - slice spans across frame-width- but dose not start from 1st column
1500 * 2 - Slice spans across multiple tiles anywhere is a frame
1501 */
1502 /*TODO:In a multiple slice clip, if an independent slice span across more than 2 tiles in a row, it is not supported*/
1503 if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles
1504 {
1505 if(i2_independent_ctb_y <= ps_tile->u1_pos_y)
1506 {
1507 //Check if ctb x is before or after
1508 if(i2_independent_ctb_x > ps_tile->u1_pos_x)
1509 {
1510 ps_proc->i4_ctb_slice_y -= 1;
1511 }
1512 }
1513 }
1514 }
1515 }
1516 //Slice starts from a column which is not the starting tile-column, but is within the tile
1517 if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0))
1518 && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd)))
1519 {
1520 ps_proc->i4_ctb_slice_y -= 1;
1521 }
1522 }
1523 }
1524 else
1525 {
1526 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1527 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1528
1529
1530 {
1531 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1532 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1533 if(ps_proc->i4_ctb_slice_x < 0)
1534 {
1535 ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb;
1536 ps_proc->i4_ctb_slice_y -= 1;
1537 }
1538
1539 /* Initialize ctb slice y to zero and at the start of slice row initialize it
1540 to difference between ctb_y and slice's start ctb y */
1541 }
1542 }
1543
1544 /* Compute TU offset for the current CTB set */
1545 {
1546
1547 WORD32 ctb_luma_min_tu_cnt;
1548 WORD32 ctb_addr;
1549
1550 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1551
1552 ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE;
1553 ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt;
1554
1555 ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map
1556 + ctb_luma_min_tu_cnt * ctb_addr;
1557 if(1 == ps_codec->i4_num_cores)
1558 {
1559 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB];
1560 }
1561 else
1562 {
1563 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr];
1564 }
1565 ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data
1566 + tu_coeff_data_ofst;
1567
1568 }
1569
1570 /* Compute PU related elements for the current CTB set */
1571 {
1572 WORD32 pu_idx;
1573 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1574 pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr];
1575 ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map
1576 + ctb_addr * num_minpu_in_ctb;
1577 ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx;
1578 }
1579
1580 /* Number of ctbs processed in one loop of process function */
1581 {
1582 ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd);
1583 }
1584
1585}
1586void ihevcd_process_thread(process_ctxt_t *ps_proc)
1587{
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001588 {
1589 ithread_set_affinity(ps_proc->i4_id + 1);
1590 }
1591 while(1)
1592 {
1593 IHEVCD_ERROR_T ret;
1594 proc_job_t s_job;
1595
1596 ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job,
1597 sizeof(proc_job_t), 1);
1598 if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1599 break;
1600
1601 ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt;
1602 ps_proc->i4_ctb_x = s_job.i2_ctb_x;
1603 ps_proc->i4_ctb_y = s_job.i2_ctb_y;
1604 ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx;
1605
1606
1607
1608 if(CMD_PROCESS == s_job.i4_cmd)
1609 {
1610 ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst);
Harish Mahendrakar0d8951c2014-05-16 10:31:13 -07001611 ihevcd_process(ps_proc);
1612 }
1613 else if(CMD_FMTCONV == s_job.i4_cmd)
1614 {
1615 sps_t *ps_sps;
1616 codec_t *ps_codec;
1617 ivd_out_bufdesc_t *ps_out_buffer;
1618 WORD32 num_rows;
1619
1620 if(0 == ps_proc->i4_init_done)
1621 {
1622 ihevcd_init_proc_ctxt(ps_proc, 0);
1623 }
1624 ps_sps = ps_proc->ps_sps;
1625 ps_codec = ps_proc->ps_codec;
1626 ps_out_buffer = ps_proc->ps_out_buffer;
1627 num_rows = 1 << ps_sps->i1_log2_ctb_size;
1628
1629 num_rows = MIN(num_rows, (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size)));
1630
1631 if(num_rows < 0)
1632 num_rows = 0;
1633
1634 ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0], ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2],
1635 s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows);
1636 }
1637 }
1638 //ithread_exit(0);
1639 return;
1640}
1641