| //===- X86InstrInfo.cpp - X86 Instruction Information -----------*- C++ -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file was developed by the LLVM research group and is distributed under |
| // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file contains the X86 implementation of the TargetInstrInfo class. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #include "X86InstrInfo.h" |
| #include "X86.h" |
| #include "llvm/CodeGen/MachineInstrBuilder.h" |
| #include "X86GenInstrInfo.inc" |
| using namespace llvm; |
| |
| X86InstrInfo::X86InstrInfo() |
| : TargetInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0])) { |
| } |
| |
| |
| bool X86InstrInfo::isMoveInstr(const MachineInstr& MI, |
| unsigned& sourceReg, |
| unsigned& destReg) const { |
| MachineOpCode oc = MI.getOpcode(); |
| if (oc == X86::MOV8rr || oc == X86::MOV16rr || oc == X86::MOV32rr || |
| oc == X86::FpMOV) { |
| assert(MI.getNumOperands() == 2 && |
| MI.getOperand(0).isRegister() && |
| MI.getOperand(1).isRegister() && |
| "invalid register-register move instruction"); |
| sourceReg = MI.getOperand(1).getReg(); |
| destReg = MI.getOperand(0).getReg(); |
| return true; |
| } |
| return false; |
| } |