| commit | 0cab375231b6949acf4630aed28a38d4a7aa592c | [log] [tgz] |
|---|---|---|
| author | Andrew Lenharth <andrewl@lenharth.org> | Wed Jun 29 13:35:05 2005 +0000 |
| committer | Andrew Lenharth <andrewl@lenharth.org> | Wed Jun 29 13:35:05 2005 +0000 |
| tree | 426c17de652adee8b2a131db8d9f7ba185cc3ae7 | |
| parent | f4da945302ec72271c2439d1663b286d159f1772 [diff] [blame] |
thinko git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22309 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp index 1cb07f1..6cba016 100644 --- a/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -1819,6 +1819,7 @@ Tmp2 = SelectExpr(N.getOperand(1)); BuildMI(BB, DestType == MVT::f64 ? Alpha::DIVT : Alpha::DIVS, 2, Result) .addReg(Tmp1).addReg(Tmp2); + return Result; } else { ConstantSDNode* CSD; //check if we can convert into a shift!