Add some bits that can be set for instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19241 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index bdc30c0..bdaa05b 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -133,6 +133,8 @@
bit isLoad = 0; // Is this instruction a load instruction?
bit isStore = 0; // Is this instruction a store instruction?
bit isTwoAddress = 0; // Is this a two address instruction?
+ bit isConvertibleToThreeAddress = 0; // Can this 2-addr instruction promote?
+ bit isCommutable = 0; // Is this 3 operand instruction commutable?
bit isTerminator = 0; // Is this part of the terminator for a basic block?
bit hasDelaySlot = 0; // Does this instruction have an delay slot?
}