| //===- PIC16InstrInfo.h - PIC16 Instruction Information----------*- C++ -*-===// |
| // |
| // The LLVM Compiler Infrastructure |
| // |
| // This file is distributed under the niversity of Illinois Open Source |
| // License. See LICENSE.TXT for details. |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file contains the PIC16 implementation of the TargetInstrInfo class. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| #ifndef PIC16INSTRUCTIONINFO_H |
| #define PIC16INSTRUCTIONINFO_H |
| |
| #include "PIC16.h" |
| #include "PIC16RegisterInfo.h" |
| #include "llvm/Target/TargetInstrInfo.h" |
| |
| namespace llvm { |
| |
| |
| class PIC16InstrInfo : public TargetInstrInfoImpl |
| { |
| PIC16TargetMachine &TM; |
| const PIC16RegisterInfo RI; |
| public: |
| explicit PIC16InstrInfo(PIC16TargetMachine &TM); |
| |
| /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| /// such, whenever a client has an instance of instruction info, it should |
| /// always be able to get register info as well (through this method). |
| /// |
| virtual const PIC16RegisterInfo &getRegisterInfo() const { return RI; } |
| |
| |
| /// isLoadFromStackSlot - If the specified machine instruction is a direct |
| /// load from a stack slot, return the virtual or physical register number of |
| /// the destination along with the FrameIndex of the loaded stack slot. If |
| /// not, return 0. This predicate must return 0 if the instruction has |
| /// any side effects other than loading from the stack slot. |
| virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; |
| |
| /// isStoreToStackSlot - If the specified machine instruction is a direct |
| /// store to a stack slot, return the virtual or physical register number of |
| /// the source reg along with the FrameIndex of the loaded stack slot. If |
| /// not, return 0. This predicate must return 0 if the instruction has |
| /// any side effects other than storing to the stack slot. |
| virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; |
| |
| /// Used for spilling a register |
| void storeRegToStackSlot(MachineBasicBlock &MBB, |
| MachineBasicBlock::iterator MI, |
| unsigned SrcReg, bool isKill, int FrameIndex, |
| const TargetRegisterClass *RC) const; |
| |
| |
| void loadRegFromStackSlot(MachineBasicBlock &MBB, |
| MachineBasicBlock::iterator MI, |
| unsigned DestReg, int FrameIndex, |
| const TargetRegisterClass *RC) const; |
| |
| /// InsertBranch - Insert a branch into the end of the specified |
| /// MachineBasicBlock. This operands to this method are the same as those |
| /// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch |
| /// returns success and when an unconditional branch (TBB is non-null, FBB is |
| /// null, Cond is empty) needs to be inserted. It returns the number of |
| /// instructions inserted. |
| virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, |
| MachineBasicBlock *FBB, |
| const std::vector<MachineOperand> &Cond) const ; |
| |
| }; |
| |
| } // namespace llvm |
| |
| #endif |