For PR950:
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31542 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Bytecode/Reader/Reader.cpp b/lib/Bytecode/Reader/Reader.cpp
index c20eedd..ec74f78 100644
--- a/lib/Bytecode/Reader/Reader.cpp
+++ b/lib/Bytecode/Reader/Reader.cpp
@@ -719,7 +719,15 @@
Opcode = Instruction::Shl;
break;
case 31: // Shr
- Opcode = Instruction::Shr;
+ // The type of the instruction is based on the operands. We need to
+ // select ashr or lshr based on that type. The iType values are hardcoded
+ // to the values used in bytecode version 5 (and prior) because it is
+ // likely these codes will change in future versions of LLVM. This if
+ // statement says "if (integer type and signed)"
+ if (iType >= 2 && iType <= 9 && iType % 2 != 0)
+ Opcode = Instruction::AShr;
+ else
+ Opcode = Instruction::LShr;
break;
case 32: { //VANext_old ( <= llvm 1.5 )
const Type* ArgTy = getValue(iType, Oprnds[0])->getType();
@@ -987,7 +995,8 @@
}
case Instruction::Shl:
- case Instruction::Shr:
+ case Instruction::LShr:
+ case Instruction::AShr:
Result = new ShiftInst(Instruction::OtherOps(Opcode),
getValue(iType, Oprnds[0]),
getValue(Type::UByteTyID, Oprnds[1]));
@@ -1707,7 +1716,10 @@
Opcode = Instruction::Shl;
break;
case 31: // Shr
- Opcode = Instruction::Shr;
+ if (ArgVec[0]->getType()->isSigned())
+ Opcode = Instruction::AShr;
+ else
+ Opcode = Instruction::LShr;
break;
case 34: // Select
Opcode = Instruction::Select;