commit 43fdea070cd54094b5c3b69ce5a25c04d93c91af
author Chris Lattner <sabre@nondot.org> Sat Apr 02 05:03:24 2005 +0000
committer Chris Lattner <sabre@nondot.org> Sat Apr 02 05:03:24 2005 +0000
tree 231f7fd2a551ab418a2e458e40626a1d41d12c0a
parent 2c8086f4b9916b2d02842be5e375276023225fba

This target doesn't support fabs/fneg yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/IA64/IA64ISelPattern.cpp

diff --git a/lib/Target/IA64/IA64ISelPattern.cpp b/lib/Target/IA64/IA64ISelPattern.cpp
index 16607cb..bb31fc7 100644
--- a/lib/Target/IA64/IA64ISelPattern.cpp
+++ b/lib/Target/IA64/IA64ISelPattern.cpp
@@ -80,6 +80,9 @@
       setOperationAction(ISD::MEMSET           , MVT::Other, Expand);
       setOperationAction(ISD::MEMCPY           , MVT::Other, Expand);
 
+      // We don't support these yet.
+      setOperationAction(ISD::FNEG             , MVT::f64  , Expand);
+      setOperationAction(ISD::FABS             , MVT::f64  , Expand);
       
       computeRegisterProperties();