fsel can take a different FP type for the comparison and for the result. As such
split the FSEL family into 4 things instead of just two.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 0571049..729ffb5 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -816,9 +816,12 @@
Tmp2 = SelectExpr(N.getOperand(1));
Tmp3 = SelectExpr(N.getOperand(2));
if (N.getOperand(0).getValueType() == MVT::f32)
- BuildMI(BB, PPC::FSELS, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
+ Opc = N.getOperand(0).getValueType() == MVT::f32 ?
+ PPC::FSELSS : PPC::FSELSD;
else
- BuildMI(BB, PPC::FSELD, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
+ Opc = N.getOperand(0).getValueType() == MVT::f64 ?
+ PPC::FSELDD : PPC::FSELDS;
+ BuildMI(BB, Opc, 3, Result).addReg(Tmp1).addReg(Tmp2).addReg(Tmp3);
return Result;
case PPCISD::FCFID:
Tmp1 = SelectExpr(N.getOperand(0));