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| <title>Writing an LLVM backend</title> |
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| <div class="doc_title"> |
| Writing an LLVM backend |
| </div> |
| |
| <ol> |
| <li><a href="#intro">Introduction</a> |
| <li><a href="#backends">Writing a backend</a> |
| <ol> |
| <li><a href="#machine">Machine backends</a> |
| <ol> |
| <li><a href="#machineTOC">Outline</a></li> |
| <li><a href="#machineDetails">Implementation details</a></li> |
| </ol></li> |
| <li><a href="#lang">Language backends</a></li> |
| </ol></li> |
| <li><a href="#related">Related reading material</a> |
| </ol> |
| |
| <div class="doc_author"> |
| <p>Written by <a href="http://misha.brukman.net">Misha Brukman</a></p> |
| </div> |
| |
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| <div class="doc_section"> |
| <a name="intro">Introduction</a> |
| </div> |
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| |
| <div class="doc_text"> |
| |
| <p>This document describes techniques for writing backends for LLVM which |
| convert the LLVM representation to machine assembly code or other languages.</p> |
| |
| </div> |
| |
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| <div class="doc_section"> |
| <a name="backends">Writing a backend</a> |
| </div> |
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| |
| <!-- ======================================================================= --> |
| <div class="doc_subsection"> |
| <a name="machine">Machine backends</a> |
| </div> |
| |
| <!-- _______________________________________________________________________ --> |
| <div class="doc_subsubsection"> |
| <a name="machineTOC">Outline</a> |
| </div> |
| |
| <div class="doc_text"> |
| |
| <p>In general, you want to follow the format of X86 or PowerPC (in |
| <tt>lib/Target</tt>).</p> |
| |
| <p>To create a static compiler (one that emits text assembly), you need to |
| implement the following:</p> |
| |
| <ul> |
| <li>Describe the register set. |
| <ul> |
| <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of |
| the register set and register classes</li> |
| <li>Implement a subclass of <tt><a |
| href="CodeGenerator.html#mregisterinfo">MRegisterInfo</a></tt></li> |
| </ul></li> |
| <li>Describe the instruction set. |
| <ul> |
| <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of |
| the instruction set</li> |
| <li>Implement a subclass of <tt><a |
| href="CodeGenerator.html#targetinstrinfo">TargetInstrInfo</a></tt></li> |
| </ul></li> |
| <li>Describe the target machine. |
| <ul> |
| <li>Create a <a href="TableGenFundamentals.html">TableGen</a> description of |
| the target that describes the pointer size and references the instruction |
| set</li> |
| <li>Implement a subclass of <tt><a |
| href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, which |
| configures <tt><a href="CodeGenerator.html#targetdata">TargetData</a></tt> |
| correctly</li> |
| <li>Register your new target using the <tt>RegisterTarget</tt> |
| template:<br><br> |
| <div class="doc_code"><pre> |
| RegisterTarget<<em>MyTargetMachine</em>> M("short_name", " Target name"); |
| </pre></div> |
| <br>Here, <em>MyTargetMachine</em> is the name of your implemented |
| subclass of <tt><a |
| href="CodeGenerator.html#targetmachine">TargetMachine</a></tt>, |
| <em>short_name</em> is the option that will be active following |
| <tt>-march=</tt> to select a target in llc and lli, and the last string |
| is the description of your target to appear in <tt>-help</tt> |
| listing.</li> |
| </ul></li> |
| <li>Implement the assembly printer for the architecture. |
| <ul> |
| <li>Define all of the assembly strings for your target, adding them to the |
| instructions in your *InstrInfo.td file.</li> |
| <li>Implement the <tt>llvm::AsmPrinter</tt> interface.</li> |
| </ul> |
| </li> |
| <li>Implement an instruction selector for the architecture. |
| <ul> |
| <li>The recommended method is the <a href="CodeGenerator.html#instselect"> |
| pattern-matching DAG-to-DAG instruction selector</a> (for example, see |
| the PowerPC backend in PPCISelDAGtoDAG.cpp). Parts of instruction |
| selector creation can be performed by adding patterns to the instructions |
| in your <tt>.td</tt> file.</li> |
| </ul> |
| </li> |
| <li>Optionally, add subtarget support. |
| <ul> |
| <li>If your target has multiple subtargets (e.g. variants with different |
| capabilities), implement the <tt>llvm::TargetSubtarget</tt> interface |
| for your architecture. This allows you to add <tt>-mcpu=</tt> and |
| <tt>-mattr=</tt> options.</li> |
| </ul> |
| <li>Optionally, add JIT support. |
| <ul> |
| <li>Create a subclass of <tt><a |
| href="CodeGenerator.html#targetjitinfo">TargetJITInfo</a></tt></li> |
| <li>Create a machine code emitter that will be used to emit binary code |
| directly into memory, given <tt>MachineInstr</tt>s</li> |
| </ul> |
| </ul> |
| </div> |
| |
| <!-- _______________________________________________________________________ --> |
| <div class="doc_subsubsection"> |
| <a name="machineDetails">Implementation details</a> |
| </div> |
| |
| <div class="doc_text"> |
| |
| <ul> |
| |
| <li><p><b>TableGen register info description</b> - describe a class which |
| will store the register's number in the binary encoding of the instruction |
| (e.g., for JIT purposes).</p> |
| |
| <p>You also need to define register classes to contain these registers, such as |
| the integer register class and floating-point register class, so that you can |
| allocate virtual registers to instructions from these sets, and let the |
| target-independent register allocator automatically choose the actual |
| architected registers.</p> |
| |
| <div class="doc_code"> |
| <pre> |
| // class Register is defined in Target.td |
| <b>class</b> <em>Target</em>Reg<string name> : Register<name> { |
| <b>let</b> Namespace = "<em>Target</em>"; |
| } |
| |
| <b>class</b> IntReg<<b>bits</b><5> num, string name> : <em>Target</em>Reg<name> { |
| <b>field</b> <b>bits</b><5> Num = num; |
| } |
| |
| <b>def</b> R0 : IntReg<0, "%R0">; |
| ... |
| |
| // class RegisterClass is defined in Target.td |
| <b>def</b> IReg : RegisterClass<i64, 64, [R0, ... ]>; |
| </pre> |
| </div> |
| </li> |
| |
| <li><p><b>TableGen instruction info description</b> - break up instructions into |
| classes, usually that's already done by the manufacturer (see instruction |
| manual). Define a class for each instruction category. Define each opcode as a |
| subclass of the category, with appropriate parameters such as the fixed binary |
| encoding of opcodes and extended opcodes, and map the register bits to the bits |
| of the instruction which they are encoded in (for the JIT). Also specify how |
| the instruction should be printed so it can use the automatic assembly printer, |
| e.g.:</p> |
| |
| <div class="doc_code"> |
| <pre> |
| // class Instruction is defined in Target.td |
| <b>class</b> Form<<b>bits</b><6> opcode, <b>dag</b> OL, <b>string</b> asmstr> : Instruction { |
| <b>field</b> <b>bits</b><42> Inst; |
| |
| <b>let</b> Namespace = "<em>Target</em>"; |
| <b>let</b> Inst{0-6} = opcode; |
| <b>let</b> OperandList = OL; |
| <b>let</b> AsmString = asmstr; |
| } |
| |
| <b>def</b> ADD : Form<42, (ops IReg:$rD, IReg:$rA, IReg:$rB), "add $rD, $rA, $rB">; |
| </pre> |
| </div> |
| </li> |
| |
| </ul> |
| |
| </div> |
| |
| <!-- ======================================================================= --> |
| <div class="doc_subsection"> |
| <a name="lang">Language backends</a> |
| </div> |
| |
| <div class="doc_text"> |
| |
| <p>For now, just take a look at <tt>lib/Target/CBackend</tt> for an example of |
| how the C backend is written.</p> |
| |
| </div> |
| |
| <!-- *********************************************************************** --> |
| <div class="doc_section"> |
| <a name="related">Related reading material</a> |
| </div> |
| <!-- *********************************************************************** --> |
| |
| <div class="doc_text"> |
| |
| <ul> |
| <li><a href="CodeGenerator.html">Code generator</a> - |
| describes some of the classes in code generation at a high level, but |
| it is not (yet) complete</li> |
| <li><a href="TableGenFundamentals.html">TableGen fundamentals</a> - |
| describes how to use TableGen to describe your target information |
| succinctly</li> |
| <li><a href="HowToSubmitABug.html#codegen">Debugging code generation with |
| bugpoint</a> - shows bugpoint usage scenarios to simplify backend |
| development</li> |
| </ul> |
| |
| </div> |
| |
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