revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93985 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index 1168fef..4724ff7 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -22,8 +22,8 @@
// Register the target.
RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
- RegisterAsmInfo<MipsBEMCAsmInfo> A(TheMipsTarget);
- RegisterAsmInfo<MipsLEMCAsmInfo> B(TheMipselTarget);
+ RegisterAsmInfo<MipsMCAsmInfo> A(TheMipsTarget);
+ RegisterAsmInfo<MipsMCAsmInfo> B(TheMipselTarget);
}
// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
@@ -60,7 +60,8 @@
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::
-addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel) {
+addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel)
+{
PM.add(createMipsISelDag(*this));
return false;
}