Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
index c690982..96c8665 100644
--- a/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
@@ -55,7 +55,8 @@
const PPCSubtarget &Subtarget;
public:
explicit PPCAsmPrinter(raw_ostream &O, TargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
+ const TargetAsmInfo *T, CodeGenOpt::Level OL,
+ bool V)
: AsmPrinter(O, TM, T, OL, V),
Subtarget(TM.getSubtarget<PPCSubtarget>()) {}
@@ -298,7 +299,8 @@
MachineModuleInfo *MMI;
public:
explicit PPCLinuxAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
+ const TargetAsmInfo *T, CodeGenOpt::Level OL,
+ bool V)
: PPCAsmPrinter(O, TM, T, OL, V), DW(0), MMI(0) {}
virtual const char *getPassName() const {
@@ -327,7 +329,8 @@
raw_ostream &OS;
public:
explicit PPCDarwinAsmPrinter(raw_ostream &O, PPCTargetMachine &TM,
- const TargetAsmInfo *T, unsigned OL, bool V)
+ const TargetAsmInfo *T, CodeGenOpt::Level OL,
+ bool V)
: PPCAsmPrinter(O, TM, T, OL, V), DW(0), MMI(0), OS(O) {}
virtual const char *getPassName() const {
@@ -1176,7 +1179,8 @@
///
FunctionPass *llvm::createPPCAsmPrinterPass(raw_ostream &o,
PPCTargetMachine &tm,
- unsigned OptLevel, bool verbose) {
+ CodeGenOpt::Level OptLevel,
+ bool verbose) {
const PPCSubtarget *Subtarget = &tm.getSubtarget<PPCSubtarget>();
if (Subtarget->isDarwin()) {
diff --git a/lib/Target/PowerPC/PPC.h b/lib/Target/PowerPC/PPC.h
index f5507c2..78c970e 100644
--- a/lib/Target/PowerPC/PPC.h
+++ b/lib/Target/PowerPC/PPC.h
@@ -18,6 +18,8 @@
// GCC #defines PPC on Linux but we use it as our namespace name
#undef PPC
+#include "llvm/Target/TargetMachine.h"
+
namespace llvm {
class PPCTargetMachine;
class FunctionPass;
@@ -28,7 +30,7 @@
FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
FunctionPass *createPPCAsmPrinterPass(raw_ostream &OS,
PPCTargetMachine &TM,
- unsigned OptLevel, bool Verbose);
+ CodeGenOpt::Level OptLevel, bool Verbose);
FunctionPass *createPPCCodeEmitterPass(PPCTargetMachine &TM,
MachineCodeEmitter &MCE);
} // end namespace llvm;
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 3e1dc32..bb17ea9 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -129,21 +129,22 @@
// Pass Pipeline Configuration
//===----------------------------------------------------------------------===//
-bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, unsigned OptLevel) {
+bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
// Install an instruction selector.
PM.add(createPPCISelDag(*this));
return false;
}
-bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, unsigned OptLevel) {
-
+bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel) {
// Must run branch selection immediately preceding the asm printer.
PM.add(createPPCBranchSelectionPass());
return false;
}
bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
- unsigned OptLevel,
+ CodeGenOpt::Level OptLevel,
bool Verbose,
raw_ostream &Out) {
assert(AsmPrinterCtor && "AsmPrinter was not linked in");
@@ -153,7 +154,8 @@
return false;
}
-bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE) {
// The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
// FIXME: This should be moved to TargetJITInfo!!
@@ -184,7 +186,8 @@
return false;
}
-bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE) {
// Machine code emitter pass for PowerPC.
PM.add(createPPCCodeEmitterPass(*this, MCE));
diff --git a/lib/Target/PowerPC/PPCTargetMachine.h b/lib/Target/PowerPC/PPCTargetMachine.h
index 2f839fb..efdf918 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/lib/Target/PowerPC/PPCTargetMachine.h
@@ -46,7 +46,8 @@
// set this functions to ctor pointer at startup time if they are linked in.
typedef FunctionPass *(*AsmPrinterCtorFn)(raw_ostream &o,
PPCTargetMachine &tm,
- unsigned OptLevel, bool verbose);
+ CodeGenOpt::Level OptLevel,
+ bool verbose);
static AsmPrinterCtorFn AsmPrinterCtor;
public:
@@ -76,13 +77,15 @@
}
// Pass Pipeline Configuration
- virtual bool addInstSelector(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addPreEmitPass(PassManagerBase &PM, unsigned OptLevel);
- virtual bool addAssemblyEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+ virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
+ virtual bool addAssemblyEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
bool Verbose, raw_ostream &Out);
- virtual bool addCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
- virtual bool addSimpleCodeEmitter(PassManagerBase &PM, unsigned OptLevel,
+ virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
+ CodeGenOpt::Level OptLevel,
bool DumpAsm, MachineCodeEmitter &MCE);
virtual bool getEnableTailMergeDefault() const;
};