Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 9cf2455..35092b5 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -42,7 +42,7 @@
// Bit fields of the flags variable used for different operand properties
enum {
DEFFLAG = 0x01, // this is a def of the operand
- USEFLAG = 0x02, // this is a use of the operand
+ USEFLAG = 0x02 // this is a use of the operand
};
public:
diff --git a/include/llvm/CodeGen/ScheduleDAG.h b/include/llvm/CodeGen/ScheduleDAG.h
index 128a74b..870d48a 100644
--- a/include/llvm/CodeGen/ScheduleDAG.h
+++ b/include/llvm/CodeGen/ScheduleDAG.h
@@ -41,7 +41,7 @@
enum HazardType {
NoHazard, // This instruction can be emitted at this cycle.
Hazard, // This instruction can't be emitted at this cycle.
- NoopHazard, // This instruction can't be emitted, and needs noops.
+ NoopHazard // This instruction can't be emitted, and needs noops.
};
/// getHazardType - Return the hazard type of emitting this node. There are
diff --git a/lib/Analysis/DataStructure/DataStructure.cpp b/lib/Analysis/DataStructure/DataStructure.cpp
index f6fca1f..4e32654 100644
--- a/lib/Analysis/DataStructure/DataStructure.cpp
+++ b/lib/Analysis/DataStructure/DataStructure.cpp
@@ -43,7 +43,7 @@
DSAFieldLimit("dsa-field-limit", cl::Hidden,
cl::desc("Number of fields to track before collapsing a node"),
cl::init(256));
-};
+}
#if 0
#define TIME_REGION(VARNAME, DESC) \
diff --git a/lib/Analysis/IPA/Andersens.cpp b/lib/Analysis/IPA/Andersens.cpp
index 877cf2e..1188693 100644
--- a/lib/Analysis/IPA/Andersens.cpp
+++ b/lib/Analysis/IPA/Andersens.cpp
@@ -192,7 +192,7 @@
enum {
UniversalSet = 0,
NullPtr = 1,
- NullObject = 2,
+ NullObject = 2
};
public:
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 8d51f7f..8c6a7b5 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -59,7 +59,7 @@
EnableJoining("join-liveintervals",
cl::desc("Join compatible live intervals"),
cl::init(true));
-};
+}
void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
{
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 3fbfbf9..979305f 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -65,7 +65,7 @@
enum LegalizeAction {
Legal, // The target natively supports this operation.
Promote, // This operation should be executed in a larger type.
- Expand, // Try to expand this to other ops, otherwise use a libcall.
+ Expand // Try to expand this to other ops, otherwise use a libcall.
};
/// ValueTypeActions - This is a bitvector that contains two bits for each
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 4bd2047..9e98a97 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -60,7 +60,7 @@
RegisterPass<TwoAddressInstructionPass>
X("twoaddressinstruction", "Two-Address instruction pass");
-};
+}
const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo();
diff --git a/lib/Support/Compressor.cpp b/lib/Support/Compressor.cpp
index 1233cf4..99bfd67 100644
--- a/lib/Support/Compressor.cpp
+++ b/lib/Support/Compressor.cpp
@@ -23,7 +23,7 @@
enum CompressionTypes {
COMP_TYPE_NONE = '0',
- COMP_TYPE_BZIP2 = '2',
+ COMP_TYPE_BZIP2 = '2'
};
static int getdata(char*& buffer, size_t &size,
diff --git a/lib/Support/IsInf.cpp b/lib/Support/IsInf.cpp
index 5160110..39c11cd 100644
--- a/lib/Support/IsInf.cpp
+++ b/lib/Support/IsInf.cpp
@@ -42,4 +42,4 @@
int IsInf (float f) { return isinf (f); }
int IsInf (double d) { return isinf (d); }
-}; // end namespace llvm;
+} // end namespace llvm;
diff --git a/lib/Support/IsNAN.cpp b/lib/Support/IsNAN.cpp
index 3300b7b..2ed2b28 100644
--- a/lib/Support/IsNAN.cpp
+++ b/lib/Support/IsNAN.cpp
@@ -31,4 +31,4 @@
int IsNAN (float f) { return isnan (f); }
int IsNAN (double d) { return isnan (d); }
-}; // end namespace llvm;
+} // end namespace llvm;
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 0a48978..7cf7dd3 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -31,7 +31,7 @@
namespace ARMISD {
enum {
FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END,
- RET_FLAG,
+ RET_FLAG
};
}
diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h
index 569fa74..d6886fc 100644
--- a/lib/Target/Alpha/AlphaISelLowering.h
+++ b/lib/Target/Alpha/AlphaISelLowering.h
@@ -42,7 +42,7 @@
CALL,
/// DIVCALL - used for special library calls for div and rem
- DivCall,
+ DivCall
};
}
diff --git a/lib/Target/Alpha/AlphaRelocations.h b/lib/Target/Alpha/AlphaRelocations.h
index 59b9765..c532f21 100644
--- a/lib/Target/Alpha/AlphaRelocations.h
+++ b/lib/Target/Alpha/AlphaRelocations.h
@@ -23,7 +23,7 @@
reloc_gprellow,
reloc_gprelhigh,
reloc_gpdist,
- reloc_bsr,
+ reloc_bsr
};
}
}
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 1e6c1e5..850b412 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1748,7 +1748,7 @@
OP_VSPLTISW3,
OP_VSLDOI4,
OP_VSLDOI8,
- OP_VSLDOI12,
+ OP_VSLDOI12
};
if (OpNum == OP_COPY) {
diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h
index 857d42b..25551fb 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/lib/Target/PowerPC/PPCInstrInfo.h
@@ -44,7 +44,7 @@
/// PPC970_Mask/Shift - This is a bitmask that selects the pipeline type that
/// an instruction is issued to.
PPC970_Shift = 3,
- PPC970_Mask = 0x07 << PPC970_Shift,
+ PPC970_Mask = 0x07 << PPC970_Shift
};
enum PPC970_Unit {
/// These are the various PPC970 execution unit pipelines. Each instruction
@@ -56,7 +56,7 @@
PPC970_CRU = 4 << PPC970_Shift, // Control Register Unit
PPC970_VALU = 5 << PPC970_Shift, // Vector ALU
PPC970_VPERM = 6 << PPC970_Shift, // Vector Permute Unit
- PPC970_BRU = 7 << PPC970_Shift, // Branch Unit
+ PPC970_BRU = 7 << PPC970_Shift // Branch Unit
};
}
diff --git a/lib/Target/PowerPC/PPCJITInfo.cpp b/lib/Target/PowerPC/PPCJITInfo.cpp
index a6d630e..6ee10d7 100644
--- a/lib/Target/PowerPC/PPCJITInfo.cpp
+++ b/lib/Target/PowerPC/PPCJITInfo.cpp
@@ -165,7 +165,7 @@
void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
// If this is just a call to an external function, emit a branch instead of a
// call. The code is the same except for one bit of the last instruction.
- if (Fn != PPC32CompilationCallback) {
+ if (Fn != (void*)PPC32CompilationCallback) {
MCE.startFunctionStub(4*4);
void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
MCE.emitWordBE(0);
diff --git a/lib/Target/PowerPC/PPCRelocations.h b/lib/Target/PowerPC/PPCRelocations.h
index 77c3519..20d747b 100644
--- a/lib/Target/PowerPC/PPCRelocations.h
+++ b/lib/Target/PowerPC/PPCRelocations.h
@@ -50,7 +50,7 @@
// relocated to point to a POINTER to the indicated global. The low-16
// bits of the instruction are rewritten with the low 16-bits of the
// address of the pointer.
- reloc_absolute_ptr_low,
+ reloc_absolute_ptr_low
};
}
}
diff --git a/lib/Target/Sparc/Sparc.h b/lib/Target/Sparc/Sparc.h
index 084bfe3..c2ae18d 100644
--- a/lib/Target/Sparc/Sparc.h
+++ b/lib/Target/Sparc/Sparc.h
@@ -75,7 +75,7 @@
FCC_UGE = 12+16, // Unordered or Greater or Equal
FCC_LE = 13+16, // Less or Equal
FCC_ULE = 14+16, // Unordered or Less or Equal
- FCC_O = 15+16, // Ordered
+ FCC_O = 15+16 // Ordered
};
}
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 123b86a..25f6e23 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -48,7 +48,7 @@
ITOF, // Int to FP within a FP register.
CALL, // A call instruction.
- RET_FLAG, // Return with a flag operand.
+ RET_FLAG // Return with a flag operand.
};
}
diff --git a/lib/Target/Sparc/SparcInstrInfo.h b/lib/Target/Sparc/SparcInstrInfo.h
index 3dd8b8e..166793e 100644
--- a/lib/Target/Sparc/SparcInstrInfo.h
+++ b/lib/Target/Sparc/SparcInstrInfo.h
@@ -29,7 +29,7 @@
Store = (1<<2),
DelaySlot = (1<<3)
};
-};
+}
class SparcInstrInfo : public TargetInstrInfo {
const SparcRegisterInfo RI;
diff --git a/lib/Target/Sparc/SparcSubtarget.cpp b/lib/Target/Sparc/SparcSubtarget.cpp
index beda79d..9940fcf 100644
--- a/lib/Target/Sparc/SparcSubtarget.cpp
+++ b/lib/Target/Sparc/SparcSubtarget.cpp
@@ -40,4 +40,4 @@
// Unless explicitly enabled, disable the V9 instructions.
if (!EnableV9)
IsV9 = false;
-};
+}
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index bf70d12..c9e92fa 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -28,7 +28,7 @@
bool UnsafeFPMath;
bool FiniteOnlyFPMathOption;
Reloc::Model RelocationModel;
-};
+}
namespace {
cl::opt<bool, true> PrintCode("print-machineinstrs",
cl::desc("Print generated machine code"),
@@ -70,7 +70,7 @@
clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
"Relocatable external references, non-relocatable code"),
clEnumValEnd));
-};
+}
//---------------------------------------------------------------------------
// TargetMachine Class
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 50c42ec..b53748a 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -47,7 +47,7 @@
struct X86ISelAddressMode {
enum {
RegBase,
- FrameIndexBase,
+ FrameIndexBase
} BaseType;
struct { // This is really a union, discriminated by BaseType!
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 9269daf..38aa227 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -156,7 +156,7 @@
/// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector,
/// corresponds to X86::PINSRW.
- PINSRW,
+ PINSRW
};
// X86 specific condition code. These correspond to X86_*_COND in
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index f3e1c28..c0fa58d 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -35,7 +35,7 @@
struct X86AddressMode {
enum {
RegBase,
- FrameIndexBase,
+ FrameIndexBase
} BaseType;
union {
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index d6dfae1..b49c351 100644
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -162,7 +162,7 @@
SpecialFP = 7 << FPTypeShift,
OpcodeShift = 16,
- OpcodeMask = 0xFF << OpcodeShift,
+ OpcodeMask = 0xFF << OpcodeShift
// Bits 25 -> 31 are unused
};
}
diff --git a/lib/Target/X86/X86JITInfo.cpp b/lib/Target/X86/X86JITInfo.cpp
index 3d12221..6f83651 100644
--- a/lib/Target/X86/X86JITInfo.cpp
+++ b/lib/Target/X86/X86JITInfo.cpp
@@ -167,7 +167,7 @@
}
void *X86JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
- if (Fn != X86CompilationCallback) {
+ if (Fn != (void*)X86CompilationCallback) {
MCE.startFunctionStub(5);
MCE.emitByte(0xE9);
MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4);
diff --git a/lib/Target/X86/X86Relocations.h b/lib/Target/X86/X86Relocations.h
index 7a5f1a6..bc1efabc 100644
--- a/lib/Target/X86/X86Relocations.h
+++ b/lib/Target/X86/X86Relocations.h
@@ -25,7 +25,7 @@
// reloc_absolute_word - Absolute relocation, just add the relocated value
// to the value already in memory.
- reloc_absolute_word = 1,
+ reloc_absolute_word = 1
};
}
}
diff --git a/lib/Transforms/Instrumentation/RSProfiling.cpp b/lib/Transforms/Instrumentation/RSProfiling.cpp
index 5918d7e..31c01ee 100644
--- a/lib/Transforms/Instrumentation/RSProfiling.cpp
+++ b/lib/Transforms/Instrumentation/RSProfiling.cpp
@@ -162,7 +162,7 @@
RegisterOpt<ProfilerRS> X("insert-rs-profiling-framework",
"Insert random sampling instrumentation framework");
-};
+}
//Local utilities
static void ReplacePhiPred(BasicBlock* btarget,
diff --git a/lib/Transforms/Instrumentation/RSProfiling.h b/lib/Transforms/Instrumentation/RSProfiling.h
index 304ce08..e07db00 100644
--- a/lib/Transforms/Instrumentation/RSProfiling.h
+++ b/lib/Transforms/Instrumentation/RSProfiling.h
@@ -26,4 +26,4 @@
void IncrementCounterInBlock(BasicBlock *BB, unsigned CounterNum,
GlobalValue *CounterArray);
};
-};
+}
diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp
index 22a14fb..d6e524e 100644
--- a/lib/VMCore/Constants.cpp
+++ b/lib/VMCore/Constants.cpp
@@ -529,7 +529,7 @@
case Type::DoubleTyID:
return true; // This is the largest type...
}
-};
+}
//===----------------------------------------------------------------------===//
// Factory Function Implementation
diff --git a/tools/analyze/GraphPrinters.cpp b/tools/analyze/GraphPrinters.cpp
index 6f2ca5d..8826cd2 100644
--- a/tools/analyze/GraphPrinters.cpp
+++ b/tools/analyze/GraphPrinters.cpp
@@ -74,4 +74,4 @@
RegisterAnalysis<CallGraphPrinter> P2("print-callgraph",
"Print Call Graph to 'dot' file");
-};
+}
diff --git a/tools/bugpoint/ListReducer.h b/tools/bugpoint/ListReducer.h
index 484b3b5..9bb93b5 100644
--- a/tools/bugpoint/ListReducer.h
+++ b/tools/bugpoint/ListReducer.h
@@ -27,7 +27,7 @@
enum TestResult {
NoFailure, // No failure of the predicate was detected
KeepSuffix, // The suffix alone satisfies the predicate
- KeepPrefix, // The prefix alone satisfies the predicate
+ KeepPrefix // The prefix alone satisfies the predicate
};
virtual ~ListReducer() {}
diff --git a/tools/llvm-ar/llvm-ar.cpp b/tools/llvm-ar/llvm-ar.cpp
index 00dcc39..fdcc9e6 100644
--- a/tools/llvm-ar/llvm-ar.cpp
+++ b/tools/llvm-ar/llvm-ar.cpp
@@ -80,7 +80,7 @@
QuickAppend, ///< Quickly append to end of archive
ReplaceOrInsert, ///< Replace or Insert members
DisplayTable, ///< Display the table of contents
- Extract, ///< Extract files back to file system
+ Extract ///< Extract files back to file system
};
// Modifiers to follow operation to vary behavior
diff --git a/tools/llvm-nm/llvm-nm.cpp b/tools/llvm-nm/llvm-nm.cpp
index 604e30a..dae8f95 100644
--- a/tools/llvm-nm/llvm-nm.cpp
+++ b/tools/llvm-nm/llvm-nm.cpp
@@ -63,7 +63,7 @@
bool MultipleFiles = false;
std::string ToolName;
-};
+}
char TypeCharForSymbol (GlobalValue &GV) {
if (GV.isExternal ()) return 'U';
diff --git a/tools/llvmc/CompilerDriver.h b/tools/llvmc/CompilerDriver.h
index 1100e3e..3ff3e60 100644
--- a/tools/llvmc/CompilerDriver.h
+++ b/tools/llvmc/CompilerDriver.h
@@ -65,7 +65,7 @@
PREPROCESSES_FLAG = 0x0002, ///< Does this action preprocess?
TRANSLATES_FLAG = 0x0004, ///< Does this action translate?
OUTPUT_IS_ASM_FLAG = 0x0008, ///< Action produces .ll files?
- FLAGS_MASK = 0x000F, ///< Union of all flags
+ FLAGS_MASK = 0x000F ///< Union of all flags
};
/// This type is the input list to the CompilerDriver. It provides
@@ -131,7 +131,7 @@
EMIT_RAW_FLAG = 0x0080, ///< Emit raw, unoptimized bytecode
KEEP_TEMPS_FLAG = 0x0100, ///< Don't delete temporary files
STRIP_OUTPUT_FLAG = 0x0200, ///< Strip symbols from linked output
- DRIVER_FLAGS_MASK = 0x03FF, ///< Union of the above flags
+ DRIVER_FLAGS_MASK = 0x03FF ///< Union of the above flags
};
/// @}
diff --git a/tools/llvmc/ConfigLexer.h b/tools/llvmc/ConfigLexer.h
index 3e87fc1..2d5c64e 100644
--- a/tools/llvmc/ConfigLexer.h
+++ b/tools/llvmc/ConfigLexer.h
@@ -102,7 +102,7 @@
TRUETOK, ///< A boolean true value (true/yes/on)
VERBOSE_SUBST, ///< The substitution item %verbose%
VERSION_TOK, ///< The name "version" (and variants)
- WOPTS_SUBST, ///< The %WOpts% substitution
+ WOPTS_SUBST ///< The %WOpts% substitution
};
extern ConfigLexerTokens Configlex();
diff --git a/tools/llvmc/ConfigLexer.l b/tools/llvmc/ConfigLexer.l
index ca21f4f..34b9a17 100644
--- a/tools/llvmc/ConfigLexer.l
+++ b/tools/llvmc/ConfigLexer.l
@@ -64,7 +64,7 @@
}
YY_FATAL_ERROR("Substitition tokens not allowed in names" );
return ERRORTOK;
-};
+}
inline llvm::ConfigLexerTokens handleValueContext(llvm::ConfigLexerTokens token) {
ConfigLexerState.StringVal = yytext;
diff --git a/tools/llvmc/ConfigLexer.l.cvs b/tools/llvmc/ConfigLexer.l.cvs
index ca21f4f..34b9a17 100644
--- a/tools/llvmc/ConfigLexer.l.cvs
+++ b/tools/llvmc/ConfigLexer.l.cvs
@@ -64,7 +64,7 @@
}
YY_FATAL_ERROR("Substitition tokens not allowed in names" );
return ERRORTOK;
-};
+}
inline llvm::ConfigLexerTokens handleValueContext(llvm::ConfigLexerTokens token) {
ConfigLexerState.StringVal = yytext;
diff --git a/tools/opt/GraphPrinters.cpp b/tools/opt/GraphPrinters.cpp
index 6f2ca5d..8826cd2 100644
--- a/tools/opt/GraphPrinters.cpp
+++ b/tools/opt/GraphPrinters.cpp
@@ -74,4 +74,4 @@
RegisterAnalysis<CallGraphPrinter> P2("print-callgraph",
"Print Call Graph to 'dot' file");
-};
+}
diff --git a/utils/PerfectShuffle/PerfectShuffle.cpp b/utils/PerfectShuffle/PerfectShuffle.cpp
index 386b05d..803aece 100644
--- a/utils/PerfectShuffle/PerfectShuffle.cpp
+++ b/utils/PerfectShuffle/PerfectShuffle.cpp
@@ -460,7 +460,7 @@
OP_VSPLTISW3,
OP_VSLDOI4,
OP_VSLDOI8,
- OP_VSLDOI12,
+ OP_VSLDOI12
};
struct vmrghw : public Operator {
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 0c97faf..8206ea5 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -37,7 +37,7 @@
OS << " enum {\n NoRegister,\n";
for (unsigned i = 0, e = Registers.size(); i != e; ++i)
- OS << " " << Registers[i].getName() << ", \t// " << i+1 << "\n";
+ OS << " " << Registers[i].getName() << (i != (e-1) ? ", \t// " : " \t// ") << i+1 << "\n";
OS << " };\n";
if (!Namespace.empty())