Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index bead83d..712feda 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -47,19 +47,19 @@
/// makeVTList - Return an instance of the SDVTList struct initialized with the
/// specified members.
-static SDVTList makeVTList(const MVT *VTs, unsigned NumVTs) {
+static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
SDVTList Res = {VTs, NumVTs};
return Res;
}
-static const fltSemantics *MVTToAPFloatSemantics(MVT VT) {
+static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
switch (VT.getSimpleVT()) {
default: llvm_unreachable("Unknown FP format");
- case MVT::f32: return &APFloat::IEEEsingle;
- case MVT::f64: return &APFloat::IEEEdouble;
- case MVT::f80: return &APFloat::x87DoubleExtended;
- case MVT::f128: return &APFloat::IEEEquad;
- case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
+ case EVT::f32: return &APFloat::IEEEsingle;
+ case EVT::f64: return &APFloat::IEEEdouble;
+ case EVT::f80: return &APFloat::x87DoubleExtended;
+ case EVT::f128: return &APFloat::IEEEquad;
+ case EVT::ppcf128: return &APFloat::PPCDoubleDouble;
}
}
@@ -77,19 +77,19 @@
return getValueAPF().bitwiseIsEqual(V);
}
-bool ConstantFPSDNode::isValueValidForType(MVT VT,
+bool ConstantFPSDNode::isValueValidForType(EVT VT,
const APFloat& Val) {
assert(VT.isFloatingPoint() && "Can only convert between FP types");
// PPC long double cannot be converted to any other type.
- if (VT == MVT::ppcf128 ||
+ if (VT == EVT::ppcf128 ||
&Val.getSemantics() == &APFloat::PPCDoubleDouble)
return false;
// convert modifies in place, so make a copy.
APFloat Val2 = APFloat(Val);
bool losesInfo;
- (void) Val2.convert(*MVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
+ (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
&losesInfo);
return !losesInfo;
}
@@ -502,7 +502,7 @@
/// doNotCSE - Return true if CSE should not be performed for this node.
static bool doNotCSE(SDNode *N) {
- if (N->getValueType(0) == MVT::Flag)
+ if (N->getValueType(0) == EVT::Flag)
return true; // Never CSE anything that produces a flag.
switch (N->getOpcode()) {
@@ -517,7 +517,7 @@
// Check that remaining values produced are not flags.
for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
- if (N->getValueType(i) == MVT::Flag)
+ if (N->getValueType(i) == EVT::Flag)
return true; // Never CSE anything that produces a flag.
return false;
@@ -638,7 +638,7 @@
break;
}
case ISD::VALUETYPE: {
- MVT VT = cast<VTSDNode>(N)->getVT();
+ EVT VT = cast<VTSDNode>(N)->getVT();
if (VT.isExtended()) {
Erased = ExtendedValueTypeNodes.erase(VT);
} else {
@@ -656,7 +656,7 @@
// Verify that the node was actually in one of the CSE maps, unless it has a
// flag result (which cannot be CSE'd) or is one of the special cases that are
// not subject to CSE.
- if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Flag &&
+ if (!Erased && N->getValueType(N->getNumValues()-1) != EVT::Flag &&
!N->isMachineOpcode() && !doNotCSE(N)) {
N->dump(this);
cerr << "\n";
@@ -754,7 +754,7 @@
default:
break;
case ISD::BUILD_PAIR: {
- MVT VT = N->getValueType(0);
+ EVT VT = N->getValueType(0);
assert(N->getNumValues() == 1 && "Too many results!");
assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
"Wrong return type!");
@@ -772,7 +772,7 @@
assert(N->getValueType(0).isVector() && "Wrong return type!");
assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
"Wrong number of operands!");
- MVT EltVT = N->getValueType(0).getVectorElementType();
+ EVT EltVT = N->getValueType(0).getVectorElementType();
for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I)
assert((I->getValueType() == EltVT ||
(EltVT.isInteger() && I->getValueType().isInteger() &&
@@ -783,13 +783,13 @@
}
}
-/// getMVTAlignment - Compute the default alignment value for the
+/// getEVTAlignment - Compute the default alignment value for the
/// given type.
///
-unsigned SelectionDAG::getMVTAlignment(MVT VT) const {
- const Type *Ty = VT == MVT::iPTR ?
+unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
+ const Type *Ty = VT == EVT::iPTR ?
PointerType::get(Type::Int8Ty, 0) :
- VT.getTypeForMVT();
+ VT.getTypeForEVT();
return TLI.getTargetData()->getABITypeAlignment(Ty);
}
@@ -798,7 +798,7 @@
SelectionDAG::SelectionDAG(TargetLowering &tli, FunctionLoweringInfo &fli)
: TLI(tli), FLI(fli), DW(0),
EntryNode(ISD::EntryToken, DebugLoc::getUnknownLoc(),
- getVTList(MVT::Other)), Root(getEntryNode()) {
+ getVTList(EVT::Other)), Root(getEntryNode()) {
AllNodes.push_back(&EntryNode);
}
@@ -839,7 +839,7 @@
Root = getEntryNode();
}
-SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, MVT VT) {
+SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
if (Op.getValueType() == VT) return Op;
APInt Imm = APInt::getLowBitsSet(Op.getValueSizeInBits(),
VT.getSizeInBits());
@@ -849,29 +849,29 @@
/// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
///
-SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, MVT VT) {
- MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
+SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
+ EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
SDValue NegOne =
getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
return getNode(ISD::XOR, DL, VT, Val, NegOne);
}
-SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
- MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
+SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
+ EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
assert((EltVT.getSizeInBits() >= 64 ||
(uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
"getConstant with a uint64_t value that doesn't fit in the type!");
return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
}
-SDValue SelectionDAG::getConstant(const APInt &Val, MVT VT, bool isT) {
+SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
}
-SDValue SelectionDAG::getConstant(const ConstantInt &Val, MVT VT, bool isT) {
+SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
assert(VT.isInteger() && "Cannot create FP integer constant!");
- MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
+ EVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
assert(Val.getBitWidth() == EltVT.getSizeInBits() &&
"APInt size does not match type size!");
@@ -906,14 +906,14 @@
}
-SDValue SelectionDAG::getConstantFP(const APFloat& V, MVT VT, bool isTarget) {
+SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
}
-SDValue SelectionDAG::getConstantFP(const ConstantFP& V, MVT VT, bool isTarget){
+SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
- MVT EltVT =
+ EVT EltVT =
VT.isVector() ? VT.getVectorElementType() : VT;
// Do the map lookup using the actual bit pattern for the floating point
@@ -946,24 +946,24 @@
return Result;
}
-SDValue SelectionDAG::getConstantFP(double Val, MVT VT, bool isTarget) {
- MVT EltVT =
+SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
+ EVT EltVT =
VT.isVector() ? VT.getVectorElementType() : VT;
- if (EltVT==MVT::f32)
+ if (EltVT==EVT::f32)
return getConstantFP(APFloat((float)Val), VT, isTarget);
else
return getConstantFP(APFloat(Val), VT, isTarget);
}
SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV,
- MVT VT, int64_t Offset,
+ EVT VT, int64_t Offset,
bool isTargetGA,
unsigned char TargetFlags) {
assert((TargetFlags == 0 || isTargetGA) &&
"Cannot set target flags on target-independent globals");
// Truncate (with sign-extension) the offset value to the pointer size.
- MVT PTy = TLI.getPointerTy();
+ EVT PTy = TLI.getPointerTy();
unsigned BitWidth = PTy.getSizeInBits();
if (BitWidth < 64)
Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
@@ -996,7 +996,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getFrameIndex(int FI, MVT VT, bool isTarget) {
+SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
@@ -1011,7 +1011,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getJumpTable(int JTI, MVT VT, bool isTarget,
+SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
unsigned char TargetFlags) {
assert((TargetFlags == 0 || isTarget) &&
"Cannot set target flags on target-independent jump tables");
@@ -1030,7 +1030,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getConstantPool(Constant *C, MVT VT,
+SDValue SelectionDAG::getConstantPool(Constant *C, EVT VT,
unsigned Alignment, int Offset,
bool isTarget,
unsigned char TargetFlags) {
@@ -1056,7 +1056,7 @@
}
-SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, MVT VT,
+SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
unsigned Alignment, int Offset,
bool isTarget,
unsigned char TargetFlags) {
@@ -1083,7 +1083,7 @@
SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::BasicBlock, getVTList(EVT::Other), 0, 0);
ID.AddPointer(MBB);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -1095,7 +1095,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getValueType(MVT VT) {
+SDValue SelectionDAG::getValueType(EVT VT) {
if (VT.isSimple() && (unsigned)VT.getSimpleVT() >= ValueTypeNodes.size())
ValueTypeNodes.resize(VT.getSimpleVT()+1);
@@ -1109,7 +1109,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getExternalSymbol(const char *Sym, MVT VT) {
+SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
SDNode *&N = ExternalSymbols[Sym];
if (N) return SDValue(N, 0);
N = NodeAllocator.Allocate<ExternalSymbolSDNode>();
@@ -1118,7 +1118,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, MVT VT,
+SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
unsigned char TargetFlags) {
SDNode *&N =
TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
@@ -1157,7 +1157,7 @@
}
}
-SDValue SelectionDAG::getVectorShuffle(MVT VT, DebugLoc dl, SDValue N1,
+SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
SDValue N2, const int *Mask) {
assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
assert(VT.isVector() && N1.getValueType().isVector() &&
@@ -1247,7 +1247,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getConvertRndSat(MVT VT, DebugLoc dl,
+SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
SDValue Val, SDValue DTy,
SDValue STy, SDValue Rnd, SDValue Sat,
ISD::CvtCode Code) {
@@ -1269,7 +1269,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
+SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
ID.AddInteger(RegNo);
@@ -1298,7 +1298,7 @@
unsigned LabelID) {
FoldingSetNodeID ID;
SDValue Ops[] = { Root };
- AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), &Ops[0], 1);
+ AddNodeIDNode(ID, Opcode, getVTList(EVT::Other), &Ops[0], 1);
ID.AddInteger(LabelID);
void *IP = 0;
if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -1315,7 +1315,7 @@
"SrcValue is not a pointer?");
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(EVT::Other), 0, 0);
ID.AddPointer(V);
void *IP = 0;
@@ -1337,7 +1337,7 @@
#endif
FoldingSetNodeID ID;
- AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(MVT::Other), 0, 0);
+ AddNodeIDNode(ID, ISD::MEMOPERAND, getVTList(EVT::Other), 0, 0);
MO.Profile(ID);
void *IP = 0;
@@ -1354,8 +1354,8 @@
/// getShiftAmountOperand - Return the specified value casted to
/// the target's desired shift amount type.
SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) {
- MVT OpTy = Op.getValueType();
- MVT ShTy = TLI.getShiftAmountTy();
+ EVT OpTy = Op.getValueType();
+ EVT ShTy = TLI.getShiftAmountTy();
if (OpTy == ShTy || OpTy.isVector()) return Op;
ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
@@ -1364,10 +1364,10 @@
/// CreateStackTemporary - Create a stack temporary, suitable for holding the
/// specified value type.
-SDValue SelectionDAG::CreateStackTemporary(MVT VT, unsigned minAlign) {
+SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
unsigned ByteSize = VT.getStoreSizeInBits()/8;
- const Type *Ty = VT.getTypeForMVT();
+ const Type *Ty = VT.getTypeForEVT();
unsigned StackAlign =
std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
@@ -1377,11 +1377,11 @@
/// CreateStackTemporary - Create a stack temporary suitable for holding
/// either of the specified value types.
-SDValue SelectionDAG::CreateStackTemporary(MVT VT1, MVT VT2) {
+SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
VT2.getStoreSizeInBits())/8;
- const Type *Ty1 = VT1.getTypeForMVT();
- const Type *Ty2 = VT2.getTypeForMVT();
+ const Type *Ty1 = VT1.getTypeForEVT();
+ const Type *Ty2 = VT2.getTypeForEVT();
const TargetData *TD = TLI.getTargetData();
unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
TD->getPrefTypeAlignment(Ty2));
@@ -1391,7 +1391,7 @@
return getFrameIndex(FrameIdx, TLI.getPointerTy());
}
-SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1,
+SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
// These setcc operations always fold.
switch (Cond) {
@@ -1438,7 +1438,7 @@
if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
// No compile time operations on this type yet.
- if (N1C->getValueType(0) == MVT::ppcf128)
+ if (N1C->getValueType(0) == EVT::ppcf128)
return SDValue();
APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
@@ -1727,7 +1727,7 @@
}
return;
case ISD::SIGN_EXTEND_INREG: {
- MVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
unsigned EBits = EVT.getSizeInBits();
// Sign extension. Compute the demanded bits in the result that are not
@@ -1772,14 +1772,14 @@
case ISD::LOAD: {
if (ISD::isZEXTLoad(Op.getNode())) {
LoadSDNode *LD = cast<LoadSDNode>(Op);
- MVT VT = LD->getMemoryVT();
+ EVT VT = LD->getMemoryVT();
unsigned MemBits = VT.getSizeInBits();
KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits) & Mask;
}
return;
}
case ISD::ZERO_EXTEND: {
- MVT InVT = Op.getOperand(0).getValueType();
+ EVT InVT = Op.getOperand(0).getValueType();
unsigned InBits = InVT.getSizeInBits();
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
APInt InMask = Mask;
@@ -1793,7 +1793,7 @@
return;
}
case ISD::SIGN_EXTEND: {
- MVT InVT = Op.getOperand(0).getValueType();
+ EVT InVT = Op.getOperand(0).getValueType();
unsigned InBits = InVT.getSizeInBits();
APInt InSignBit = APInt::getSignBit(InBits);
APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits) & Mask;
@@ -1834,7 +1834,7 @@
return;
}
case ISD::ANY_EXTEND: {
- MVT InVT = Op.getOperand(0).getValueType();
+ EVT InVT = Op.getOperand(0).getValueType();
unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.trunc(InBits);
@@ -1846,7 +1846,7 @@
return;
}
case ISD::TRUNCATE: {
- MVT InVT = Op.getOperand(0).getValueType();
+ EVT InVT = Op.getOperand(0).getValueType();
unsigned InBits = InVT.getSizeInBits();
APInt InMask = Mask;
InMask.zext(InBits);
@@ -1859,7 +1859,7 @@
break;
}
case ISD::AssertZext: {
- MVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
+ EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
ComputeMaskedBits(Op.getOperand(0), Mask & InMask, KnownZero,
KnownOne, Depth+1);
@@ -1978,7 +1978,7 @@
/// information. For example, immediately after an "SRA X, 2", we know that
/// the top 3 bits are all equal to each other, so we return 3.
unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
- MVT VT = Op.getValueType();
+ EVT VT = Op.getValueType();
assert(VT.isInteger() && "Invalid VT!");
unsigned VTBits = VT.getSizeInBits();
unsigned Tmp, Tmp2;
@@ -2213,7 +2213,7 @@
/// element of the result of the vector shuffle.
SDValue SelectionDAG::getShuffleScalarElt(const ShuffleVectorSDNode *N,
unsigned i) {
- MVT VT = N->getValueType(0);
+ EVT VT = N->getValueType(0);
DebugLoc dl = N->getDebugLoc();
if (N->getMaskElt(i) < 0)
return getUNDEF(VT.getVectorElementType());
@@ -2224,7 +2224,7 @@
if (V.getOpcode() == ISD::BIT_CONVERT) {
V = V.getOperand(0);
- MVT VVT = V.getValueType();
+ EVT VVT = V.getValueType();
if (!VVT.isVector() || VVT.getVectorNumElements() != (unsigned)NumElems)
return SDValue();
}
@@ -2241,7 +2241,7 @@
/// getNode - Gets or creates the specified node.
///
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT) {
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
void *IP = 0;
@@ -2259,7 +2259,7 @@
}
SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
- MVT VT, SDValue Operand) {
+ EVT VT, SDValue Operand) {
// Constant fold unary operations with an integer constant operand.
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
const APInt &Val = C->getAPIntValue();
@@ -2276,7 +2276,7 @@
case ISD::SINT_TO_FP: {
const uint64_t zero[] = {0, 0};
// No compile time operations on this type.
- if (VT==MVT::ppcf128)
+ if (VT==EVT::ppcf128)
break;
APFloat apf = APFloat(APInt(BitWidth, 2, zero));
(void)apf.convertFromAPInt(Val,
@@ -2285,9 +2285,9 @@
return getConstantFP(apf, VT);
}
case ISD::BIT_CONVERT:
- if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
+ if (VT == EVT::f32 && C->getValueType(0) == EVT::i32)
return getConstantFP(Val.bitsToFloat(), VT);
- else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
+ else if (VT == EVT::f64 && C->getValueType(0) == EVT::i64)
return getConstantFP(Val.bitsToDouble(), VT);
break;
case ISD::BSWAP:
@@ -2304,7 +2304,7 @@
// Constant fold unary operations with a floating point constant operand.
if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
APFloat V = C->getValueAPF(); // make copy
- if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
+ if (VT != EVT::ppcf128 && Operand.getValueType() != EVT::ppcf128) {
switch (Opcode) {
case ISD::FNEG:
V.changeSign();
@@ -2317,7 +2317,7 @@
bool ignored;
// This can return overflow, underflow, or inexact; we don't care.
// FIXME need to be more flexible about rounding mode.
- (void)V.convert(*MVTToAPFloatSemantics(VT),
+ (void)V.convert(*EVTToAPFloatSemantics(VT),
APFloat::rmNearestTiesToEven, &ignored);
return getConstantFP(V, VT);
}
@@ -2336,9 +2336,9 @@
return getConstant(api, VT);
}
case ISD::BIT_CONVERT:
- if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
+ if (VT == EVT::i32 && C->getValueType(0) == EVT::f32)
return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
- else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
+ else if (VT == EVT::i64 && C->getValueType(0) == EVT::f64)
return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
break;
}
@@ -2449,7 +2449,7 @@
SDNode *N;
SDVTList VTs = getVTList(VT);
- if (VT != MVT::Flag) { // Don't CSE flag producing nodes
+ if (VT != EVT::Flag) { // Don't CSE flag producing nodes
FoldingSetNodeID ID;
SDValue Ops[1] = { Operand };
AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
@@ -2472,7 +2472,7 @@
}
SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
- MVT VT,
+ EVT VT,
ConstantSDNode *Cst1,
ConstantSDNode *Cst2) {
const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
@@ -2507,15 +2507,15 @@
return SDValue();
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
SDValue N1, SDValue N2) {
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
switch (Opcode) {
default: break;
case ISD::TokenFactor:
- assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
- N2.getValueType() == MVT::Other && "Invalid token factor!");
+ assert(VT == EVT::Other && N1.getValueType() == EVT::Other &&
+ N2.getValueType() == EVT::Other && "Invalid token factor!");
// Fold trivial token factors.
if (N1.getOpcode() == ISD::EntryToken) return N2;
if (N2.getOpcode() == ISD::EntryToken) return N1;
@@ -2605,11 +2605,11 @@
// Always fold shifts of i1 values so the code generator doesn't need to
// handle them. Since we know the size of the shift has to be less than the
// size of the value, the shift/rotate count is guaranteed to be zero.
- if (VT == MVT::i1)
+ if (VT == EVT::i1)
return N1;
break;
case ISD::FP_ROUND_INREG: {
- MVT EVT = cast<VTSDNode>(N2)->getVT();
+ EVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg round!");
assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
"Cannot FP_ROUND_INREG integer types");
@@ -2626,7 +2626,7 @@
break;
case ISD::AssertSext:
case ISD::AssertZext: {
- MVT EVT = cast<VTSDNode>(N2)->getVT();
+ EVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
@@ -2635,7 +2635,7 @@
break;
}
case ISD::SIGN_EXTEND_INREG: {
- MVT EVT = cast<VTSDNode>(N2)->getVT();
+ EVT EVT = cast<VTSDNode>(N2)->getVT();
assert(VT == N1.getValueType() && "Not an inreg extend!");
assert(VT.isInteger() && EVT.isInteger() &&
"Cannot *_EXTEND_INREG FP types");
@@ -2673,7 +2673,7 @@
// expanding large vector constants.
if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
SDValue Elt = N1.getOperand(N2C->getZExtValue());
- MVT VEltTy = N1.getValueType().getVectorElementType();
+ EVT VEltTy = N1.getValueType().getVectorElementType();
if (Elt.getValueType() != VEltTy) {
// If the vector element type is not legal, the BUILD_VECTOR operands
// are promoted and implicitly truncated. Make that explicit here.
@@ -2746,7 +2746,7 @@
// Cannonicalize constant to RHS if commutative
std::swap(N1CFP, N2CFP);
std::swap(N1, N2);
- } else if (N2CFP && VT != MVT::ppcf128) {
+ } else if (N2CFP && VT != EVT::ppcf128) {
APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
APFloat::opStatus s;
switch (Opcode) {
@@ -2861,7 +2861,7 @@
// Memoize this node if possible.
SDNode *N;
SDVTList VTs = getVTList(VT);
- if (VT != MVT::Flag) {
+ if (VT != EVT::Flag) {
SDValue Ops[] = { N1, N2 };
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
@@ -2883,7 +2883,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
SDValue N1, SDValue N2, SDValue N3) {
// Perform various simplifications.
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
@@ -2920,7 +2920,7 @@
case ISD::BRCOND:
if (N2C) {
if (N2C->getZExtValue()) // Unconditional branch
- return getNode(ISD::BR, DL, MVT::Other, N1, N3);
+ return getNode(ISD::BR, DL, EVT::Other, N1, N3);
else
return N1; // Never-taken branch
}
@@ -2938,7 +2938,7 @@
// Memoize node if it doesn't produce a flag.
SDNode *N;
SDVTList VTs = getVTList(VT);
- if (VT != MVT::Flag) {
+ if (VT != EVT::Flag) {
SDValue Ops[] = { N1, N2, N3 };
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
@@ -2959,14 +2959,14 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
SDValue N1, SDValue N2, SDValue N3,
SDValue N4) {
SDValue Ops[] = { N1, N2, N3, N4 };
return getNode(Opcode, DL, VT, Ops, 4);
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
SDValue N1, SDValue N2, SDValue N3,
SDValue N4, SDValue N5) {
SDValue Ops[] = { N1, N2, N3, N4, N5 };
@@ -2992,13 +2992,13 @@
ArgChains.push_back(SDValue(L, 1));
// Build a tokenfactor for all the chains.
- return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
+ return getNode(ISD::TokenFactor, Chain.getDebugLoc(), EVT::Other,
&ArgChains[0], ArgChains.size());
}
/// getMemsetValue - Vectorized representation of the memset value
/// operand.
-static SDValue getMemsetValue(SDValue Value, MVT VT, SelectionDAG &DAG,
+static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
DebugLoc dl) {
unsigned NumBits = VT.isVector() ?
VT.getVectorElementType().getSizeInBits() : VT.getSizeInBits();
@@ -3032,7 +3032,7 @@
/// getMemsetStringVal - Similar to getMemsetValue. Except this is only
/// used when a memcpy is turned into a memset when the source is a constant
/// string ptr.
-static SDValue getMemsetStringVal(MVT VT, DebugLoc dl, SelectionDAG &DAG,
+static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
const TargetLowering &TLI,
std::string &Str, unsigned Offset) {
// Handle vector with all elements zero.
@@ -3040,9 +3040,9 @@
if (VT.isInteger())
return DAG.getConstant(0, VT);
unsigned NumElts = VT.getVectorNumElements();
- MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
+ EVT EltVT = (VT.getVectorElementType() == EVT::f32) ? EVT::i32 : EVT::i64;
return DAG.getNode(ISD::BIT_CONVERT, dl, VT,
- DAG.getConstant(0, MVT::getVectorVT(EltVT, NumElts)));
+ DAG.getConstant(0, EVT::getVectorVT(EltVT, NumElts)));
}
assert(!VT.isVector() && "Can't handle vector type here!");
@@ -3062,7 +3062,7 @@
///
static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
SelectionDAG &DAG) {
- MVT VT = Base.getValueType();
+ EVT VT = Base.getValueType();
return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
VT, Base, DAG.getConstant(Offset, VT));
}
@@ -3094,7 +3094,7 @@
/// to replace the memset / memcpy is below the threshold. It also returns the
/// types of the sequence of memory ops to perform memset / memcpy.
static
-bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps,
+bool MeetsMaxMemopRequirement(std::vector<EVT> &MemOps,
SDValue Dst, SDValue Src,
unsigned Limit, uint64_t Size, unsigned &Align,
std::string &Str, bool &isSrcStr,
@@ -3103,23 +3103,23 @@
isSrcStr = isMemSrcFromString(Src, Str);
bool isSrcConst = isa<ConstantSDNode>(Src);
bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses();
- MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
- if (VT != MVT::iAny) {
+ EVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG);
+ if (VT != EVT::iAny) {
unsigned NewAlign = (unsigned)
- TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT());
+ TLI.getTargetData()->getABITypeAlignment(VT.getTypeForEVT());
// If source is a string constant, this will require an unaligned load.
if (NewAlign > Align && (isSrcConst || AllowUnalign)) {
if (Dst.getOpcode() != ISD::FrameIndex) {
// Can't change destination alignment. It requires a unaligned store.
if (AllowUnalign)
- VT = MVT::iAny;
+ VT = EVT::iAny;
} else {
int FI = cast<FrameIndexSDNode>(Dst)->getIndex();
MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
if (MFI->isFixedObjectIndex(FI)) {
// Can't change destination alignment. It requires a unaligned store.
if (AllowUnalign)
- VT = MVT::iAny;
+ VT = EVT::iAny;
} else {
// Give the stack frame object a larger alignment if needed.
if (MFI->getObjectAlignment(FI) < NewAlign)
@@ -3130,21 +3130,21 @@
}
}
- if (VT == MVT::iAny) {
+ if (VT == EVT::iAny) {
if (AllowUnalign) {
- VT = MVT::i64;
+ VT = EVT::i64;
} else {
switch (Align & 7) {
- case 0: VT = MVT::i64; break;
- case 4: VT = MVT::i32; break;
- case 2: VT = MVT::i16; break;
- default: VT = MVT::i8; break;
+ case 0: VT = EVT::i64; break;
+ case 4: VT = EVT::i32; break;
+ case 2: VT = EVT::i16; break;
+ default: VT = EVT::i8; break;
}
}
- MVT LVT = MVT::i64;
+ EVT LVT = EVT::i64;
while (!TLI.isTypeLegal(LVT))
- LVT = (MVT::SimpleValueType)(LVT.getSimpleVT() - 1);
+ LVT = (EVT::SimpleValueType)(LVT.getSimpleVT() - 1);
assert(LVT.isInteger());
if (VT.bitsGT(LVT))
@@ -3157,14 +3157,14 @@
while (VTSize > Size) {
// For now, only use non-vector load / store's for the left-over pieces.
if (VT.isVector()) {
- VT = MVT::i64;
+ VT = EVT::i64;
while (!TLI.isTypeLegal(VT))
- VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
+ VT = (EVT::SimpleValueType)(VT.getSimpleVT() - 1);
VTSize = VT.getSizeInBits() / 8;
} else {
// This can result in a type that is not legal on the target, e.g.
// 1 or 2 bytes on PPC.
- VT = (MVT::SimpleValueType)(VT.getSimpleVT() - 1);
+ VT = (EVT::SimpleValueType)(VT.getSimpleVT() - 1);
VTSize >>= 1;
}
}
@@ -3188,7 +3188,7 @@
// Expand memcpy to a series of load and store ops if the size operand falls
// below a certain threshold.
- std::vector<MVT> MemOps;
+ std::vector<EVT> MemOps;
uint64_t Limit = -1ULL;
if (!AlwaysInline)
Limit = TLI.getMaxStoresPerMemcpy();
@@ -3205,7 +3205,7 @@
unsigned NumMemOps = MemOps.size();
uint64_t SrcOff = 0, DstOff = 0;
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT VT = MemOps[i];
+ EVT VT = MemOps[i];
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value, Store;
@@ -3225,7 +3225,7 @@
// thing to do is generate a LoadExt/StoreTrunc pair. These simplify
// to Load/Store if NVT==VT.
// FIXME does the case above also need this?
- MVT NVT = TLI.getTypeToTransformTo(VT);
+ EVT NVT = TLI.getTypeToTransformTo(VT);
assert(NVT.bitsGE(VT));
Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
getMemBasePlusOffset(Src, SrcOff, DAG),
@@ -3239,7 +3239,7 @@
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, EVT::Other,
&OutChains[0], OutChains.size());
}
@@ -3253,7 +3253,7 @@
// Expand memmove to a series of load and store ops if the size operand falls
// below a certain threshold.
- std::vector<MVT> MemOps;
+ std::vector<EVT> MemOps;
uint64_t Limit = -1ULL;
if (!AlwaysInline)
Limit = TLI.getMaxStoresPerMemmove();
@@ -3271,7 +3271,7 @@
SmallVector<SDValue, 8> OutChains;
unsigned NumMemOps = MemOps.size();
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT VT = MemOps[i];
+ EVT VT = MemOps[i];
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value, Store;
@@ -3282,11 +3282,11 @@
LoadChains.push_back(Value.getValue(1));
SrcOff += VTSize;
}
- Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ Chain = DAG.getNode(ISD::TokenFactor, dl, EVT::Other,
&LoadChains[0], LoadChains.size());
OutChains.clear();
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT VT = MemOps[i];
+ EVT VT = MemOps[i];
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value, Store;
@@ -3297,7 +3297,7 @@
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, EVT::Other,
&OutChains[0], OutChains.size());
}
@@ -3310,7 +3310,7 @@
// Expand memset to a series of load/store ops if the size operand
// falls below a certain threshold.
- std::vector<MVT> MemOps;
+ std::vector<EVT> MemOps;
std::string Str;
bool CopyFromStr;
if (!MeetsMaxMemopRequirement(MemOps, Dst, Src, TLI.getMaxStoresPerMemset(),
@@ -3322,7 +3322,7 @@
unsigned NumMemOps = MemOps.size();
for (unsigned i = 0; i < NumMemOps; i++) {
- MVT VT = MemOps[i];
+ EVT VT = MemOps[i];
unsigned VTSize = VT.getSizeInBits() / 8;
SDValue Value = getMemsetValue(Src, VT, DAG, dl);
SDValue Store = DAG.getStore(Chain, dl, Value,
@@ -3332,7 +3332,7 @@
DstOff += VTSize;
}
- return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
+ return DAG.getNode(ISD::TokenFactor, dl, EVT::Other,
&OutChains[0], OutChains.size());
}
@@ -3477,10 +3477,10 @@
Entry.Node = Dst; Entry.Ty = IntPtrTy;
Args.push_back(Entry);
// Extend or truncate the argument to be an i32 value for the call.
- if (Src.getValueType().bitsGT(MVT::i32))
- Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
+ if (Src.getValueType().bitsGT(EVT::i32))
+ Src = getNode(ISD::TRUNCATE, dl, EVT::i32, Src);
else
- Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
+ Src = getNode(ISD::ZERO_EXTEND, dl, EVT::i32, Src);
Entry.Node = Src; Entry.Ty = Type::Int32Ty; Entry.isSExt = true;
Args.push_back(Entry);
Entry.Node = Size; Entry.Ty = IntPtrTy; Entry.isSExt = false;
@@ -3496,7 +3496,7 @@
return CallResult.second;
}
-SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
+SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
SDValue Chain,
SDValue Ptr, SDValue Cmp,
SDValue Swp, const Value* PtrVal,
@@ -3504,12 +3504,12 @@
assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
- MVT VT = Cmp.getValueType();
+ EVT VT = Cmp.getValueType();
if (Alignment == 0) // Ensure that codegen never sees alignment 0
- Alignment = getMVTAlignment(MemVT);
+ Alignment = getEVTAlignment(MemVT);
- SDVTList VTs = getVTList(VT, MVT::Other);
+ SDVTList VTs = getVTList(VT, EVT::Other);
FoldingSetNodeID ID;
ID.AddInteger(MemVT.getRawBits());
SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
@@ -3525,7 +3525,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, MVT MemVT,
+SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
SDValue Chain,
SDValue Ptr, SDValue Val,
const Value* PtrVal,
@@ -3543,12 +3543,12 @@
Opcode == ISD::ATOMIC_SWAP) &&
"Invalid Atomic Op");
- MVT VT = Val.getValueType();
+ EVT VT = Val.getValueType();
if (Alignment == 0) // Ensure that codegen never sees alignment 0
- Alignment = getMVTAlignment(MemVT);
+ Alignment = getEVTAlignment(MemVT);
- SDVTList VTs = getVTList(VT, MVT::Other);
+ SDVTList VTs = getVTList(VT, EVT::Other);
FoldingSetNodeID ID;
ID.AddInteger(MemVT.getRawBits());
SDValue Ops[] = {Chain, Ptr, Val};
@@ -3571,7 +3571,7 @@
if (NumOps == 1)
return Ops[0];
- SmallVector<MVT, 4> VTs;
+ SmallVector<EVT, 4> VTs;
VTs.reserve(NumOps);
for (unsigned i = 0; i < NumOps; ++i)
VTs.push_back(Ops[i].getValueType());
@@ -3581,9 +3581,9 @@
SDValue
SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
- const MVT *VTs, unsigned NumVTs,
+ const EVT *VTs, unsigned NumVTs,
const SDValue *Ops, unsigned NumOps,
- MVT MemVT, const Value *srcValue, int SVOff,
+ EVT MemVT, const Value *srcValue, int SVOff,
unsigned Align, bool Vol,
bool ReadMem, bool WriteMem) {
return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
@@ -3594,12 +3594,12 @@
SDValue
SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
const SDValue *Ops, unsigned NumOps,
- MVT MemVT, const Value *srcValue, int SVOff,
+ EVT MemVT, const Value *srcValue, int SVOff,
unsigned Align, bool Vol,
bool ReadMem, bool WriteMem) {
// Memoize the node unless it returns a flag.
MemIntrinsicSDNode *N;
- if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
+ if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
@@ -3621,12 +3621,12 @@
SDValue
SelectionDAG::getLoad(ISD::MemIndexedMode AM, DebugLoc dl,
- ISD::LoadExtType ExtType, MVT VT, SDValue Chain,
+ ISD::LoadExtType ExtType, EVT VT, SDValue Chain,
SDValue Ptr, SDValue Offset,
- const Value *SV, int SVOffset, MVT EVT,
+ const Value *SV, int SVOffset, EVT EVT,
bool isVolatile, unsigned Alignment) {
if (Alignment == 0) // Ensure that codegen never sees alignment 0
- Alignment = getMVTAlignment(VT);
+ Alignment = getEVTAlignment(VT);
if (VT == EVT) {
ExtType = ISD::NON_EXTLOAD;
@@ -3651,7 +3651,7 @@
"Unindexed load with an offset!");
SDVTList VTs = Indexed ?
- getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
+ getVTList(VT, Ptr.getValueType(), EVT::Other) : getVTList(VT, EVT::Other);
SDValue Ops[] = { Chain, Ptr, Offset };
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
@@ -3668,7 +3668,7 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getLoad(MVT VT, DebugLoc dl,
+SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
SDValue Chain, SDValue Ptr,
const Value *SV, int SVOffset,
bool isVolatile, unsigned Alignment) {
@@ -3677,10 +3677,10 @@
SV, SVOffset, VT, isVolatile, Alignment);
}
-SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, MVT VT,
+SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
SDValue Chain, SDValue Ptr,
const Value *SV,
- int SVOffset, MVT EVT,
+ int SVOffset, EVT EVT,
bool isVolatile, unsigned Alignment) {
SDValue Undef = getUNDEF(Ptr.getValueType());
return getLoad(ISD::UNINDEXED, dl, ExtType, VT, Chain, Ptr, Undef,
@@ -3702,12 +3702,12 @@
SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
SDValue Ptr, const Value *SV, int SVOffset,
bool isVolatile, unsigned Alignment) {
- MVT VT = Val.getValueType();
+ EVT VT = Val.getValueType();
if (Alignment == 0) // Ensure that codegen never sees alignment 0
- Alignment = getMVTAlignment(VT);
+ Alignment = getEVTAlignment(VT);
- SDVTList VTs = getVTList(MVT::Other);
+ SDVTList VTs = getVTList(EVT::Other);
SDValue Undef = getUNDEF(Ptr.getValueType());
SDValue Ops[] = { Chain, Val, Ptr, Undef };
FoldingSetNodeID ID;
@@ -3728,9 +3728,9 @@
SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
SDValue Ptr, const Value *SV,
- int SVOffset, MVT SVT,
+ int SVOffset, EVT SVT,
bool isVolatile, unsigned Alignment) {
- MVT VT = Val.getValueType();
+ EVT VT = Val.getValueType();
if (VT == SVT)
return getStore(Chain, dl, Val, Ptr, SV, SVOffset, isVolatile, Alignment);
@@ -3740,9 +3740,9 @@
"Can't do FP-INT conversion!");
if (Alignment == 0) // Ensure that codegen never sees alignment 0
- Alignment = getMVTAlignment(VT);
+ Alignment = getEVTAlignment(VT);
- SDVTList VTs = getVTList(MVT::Other);
+ SDVTList VTs = getVTList(EVT::Other);
SDValue Undef = getUNDEF(Ptr.getValueType());
SDValue Ops[] = { Chain, Val, Ptr, Undef };
FoldingSetNodeID ID;
@@ -3767,7 +3767,7 @@
StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
"Store is already a indexed store!");
- SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
+ SDVTList VTs = getVTList(Base.getValueType(), EVT::Other);
SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
FoldingSetNodeID ID;
AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
@@ -3786,14 +3786,14 @@
return SDValue(N, 0);
}
-SDValue SelectionDAG::getVAArg(MVT VT, DebugLoc dl,
+SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
SDValue Chain, SDValue Ptr,
SDValue SV) {
SDValue Ops[] = { Chain, Ptr, SV };
- return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 3);
+ return getNode(ISD::VAARG, dl, getVTList(VT, EVT::Other), Ops, 3);
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
const SDUse *Ops, unsigned NumOps) {
switch (NumOps) {
case 0: return getNode(Opcode, DL, VT);
@@ -3809,7 +3809,7 @@
return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
}
-SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT,
+SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
const SDValue *Ops, unsigned NumOps) {
switch (NumOps) {
case 0: return getNode(Opcode, DL, VT);
@@ -3843,7 +3843,7 @@
SDNode *N;
SDVTList VTs = getVTList(VT);
- if (VT != MVT::Flag) {
+ if (VT != EVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
void *IP = 0;
@@ -3867,14 +3867,14 @@
}
SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
- const std::vector<MVT> &ResultTys,
+ const std::vector<EVT> &ResultTys,
const SDValue *Ops, unsigned NumOps) {
return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
Ops, NumOps);
}
SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
- const MVT *VTs, unsigned NumVTs,
+ const EVT *VTs, unsigned NumVTs,
const SDValue *Ops, unsigned NumOps) {
if (NumVTs == 1)
return getNode(Opcode, DL, VTs[0], Ops, NumOps);
@@ -3895,7 +3895,7 @@
case ISD::SRL_PARTS:
case ISD::SHL_PARTS:
if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
- cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
+ cast<VTSDNode>(N3.getOperand(1))->getVT() != EVT::i1)
return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
else if (N3.getOpcode() == ISD::AND)
if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
@@ -3911,7 +3911,7 @@
// Memoize the node unless it returns a flag.
SDNode *N;
- if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
+ if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
@@ -3989,17 +3989,17 @@
return getNode(Opcode, DL, VTList, Ops, 5);
}
-SDVTList SelectionDAG::getVTList(MVT VT) {
+SDVTList SelectionDAG::getVTList(EVT VT) {
return makeVTList(SDNode::getValueTypeList(VT), 1);
}
-SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2) {
+SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
E = VTList.rend(); I != E; ++I)
if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
return *I;
- MVT *Array = Allocator.Allocate<MVT>(2);
+ EVT *Array = Allocator.Allocate<EVT>(2);
Array[0] = VT1;
Array[1] = VT2;
SDVTList Result = makeVTList(Array, 2);
@@ -4007,14 +4007,14 @@
return Result;
}
-SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3) {
+SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
E = VTList.rend(); I != E; ++I)
if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
I->VTs[2] == VT3)
return *I;
- MVT *Array = Allocator.Allocate<MVT>(3);
+ EVT *Array = Allocator.Allocate<EVT>(3);
Array[0] = VT1;
Array[1] = VT2;
Array[2] = VT3;
@@ -4023,14 +4023,14 @@
return Result;
}
-SDVTList SelectionDAG::getVTList(MVT VT1, MVT VT2, MVT VT3, MVT VT4) {
+SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
E = VTList.rend(); I != E; ++I)
if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
I->VTs[2] == VT3 && I->VTs[3] == VT4)
return *I;
- MVT *Array = Allocator.Allocate<MVT>(3);
+ EVT *Array = Allocator.Allocate<EVT>(3);
Array[0] = VT1;
Array[1] = VT2;
Array[2] = VT3;
@@ -4040,7 +4040,7 @@
return Result;
}
-SDVTList SelectionDAG::getVTList(const MVT *VTs, unsigned NumVTs) {
+SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
switch (NumVTs) {
case 0: llvm_unreachable("Cannot have nodes without results!");
case 1: return getVTList(VTs[0]);
@@ -4064,7 +4064,7 @@
return *I;
}
- MVT *Array = Allocator.Allocate<MVT>(NumVTs);
+ EVT *Array = Allocator.Allocate<EVT>(NumVTs);
std::copy(VTs, VTs+NumVTs, Array);
SDVTList Result = makeVTList(Array, NumVTs);
VTList.push_back(Result);
@@ -4206,20 +4206,20 @@
/// machine opcode.
///
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT) {
+ EVT VT) {
SDVTList VTs = getVTList(VT);
return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT, SDValue Op1) {
+ EVT VT, SDValue Op1) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1 };
return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT, SDValue Op1,
+ EVT VT, SDValue Op1,
SDValue Op2) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1, Op2 };
@@ -4227,7 +4227,7 @@
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT, SDValue Op1,
+ EVT VT, SDValue Op1,
SDValue Op2, SDValue Op3) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1, Op2, Op3 };
@@ -4235,41 +4235,41 @@
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT, const SDValue *Ops,
+ EVT VT, const SDValue *Ops,
unsigned NumOps) {
SDVTList VTs = getVTList(VT);
return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2, const SDValue *Ops,
+ EVT VT1, EVT VT2, const SDValue *Ops,
unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2);
return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2) {
+ EVT VT1, EVT VT2) {
SDVTList VTs = getVTList(VT1, VT2);
return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2, MVT VT3, MVT VT4,
+ EVT VT1, EVT VT2, EVT VT3, EVT VT4,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1 };
@@ -4277,7 +4277,7 @@
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1, SDValue Op2) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1, Op2 };
@@ -4285,7 +4285,7 @@
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1, SDValue Op2,
SDValue Op3) {
SDVTList VTs = getVTList(VT1, VT2);
@@ -4294,7 +4294,7 @@
}
SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
SDValue Op1, SDValue Op2,
SDValue Op3) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
@@ -4309,20 +4309,20 @@
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT) {
+ EVT VT) {
SDVTList VTs = getVTList(VT);
return MorphNodeTo(N, Opc, VTs, 0, 0);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT, SDValue Op1) {
+ EVT VT, SDValue Op1) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1 };
return MorphNodeTo(N, Opc, VTs, Ops, 1);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT, SDValue Op1,
+ EVT VT, SDValue Op1,
SDValue Op2) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1, Op2 };
@@ -4330,7 +4330,7 @@
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT, SDValue Op1,
+ EVT VT, SDValue Op1,
SDValue Op2, SDValue Op3) {
SDVTList VTs = getVTList(VT);
SDValue Ops[] = { Op1, Op2, Op3 };
@@ -4338,34 +4338,34 @@
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT, const SDValue *Ops,
+ EVT VT, const SDValue *Ops,
unsigned NumOps) {
SDVTList VTs = getVTList(VT);
return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2, const SDValue *Ops,
+ EVT VT1, EVT VT2, const SDValue *Ops,
unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2);
return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2) {
+ EVT VT1, EVT VT2) {
SDVTList VTs = getVTList(VT1, VT2);
return MorphNodeTo(N, Opc, VTs, (SDValue *)0, 0);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
return MorphNodeTo(N, Opc, VTs, Ops, NumOps);
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1 };
@@ -4373,7 +4373,7 @@
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1, SDValue Op2) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1, Op2 };
@@ -4381,7 +4381,7 @@
}
SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
SDValue Op1, SDValue Op2,
SDValue Op3) {
SDVTList VTs = getVTList(VT1, VT2);
@@ -4406,7 +4406,7 @@
unsigned NumOps) {
// If an identical node already exists, use it.
void *IP = 0;
- if (VTs.VTs[VTs.NumVTs-1] != MVT::Flag) {
+ if (VTs.VTs[VTs.NumVTs-1] != EVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
@@ -4478,54 +4478,54 @@
/// Note that getTargetNode returns the resultant node. If there is already a
/// node of the specified opcode and operands, it returns that node instead of
/// the current one.
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT) {
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT) {
return getNode(~Opcode, dl, VT).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
SDValue Op1) {
return getNode(~Opcode, dl, VT, Op1).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
SDValue Op1, SDValue Op2) {
return getNode(~Opcode, dl, VT, Op1, Op2).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
SDValue Op1, SDValue Op2,
SDValue Op3) {
return getNode(~Opcode, dl, VT, Op1, Op2, Op3).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT,
const SDValue *Ops, unsigned NumOps) {
return getNode(~Opcode, dl, VT, Ops, NumOps).getNode();
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- MVT VT1, MVT VT2) {
+ EVT VT1, EVT VT2) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Op;
return getNode(~Opcode, dl, VTs, &Op, 0).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
- MVT VT2, SDValue Op1) {
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
+ EVT VT2, SDValue Op1) {
SDVTList VTs = getVTList(VT1, VT2);
return getNode(~Opcode, dl, VTs, &Op1, 1).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
- MVT VT2, SDValue Op1,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
+ EVT VT2, SDValue Op1,
SDValue Op2) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1, Op2 };
return getNode(~Opcode, dl, VTs, Ops, 2).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
- MVT VT2, SDValue Op1,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
+ EVT VT2, SDValue Op1,
SDValue Op2, SDValue Op3) {
SDVTList VTs = getVTList(VT1, VT2);
SDValue Ops[] = { Op1, Op2, Op3 };
@@ -4533,14 +4533,14 @@
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- MVT VT1, MVT VT2,
+ EVT VT1, EVT VT2,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2);
return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
SDValue Op1, SDValue Op2) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
SDValue Ops[] = { Op1, Op2 };
@@ -4548,7 +4548,7 @@
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
SDValue Op1, SDValue Op2,
SDValue Op3) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
@@ -4557,21 +4557,21 @@
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- MVT VT1, MVT VT2, MVT VT3,
+ EVT VT1, EVT VT2, EVT VT3,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2, VT3);
return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
}
-SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, MVT VT1,
- MVT VT2, MVT VT3, MVT VT4,
+SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl, EVT VT1,
+ EVT VT2, EVT VT3, EVT VT4,
const SDValue *Ops, unsigned NumOps) {
SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
return getNode(~Opcode, dl, VTs, Ops, NumOps).getNode();
}
SDNode *SelectionDAG::getTargetNode(unsigned Opcode, DebugLoc dl,
- const std::vector<MVT> &ResultTys,
+ const std::vector<EVT> &ResultTys,
const SDValue *Ops, unsigned NumOps) {
return getNode(~Opcode, dl, ResultTys, Ops, NumOps).getNode();
}
@@ -4580,7 +4580,7 @@
/// else return NULL.
SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
const SDValue *Ops, unsigned NumOps) {
- if (VTList.VTs[VTList.NumVTs-1] != MVT::Flag) {
+ if (VTList.VTs[VTList.NumVTs-1] != EVT::Flag) {
FoldingSetNodeID ID;
AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
void *IP = 0;
@@ -4928,13 +4928,13 @@
}
GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, const GlobalValue *GA,
- MVT VT, int64_t o, unsigned char TF)
+ EVT VT, int64_t o, unsigned char TF)
: SDNode(Opc, DebugLoc::getUnknownLoc(), getSDVTList(VT)),
Offset(o), TargetFlags(TF) {
TheGlobal = const_cast<GlobalValue*>(GA);
}
-MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
+MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
const Value *srcValue, int SVO,
unsigned alignment, bool vol)
: SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
@@ -4946,7 +4946,7 @@
MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
const SDValue *Ops,
- unsigned NumOps, MVT memvt, const Value *srcValue,
+ unsigned NumOps, EVT memvt, const Value *srcValue,
int SVO, unsigned alignment, bool vol)
: SDNode(Opc, dl, VTs, Ops, NumOps),
MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO) {
@@ -4994,13 +4994,13 @@
AddNodeIDNode(ID, this);
}
-static ManagedStatic<std::set<MVT, MVT::compareRawBits> > EVTs;
-static MVT VTs[MVT::LAST_VALUETYPE];
+static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
+static EVT VTs[EVT::LAST_VALUETYPE];
static ManagedStatic<sys::SmartMutex<true> > VTMutex;
/// getValueTypeList - Return a pointer to the specified value type.
///
-const MVT *SDNode::getValueTypeList(MVT VT) {
+const EVT *SDNode::getValueTypeList(EVT VT) {
sys::SmartScopedLock<true> Lock(*VTMutex);
if (VT.isExtended()) {
return &(*EVTs->insert(VT).first);
@@ -5447,10 +5447,10 @@
for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
if (i) OS << ",";
- if (getValueType(i) == MVT::Other)
+ if (getValueType(i) == EVT::Other)
OS << "ch";
else
- OS << getValueType(i).getMVTString();
+ OS << getValueType(i).getEVTString();
}
OS << " = " << getOperationName(G);
}
@@ -5541,7 +5541,7 @@
else
OS << "<null:" << M->MO.getOffset() << ">";
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
- OS << ":" << N->getVT().getMVTString();
+ OS << ":" << N->getVT().getEVTString();
}
else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
const Value *SrcValue = LD->getSrcValue();
@@ -5561,7 +5561,7 @@
case ISD::ZEXTLOAD: OS << " <zext "; break;
}
if (doExt)
- OS << LD->getMemoryVT().getMVTString() << ">";
+ OS << LD->getMemoryVT().getEVTString() << ">";
const char *AM = getIndexedModeName(LD->getAddressingMode());
if (*AM)
@@ -5580,7 +5580,7 @@
OS << ":" << SrcOffset << ">";
if (ST->isTruncatingStore())
- OS << " <trunc " << ST->getMemoryVT().getMVTString() << ">";
+ OS << " <trunc " << ST->getMemoryVT().getEVTString() << ">";
const char *AM = getIndexedModeName(ST->getAddressingMode());
if (*AM)
@@ -5702,7 +5702,7 @@
unsigned &SplatBitSize,
bool &HasAnyUndefs,
unsigned MinSplatBits) {
- MVT VT = getValueType(0);
+ EVT VT = getValueType(0);
assert(VT.isVector() && "Expected a vector type");
unsigned sz = VT.getSizeInBits();
if (MinSplatBits > sz)
@@ -5760,7 +5760,7 @@
return true;
}
-bool ShuffleVectorSDNode::isSplatMask(const int *Mask, MVT VT) {
+bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
// Find the first non-undef value in the shuffle mask.
unsigned i, e;
for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)