Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 1 | /* Title: PhyRegAlloc.h |
| 2 | Author: Ruchira Sasanka |
| 3 | Date: Aug 20, 01 |
| 4 | Purpose: This is the main entry point for register allocation. |
| 5 | |
| 6 | Notes: |
| 7 | |
| 8 | * RegisterClasses: Each RegClass accepts a |
| 9 | MachineRegClass which contains machine specific info about that register |
| 10 | class. The code in the RegClass is machine independent and they use |
| 11 | access functions in the MachineRegClass object passed into it to get |
| 12 | machine specific info. |
| 13 | |
| 14 | * Machine dependent work: All parts of the register coloring algorithm |
| 15 | except coloring of an individual node are machine independent. |
| 16 | |
| 17 | Register allocation must be done as: |
| 18 | |
| 19 | static const MachineRegInfo MRI = MachineRegInfo(); // machine reg info |
| 20 | |
| 21 | MethodLiveVarInfo LVI(*MethodI ); // compute LV info |
| 22 | LVI.analyze(); |
| 23 | |
| 24 | PhyRegAlloc PRA(*MethodI, &MRI, &LVI); // allocate regs |
| 25 | PRA.allocateRegisters(); |
| 26 | |
| 27 | Assumptions: |
| 28 | All values in a live range will be of the same physical reg class. |
| 29 | |
| 30 | */ |
| 31 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 32 | #ifndef PHY_REG_ALLOC_H |
| 33 | #define PHY_REG_ALLOC_H |
| 34 | |
| 35 | #include "llvm/CodeGen/MachineInstr.h" |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 36 | #include "llvm/CodeGen/RegClass.h" |
| 37 | #include "llvm/CodeGen/LiveRangeInfo.h" |
| 38 | #include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h" |
| 39 | |
Ruchira Sasanka | 21721b6 | 2001-10-15 16:22:44 +0000 | [diff] [blame] | 40 | #include <deque> |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 41 | |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 42 | |
| 43 | //---------------------------------------------------------------------------- |
| 44 | // Class AddedInstrns: |
| 45 | // When register allocator inserts new instructions in to the existing |
| 46 | // instruction stream, it does NOT directly modify the instruction stream. |
| 47 | // Rather, it creates an object of AddedInstrns and stick it in the |
| 48 | // AddedInstrMap for an existing instruction. This class contains two vectors |
| 49 | // to store such instructions added before and after an existing instruction. |
| 50 | //---------------------------------------------------------------------------- |
| 51 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 52 | class AddedInstrns |
| 53 | { |
| 54 | public: |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 55 | deque<MachineInstr *> InstrnsBefore; // Added insts BEFORE an existing inst |
| 56 | deque<MachineInstr *> InstrnsAfter; // Added insts AFTER an existing inst |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 57 | |
| 58 | AddedInstrns() : InstrnsBefore(), InstrnsAfter() { } |
| 59 | }; |
| 60 | |
| 61 | typedef hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType; |
| 62 | |
| 63 | |
| 64 | |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 65 | //---------------------------------------------------------------------------- |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 66 | // class PhyRegAlloc: |
| 67 | // Main class the register allocator. Call allocateRegisters() to allocate |
| 68 | // registers for a Method. |
| 69 | //---------------------------------------------------------------------------- |
| 70 | |
| 71 | |
Vikram S. Adve | 12af164 | 2001-11-08 04:48:50 +0000 | [diff] [blame] | 72 | class PhyRegAlloc: public NonCopyable |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 73 | { |
| 74 | |
| 75 | vector<RegClass *> RegClassList ; // vector of register classes |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 76 | const TargetMachine &TM; // target machine |
Vikram S. Adve | 12af164 | 2001-11-08 04:48:50 +0000 | [diff] [blame] | 77 | const Method* Meth; // name of the method we work on |
| 78 | MachineCodeForMethod& mcInfo; // descriptor for method's native code |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 79 | MethodLiveVarInfo *const LVI; // LV information for this method |
| 80 | // (already computed for BBs) |
| 81 | LiveRangeInfo LRI; // LR info (will be computed) |
| 82 | const MachineRegInfo &MRI; // Machine Register information |
| 83 | const unsigned NumOfRegClasses; // recorded here for efficiency |
| 84 | |
Ruchira Sasanka | ab304c4 | 2001-09-30 23:19:57 +0000 | [diff] [blame] | 85 | //vector<const Instruction *> CallInstrList; // a list of all call instrs |
| 86 | //vector<const Instruction *> RetInstrList; // a list of all return instrs |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 87 | |
Ruchira Sasanka | 51bc0e7 | 2001-11-03 17:14:44 +0000 | [diff] [blame] | 88 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 89 | AddedInstrMapType AddedInstrMap; // to store instrns added in this phase |
| 90 | |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 91 | //vector<const MachineInstr *> PhiInstList; // a list of all phi instrs |
Ruchira Sasanka | 51bc0e7 | 2001-11-03 17:14:44 +0000 | [diff] [blame] | 92 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 93 | //------- private methods --------------------------------------------------- |
| 94 | |
| 95 | void addInterference(const Value *const Def, const LiveVarSet *const LVSet, |
| 96 | const bool isCallInst); |
| 97 | |
| 98 | void addInterferencesForArgs(); |
| 99 | void createIGNodeListsAndIGs(); |
| 100 | void buildInterferenceGraphs(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 101 | //void insertCallerSavingCode(const MachineInstr *MInst, |
| 102 | // const BasicBlock *BB ); |
Ruchira Sasanka | c4d4b76 | 2001-10-16 01:23:19 +0000 | [diff] [blame] | 103 | |
Ruchira Sasanka | 36f7707 | 2001-10-19 17:21:59 +0000 | [diff] [blame] | 104 | void setCallInterferences(const MachineInstr *MInst, |
| 105 | const LiveVarSet *const LVSetAft ); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 106 | |
Ruchira Sasanka | f7434f0 | 2001-10-23 21:38:42 +0000 | [diff] [blame] | 107 | void move2DelayedInstr(const MachineInstr *OrigMI, |
| 108 | const MachineInstr *DelayedMI ); |
| 109 | |
Ruchira Sasanka | 44d2b94 | 2001-10-19 21:42:06 +0000 | [diff] [blame] | 110 | void markUnusableSugColors(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 111 | void allocateStackSpace4SpilledLRs(); |
| 112 | |
Chris Lattner | 00d91c6 | 2001-11-08 20:55:05 +0000 | [diff] [blame^] | 113 | void insertCode4SpilledLR (const LiveRange *LR, |
| 114 | MachineInstr *MInst, |
| 115 | const BasicBlock *BB, |
| 116 | const unsigned OpNum); |
Ruchira Sasanka | 44d2b94 | 2001-10-19 21:42:06 +0000 | [diff] [blame] | 117 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 118 | inline void constructLiveRanges() |
| 119 | { LRI.constructLiveRanges(); } |
| 120 | |
| 121 | void colorIncomingArgs(); |
Ruchira Sasanka | ab304c4 | 2001-09-30 23:19:57 +0000 | [diff] [blame] | 122 | void colorCallRetArgs(); |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 123 | void updateMachineCode(); |
Ruchira Sasanka | ab304c4 | 2001-09-30 23:19:57 +0000 | [diff] [blame] | 124 | |
Ruchira Sasanka | 6053b93 | 2001-09-15 19:08:41 +0000 | [diff] [blame] | 125 | void printLabel(const Value *const Val); |
| 126 | void printMachineCode(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 127 | |
| 128 | friend class UltraSparcRegInfo; |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 129 | |
| 130 | |
| 131 | int getUsableRegAtMI(RegClass *RC, const int RegType, const MachineInstr *MInst, |
| 132 | const LiveVarSet *LVSetBef, MachineInstr *MIBef, |
| 133 | MachineInstr *MIAft ); |
| 134 | |
| 135 | int getUnusedRegAtMI(RegClass *RC, const MachineInstr *MInst, |
| 136 | const LiveVarSet *LVSetBef); |
| 137 | |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 138 | void setRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst ); |
| 139 | int getRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst); |
| 140 | |
Ruchira Sasanka | 80b1a1a | 2001-11-03 20:41:22 +0000 | [diff] [blame] | 141 | |
| 142 | |
Ruchira Sasanka | 51bc0e7 | 2001-11-03 17:14:44 +0000 | [diff] [blame] | 143 | void PhyRegAlloc::insertPhiEleminateInstrns(); |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 144 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 145 | public: |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 146 | |
Vikram S. Adve | 12af164 | 2001-11-08 04:48:50 +0000 | [diff] [blame] | 147 | PhyRegAlloc(Method *const M, const TargetMachine& TM, |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 148 | MethodLiveVarInfo *const Lvi); |
| 149 | |
| 150 | void allocateRegisters(); // main method called for allocatin |
| 151 | |
| 152 | }; |
| 153 | |
| 154 | |
| 155 | |
Ruchira Sasanka | 51bc0e7 | 2001-11-03 17:14:44 +0000 | [diff] [blame] | 156 | /* |
| 157 | |
| 158 | |
| 159 | What to do: |
| 160 | |
| 161 | * Insert IntCCReg checking code to insertCallerSaving |
| 162 | * add methods like cpCCReg2Mem & cpMem2CCReg (these will accept an array |
| 163 | and push back or push_front the instr according to PUSH_BACK, PUSH_FRONT |
| 164 | flags |
| 165 | |
| 166 | */ |
| 167 | |
| 168 | |
| 169 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 170 | |
| 171 | |
| 172 | |
| 173 | |
| 174 | |
Ruchira Sasanka | 20c82b1 | 2001-10-28 18:15:12 +0000 | [diff] [blame] | 175 | |
| 176 | |
| 177 | |
Ruchira Sasanka | 7cd2ca1 | 2001-09-08 14:22:50 +0000 | [diff] [blame] | 178 | #endif |
| 179 | |